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/*
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* gdb server stub
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*
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* Copyright (c) 2003-2005 Fabrice Bellard
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*
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* This library is free software; you can redistribute it and/or
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* modify it under the terms of the GNU Lesser General Public
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* License as published by the Free Software Foundation; either
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* version 2 of the License, or (at your option) any later version.
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*
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* This library is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
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* Lesser General Public License for more details.
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*
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* You should have received a copy of the GNU Lesser General Public
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* License along with this library; if not, write to the Free Software
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* Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
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*/
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#include "config.h" |
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#ifdef CONFIG_USER_ONLY
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#include <stdlib.h> |
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#include <stdio.h> |
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#include <stdarg.h> |
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#include <string.h> |
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#include <errno.h> |
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#include <unistd.h> |
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#include <fcntl.h> |
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#include "qemu.h" |
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#else
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#include "vl.h" |
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#endif
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#include "qemu_socket.h" |
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#ifdef _WIN32
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/* XXX: these constants may be independent of the host ones even for Unix */
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#ifndef SIGTRAP
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#define SIGTRAP 5 |
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#endif
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#ifndef SIGINT
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#define SIGINT 2 |
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#endif
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#else
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#include <signal.h> |
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#endif
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//#define DEBUG_GDB
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enum RSState {
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RS_IDLE, |
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RS_GETLINE, |
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RS_CHKSUM1, |
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RS_CHKSUM2, |
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RS_SYSCALL, |
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}; |
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typedef struct GDBState { |
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CPUState *env; /* current CPU */
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enum RSState state; /* parsing state */ |
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char line_buf[4096]; |
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int line_buf_index;
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int line_csum;
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char last_packet[4100]; |
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int last_packet_len;
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#ifdef CONFIG_USER_ONLY
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int fd;
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int running_state;
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#else
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CharDriverState *chr; |
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#endif
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} GDBState; |
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#ifdef CONFIG_USER_ONLY
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/* XXX: This is not thread safe. Do we care? */
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static int gdbserver_fd = -1; |
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/* XXX: remove this hack. */
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static GDBState gdbserver_state;
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static int get_char(GDBState *s) |
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{ |
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uint8_t ch; |
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int ret;
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for(;;) {
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ret = recv(s->fd, &ch, 1, 0); |
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if (ret < 0) { |
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if (errno != EINTR && errno != EAGAIN)
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return -1; |
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} else if (ret == 0) { |
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return -1; |
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} else {
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break;
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} |
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} |
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return ch;
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} |
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#endif
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/* GDB stub state for use by semihosting syscalls. */
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static GDBState *gdb_syscall_state;
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static gdb_syscall_complete_cb gdb_current_syscall_cb;
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enum {
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GDB_SYS_UNKNOWN, |
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GDB_SYS_ENABLED, |
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GDB_SYS_DISABLED, |
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} gdb_syscall_mode; |
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/* If gdb is connected when the first semihosting syscall occurs then use
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remote gdb syscalls. Otherwise use native file IO. */
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int use_gdb_syscalls(void) |
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{ |
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if (gdb_syscall_mode == GDB_SYS_UNKNOWN) {
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gdb_syscall_mode = (gdb_syscall_state ? GDB_SYS_ENABLED |
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: GDB_SYS_DISABLED); |
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} |
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return gdb_syscall_mode == GDB_SYS_ENABLED;
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} |
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static void put_buffer(GDBState *s, const uint8_t *buf, int len) |
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{ |
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#ifdef CONFIG_USER_ONLY
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int ret;
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while (len > 0) { |
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ret = send(s->fd, buf, len, 0);
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if (ret < 0) { |
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if (errno != EINTR && errno != EAGAIN)
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return;
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} else {
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buf += ret; |
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len -= ret; |
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} |
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} |
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#else
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qemu_chr_write(s->chr, buf, len); |
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#endif
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} |
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static inline int fromhex(int v) |
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{ |
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if (v >= '0' && v <= '9') |
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return v - '0'; |
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else if (v >= 'A' && v <= 'F') |
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return v - 'A' + 10; |
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else if (v >= 'a' && v <= 'f') |
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return v - 'a' + 10; |
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else
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return 0; |
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} |
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static inline int tohex(int v) |
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{ |
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if (v < 10) |
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return v + '0'; |
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else
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return v - 10 + 'a'; |
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} |
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static void memtohex(char *buf, const uint8_t *mem, int len) |
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{ |
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int i, c;
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char *q;
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q = buf; |
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for(i = 0; i < len; i++) { |
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c = mem[i]; |
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*q++ = tohex(c >> 4);
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*q++ = tohex(c & 0xf);
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} |
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*q = '\0';
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} |
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static void hextomem(uint8_t *mem, const char *buf, int len) |
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{ |
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int i;
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for(i = 0; i < len; i++) { |
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mem[i] = (fromhex(buf[0]) << 4) | fromhex(buf[1]); |
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buf += 2;
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} |
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} |
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/* return -1 if error, 0 if OK */
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static int put_packet(GDBState *s, char *buf) |
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{ |
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int len, csum, i;
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char *p;
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#ifdef DEBUG_GDB
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printf("reply='%s'\n", buf);
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#endif
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for(;;) {
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p = s->last_packet; |
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*(p++) = '$';
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len = strlen(buf); |
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memcpy(p, buf, len); |
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p += len; |
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csum = 0;
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for(i = 0; i < len; i++) { |
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csum += buf[i]; |
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} |
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*(p++) = '#';
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*(p++) = tohex((csum >> 4) & 0xf); |
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*(p++) = tohex((csum) & 0xf);
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s->last_packet_len = p - s->last_packet; |
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put_buffer(s, s->last_packet, s->last_packet_len); |
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#ifdef CONFIG_USER_ONLY
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i = get_char(s); |
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if (i < 0) |
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return -1; |
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if (i == '+') |
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break;
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#else
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break;
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#endif
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} |
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return 0; |
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} |
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#if defined(TARGET_I386)
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static int cpu_gdb_read_registers(CPUState *env, uint8_t *mem_buf) |
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{ |
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int i, fpus;
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uint32_t *registers = (uint32_t *)mem_buf; |
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#ifdef TARGET_X86_64
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/* This corresponds with amd64_register_info[] in gdb/amd64-tdep.c */
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uint64_t *registers64 = (uint64_t *)mem_buf; |
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if (env->hflags & HF_CS64_MASK) {
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registers64[0] = tswap64(env->regs[R_EAX]);
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registers64[1] = tswap64(env->regs[R_EBX]);
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registers64[2] = tswap64(env->regs[R_ECX]);
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registers64[3] = tswap64(env->regs[R_EDX]);
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registers64[4] = tswap64(env->regs[R_ESI]);
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registers64[5] = tswap64(env->regs[R_EDI]);
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registers64[6] = tswap64(env->regs[R_EBP]);
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registers64[7] = tswap64(env->regs[R_ESP]);
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for(i = 8; i < 16; i++) { |
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registers64[i] = tswap64(env->regs[i]); |
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} |
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registers64[16] = tswap64(env->eip);
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registers = (uint32_t *)®isters64[17];
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registers[0] = tswap32(env->eflags);
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registers[1] = tswap32(env->segs[R_CS].selector);
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registers[2] = tswap32(env->segs[R_SS].selector);
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registers[3] = tswap32(env->segs[R_DS].selector);
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registers[4] = tswap32(env->segs[R_ES].selector);
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registers[5] = tswap32(env->segs[R_FS].selector);
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registers[6] = tswap32(env->segs[R_GS].selector);
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/* XXX: convert floats */
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for(i = 0; i < 8; i++) { |
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memcpy(mem_buf + 16 * 8 + 7 * 4 + i * 10, &env->fpregs[i], 10); |
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} |
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registers[27] = tswap32(env->fpuc); /* fctrl */ |
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fpus = (env->fpus & ~0x3800) | (env->fpstt & 0x7) << 11; |
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registers[28] = tswap32(fpus); /* fstat */ |
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registers[29] = 0; /* ftag */ |
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registers[30] = 0; /* fiseg */ |
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registers[31] = 0; /* fioff */ |
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registers[32] = 0; /* foseg */ |
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registers[33] = 0; /* fooff */ |
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registers[34] = 0; /* fop */ |
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for(i = 0; i < 16; i++) { |
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memcpy(mem_buf + 16 * 8 + 35 * 4 + i * 16, &env->xmm_regs[i], 16); |
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} |
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registers[99] = tswap32(env->mxcsr);
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return 8 * 17 + 4 * 7 + 10 * 8 + 4 * 8 + 16 * 16 + 4; |
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} |
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#endif
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for(i = 0; i < 8; i++) { |
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registers[i] = env->regs[i]; |
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} |
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registers[8] = env->eip;
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registers[9] = env->eflags;
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registers[10] = env->segs[R_CS].selector;
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registers[11] = env->segs[R_SS].selector;
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registers[12] = env->segs[R_DS].selector;
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registers[13] = env->segs[R_ES].selector;
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registers[14] = env->segs[R_FS].selector;
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registers[15] = env->segs[R_GS].selector;
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/* XXX: convert floats */
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for(i = 0; i < 8; i++) { |
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memcpy(mem_buf + 16 * 4 + i * 10, &env->fpregs[i], 10); |
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} |
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registers[36] = env->fpuc;
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fpus = (env->fpus & ~0x3800) | (env->fpstt & 0x7) << 11; |
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registers[37] = fpus;
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registers[38] = 0; /* XXX: convert tags */ |
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registers[39] = 0; /* fiseg */ |
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registers[40] = 0; /* fioff */ |
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registers[41] = 0; /* foseg */ |
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registers[42] = 0; /* fooff */ |
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registers[43] = 0; /* fop */ |
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for(i = 0; i < 16; i++) |
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tswapls(®isters[i]); |
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for(i = 36; i < 44; i++) |
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tswapls(®isters[i]); |
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return 44 * 4; |
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} |
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static void cpu_gdb_write_registers(CPUState *env, uint8_t *mem_buf, int size) |
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{ |
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uint32_t *registers = (uint32_t *)mem_buf; |
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int i;
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for(i = 0; i < 8; i++) { |
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env->regs[i] = tswapl(registers[i]); |
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} |
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env->eip = tswapl(registers[8]);
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env->eflags = tswapl(registers[9]);
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#if defined(CONFIG_USER_ONLY)
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#define LOAD_SEG(index, sreg)\
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if (tswapl(registers[index]) != env->segs[sreg].selector)\
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cpu_x86_load_seg(env, sreg, tswapl(registers[index])); |
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LOAD_SEG(10, R_CS);
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LOAD_SEG(11, R_SS);
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LOAD_SEG(12, R_DS);
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LOAD_SEG(13, R_ES);
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LOAD_SEG(14, R_FS);
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LOAD_SEG(15, R_GS);
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#endif
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} |
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#elif defined (TARGET_PPC)
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static int cpu_gdb_read_registers(CPUState *env, uint8_t *mem_buf) |
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{ |
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uint32_t *registers = (uint32_t *)mem_buf, tmp; |
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int i;
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/* fill in gprs */
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for(i = 0; i < 32; i++) { |
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registers[i] = tswapl(env->gpr[i]); |
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} |
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/* fill in fprs */
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for (i = 0; i < 32; i++) { |
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registers[(i * 2) + 32] = tswapl(*((uint32_t *)&env->fpr[i])); |
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registers[(i * 2) + 33] = tswapl(*((uint32_t *)&env->fpr[i] + 1)); |
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} |
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/* nip, msr, ccr, lnk, ctr, xer, mq */
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registers[96] = tswapl(env->nip);
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registers[97] = tswapl(env->msr);
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tmp = 0;
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for (i = 0; i < 8; i++) |
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tmp |= env->crf[i] << (32 - ((i + 1) * 4)); |
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registers[98] = tswapl(tmp);
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registers[99] = tswapl(env->lr);
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registers[100] = tswapl(env->ctr);
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registers[101] = tswapl(ppc_load_xer(env));
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registers[102] = 0; |
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return 103 * 4; |
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} |
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static void cpu_gdb_write_registers(CPUState *env, uint8_t *mem_buf, int size) |
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{ |
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uint32_t *registers = (uint32_t *)mem_buf; |
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int i;
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/* fill in gprs */
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for (i = 0; i < 32; i++) { |
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env->gpr[i] = tswapl(registers[i]); |
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} |
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/* fill in fprs */
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for (i = 0; i < 32; i++) { |
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*((uint32_t *)&env->fpr[i]) = tswapl(registers[(i * 2) + 32]); |
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*((uint32_t *)&env->fpr[i] + 1) = tswapl(registers[(i * 2) + 33]); |
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} |
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/* nip, msr, ccr, lnk, ctr, xer, mq */
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env->nip = tswapl(registers[96]);
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ppc_store_msr(env, tswapl(registers[97]));
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registers[98] = tswapl(registers[98]); |
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for (i = 0; i < 8; i++) |
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env->crf[i] = (registers[98] >> (32 - ((i + 1) * 4))) & 0xF; |
384 |
env->lr = tswapl(registers[99]);
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env->ctr = tswapl(registers[100]);
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ppc_store_xer(env, tswapl(registers[101]));
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} |
388 |
#elif defined (TARGET_SPARC)
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static int cpu_gdb_read_registers(CPUState *env, uint8_t *mem_buf) |
390 |
{ |
391 |
target_ulong *registers = (target_ulong *)mem_buf; |
392 |
int i;
|
393 |
|
394 |
/* fill in g0..g7 */
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395 |
for(i = 0; i < 8; i++) { |
396 |
registers[i] = tswapl(env->gregs[i]); |
397 |
} |
398 |
/* fill in register window */
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399 |
for(i = 0; i < 24; i++) { |
400 |
registers[i + 8] = tswapl(env->regwptr[i]);
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} |
402 |
#ifndef TARGET_SPARC64
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403 |
/* fill in fprs */
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for (i = 0; i < 32; i++) { |
405 |
registers[i + 32] = tswapl(*((uint32_t *)&env->fpr[i]));
|
406 |
} |
407 |
/* Y, PSR, WIM, TBR, PC, NPC, FPSR, CPSR */
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408 |
registers[64] = tswapl(env->y);
|
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{ |
410 |
target_ulong tmp; |
411 |
|
412 |
tmp = GET_PSR(env); |
413 |
registers[65] = tswapl(tmp);
|
414 |
} |
415 |
registers[66] = tswapl(env->wim);
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416 |
registers[67] = tswapl(env->tbr);
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417 |
registers[68] = tswapl(env->pc);
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418 |
registers[69] = tswapl(env->npc);
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419 |
registers[70] = tswapl(env->fsr);
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420 |
registers[71] = 0; /* csr */ |
421 |
registers[72] = 0; |
422 |
return 73 * sizeof(target_ulong); |
423 |
#else
|
424 |
/* fill in fprs */
|
425 |
for (i = 0; i < 64; i += 2) { |
426 |
uint64_t tmp; |
427 |
|
428 |
tmp = ((uint64_t)*(uint32_t *)&env->fpr[i]) << 32;
|
429 |
tmp |= *(uint32_t *)&env->fpr[i + 1];
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430 |
registers[i / 2 + 32] = tswap64(tmp); |
431 |
} |
432 |
registers[64] = tswapl(env->pc);
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433 |
registers[65] = tswapl(env->npc);
|
434 |
registers[66] = tswapl(((uint64_t)GET_CCR(env) << 32) | |
435 |
((env->asi & 0xff) << 24) | |
436 |
((env->pstate & 0xfff) << 8) | |
437 |
GET_CWP64(env)); |
438 |
registers[67] = tswapl(env->fsr);
|
439 |
registers[68] = tswapl(env->fprs);
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440 |
registers[69] = tswapl(env->y);
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return 70 * sizeof(target_ulong); |
442 |
#endif
|
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} |
444 |
|
445 |
static void cpu_gdb_write_registers(CPUState *env, uint8_t *mem_buf, int size) |
446 |
{ |
447 |
target_ulong *registers = (target_ulong *)mem_buf; |
448 |
int i;
|
449 |
|
450 |
/* fill in g0..g7 */
|
451 |
for(i = 0; i < 7; i++) { |
452 |
env->gregs[i] = tswapl(registers[i]); |
453 |
} |
454 |
/* fill in register window */
|
455 |
for(i = 0; i < 24; i++) { |
456 |
env->regwptr[i] = tswapl(registers[i + 8]);
|
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} |
458 |
#ifndef TARGET_SPARC64
|
459 |
/* fill in fprs */
|
460 |
for (i = 0; i < 32; i++) { |
461 |
*((uint32_t *)&env->fpr[i]) = tswapl(registers[i + 32]);
|
462 |
} |
463 |
/* Y, PSR, WIM, TBR, PC, NPC, FPSR, CPSR */
|
464 |
env->y = tswapl(registers[64]);
|
465 |
PUT_PSR(env, tswapl(registers[65]));
|
466 |
env->wim = tswapl(registers[66]);
|
467 |
env->tbr = tswapl(registers[67]);
|
468 |
env->pc = tswapl(registers[68]);
|
469 |
env->npc = tswapl(registers[69]);
|
470 |
env->fsr = tswapl(registers[70]);
|
471 |
#else
|
472 |
for (i = 0; i < 64; i += 2) { |
473 |
uint64_t tmp; |
474 |
|
475 |
tmp = tswap64(registers[i / 2 + 32]); |
476 |
*((uint32_t *)&env->fpr[i]) = tmp >> 32;
|
477 |
*((uint32_t *)&env->fpr[i + 1]) = tmp & 0xffffffff; |
478 |
} |
479 |
env->pc = tswapl(registers[64]);
|
480 |
env->npc = tswapl(registers[65]);
|
481 |
{ |
482 |
uint64_t tmp = tswapl(registers[66]);
|
483 |
|
484 |
PUT_CCR(env, tmp >> 32);
|
485 |
env->asi = (tmp >> 24) & 0xff; |
486 |
env->pstate = (tmp >> 8) & 0xfff; |
487 |
PUT_CWP64(env, tmp & 0xff);
|
488 |
} |
489 |
env->fsr = tswapl(registers[67]);
|
490 |
env->fprs = tswapl(registers[68]);
|
491 |
env->y = tswapl(registers[69]);
|
492 |
#endif
|
493 |
} |
494 |
#elif defined (TARGET_ARM)
|
495 |
static int cpu_gdb_read_registers(CPUState *env, uint8_t *mem_buf) |
496 |
{ |
497 |
int i;
|
498 |
uint8_t *ptr; |
499 |
|
500 |
ptr = mem_buf; |
501 |
/* 16 core integer registers (4 bytes each). */
|
502 |
for (i = 0; i < 16; i++) |
503 |
{ |
504 |
*(uint32_t *)ptr = tswapl(env->regs[i]); |
505 |
ptr += 4;
|
506 |
} |
507 |
/* 8 FPA registers (12 bytes each), FPS (4 bytes).
|
508 |
Not yet implemented. */
|
509 |
memset (ptr, 0, 8 * 12 + 4); |
510 |
ptr += 8 * 12 + 4; |
511 |
/* CPSR (4 bytes). */
|
512 |
*(uint32_t *)ptr = tswapl (cpsr_read(env)); |
513 |
ptr += 4;
|
514 |
|
515 |
return ptr - mem_buf;
|
516 |
} |
517 |
|
518 |
static void cpu_gdb_write_registers(CPUState *env, uint8_t *mem_buf, int size) |
519 |
{ |
520 |
int i;
|
521 |
uint8_t *ptr; |
522 |
|
523 |
ptr = mem_buf; |
524 |
/* Core integer registers. */
|
525 |
for (i = 0; i < 16; i++) |
526 |
{ |
527 |
env->regs[i] = tswapl(*(uint32_t *)ptr); |
528 |
ptr += 4;
|
529 |
} |
530 |
/* Ignore FPA regs and scr. */
|
531 |
ptr += 8 * 12 + 4; |
532 |
cpsr_write (env, tswapl(*(uint32_t *)ptr), 0xffffffff);
|
533 |
} |
534 |
#elif defined (TARGET_M68K)
|
535 |
static int cpu_gdb_read_registers(CPUState *env, uint8_t *mem_buf) |
536 |
{ |
537 |
int i;
|
538 |
uint8_t *ptr; |
539 |
CPU_DoubleU u; |
540 |
|
541 |
ptr = mem_buf; |
542 |
/* D0-D7 */
|
543 |
for (i = 0; i < 8; i++) { |
544 |
*(uint32_t *)ptr = tswapl(env->dregs[i]); |
545 |
ptr += 4;
|
546 |
} |
547 |
/* A0-A7 */
|
548 |
for (i = 0; i < 8; i++) { |
549 |
*(uint32_t *)ptr = tswapl(env->aregs[i]); |
550 |
ptr += 4;
|
551 |
} |
552 |
*(uint32_t *)ptr = tswapl(env->sr); |
553 |
ptr += 4;
|
554 |
*(uint32_t *)ptr = tswapl(env->pc); |
555 |
ptr += 4;
|
556 |
/* F0-F7. The 68881/68040 have 12-bit extended precision registers.
|
557 |
ColdFire has 8-bit double precision registers. */
|
558 |
for (i = 0; i < 8; i++) { |
559 |
u.d = env->fregs[i]; |
560 |
*(uint32_t *)ptr = tswap32(u.l.upper); |
561 |
*(uint32_t *)ptr = tswap32(u.l.lower); |
562 |
} |
563 |
/* FP control regs (not implemented). */
|
564 |
memset (ptr, 0, 3 * 4); |
565 |
ptr += 3 * 4; |
566 |
|
567 |
return ptr - mem_buf;
|
568 |
} |
569 |
|
570 |
static void cpu_gdb_write_registers(CPUState *env, uint8_t *mem_buf, int size) |
571 |
{ |
572 |
int i;
|
573 |
uint8_t *ptr; |
574 |
CPU_DoubleU u; |
575 |
|
576 |
ptr = mem_buf; |
577 |
/* D0-D7 */
|
578 |
for (i = 0; i < 8; i++) { |
579 |
env->dregs[i] = tswapl(*(uint32_t *)ptr); |
580 |
ptr += 4;
|
581 |
} |
582 |
/* A0-A7 */
|
583 |
for (i = 0; i < 8; i++) { |
584 |
env->aregs[i] = tswapl(*(uint32_t *)ptr); |
585 |
ptr += 4;
|
586 |
} |
587 |
env->sr = tswapl(*(uint32_t *)ptr); |
588 |
ptr += 4;
|
589 |
env->pc = tswapl(*(uint32_t *)ptr); |
590 |
ptr += 4;
|
591 |
/* F0-F7. The 68881/68040 have 12-bit extended precision registers.
|
592 |
ColdFire has 8-bit double precision registers. */
|
593 |
for (i = 0; i < 8; i++) { |
594 |
u.l.upper = tswap32(*(uint32_t *)ptr); |
595 |
u.l.lower = tswap32(*(uint32_t *)ptr); |
596 |
env->fregs[i] = u.d; |
597 |
} |
598 |
/* FP control regs (not implemented). */
|
599 |
ptr += 3 * 4; |
600 |
} |
601 |
#elif defined (TARGET_MIPS)
|
602 |
static int cpu_gdb_read_registers(CPUState *env, uint8_t *mem_buf) |
603 |
{ |
604 |
int i;
|
605 |
uint8_t *ptr; |
606 |
|
607 |
ptr = mem_buf; |
608 |
for (i = 0; i < 32; i++) |
609 |
{ |
610 |
*(target_ulong *)ptr = tswapl(env->gpr[i][env->current_tc]); |
611 |
ptr += sizeof(target_ulong);
|
612 |
} |
613 |
|
614 |
*(target_ulong *)ptr = (int32_t)tswap32(env->CP0_Status); |
615 |
ptr += sizeof(target_ulong);
|
616 |
|
617 |
*(target_ulong *)ptr = tswapl(env->LO[0][env->current_tc]);
|
618 |
ptr += sizeof(target_ulong);
|
619 |
|
620 |
*(target_ulong *)ptr = tswapl(env->HI[0][env->current_tc]);
|
621 |
ptr += sizeof(target_ulong);
|
622 |
|
623 |
*(target_ulong *)ptr = tswapl(env->CP0_BadVAddr); |
624 |
ptr += sizeof(target_ulong);
|
625 |
|
626 |
*(target_ulong *)ptr = (int32_t)tswap32(env->CP0_Cause); |
627 |
ptr += sizeof(target_ulong);
|
628 |
|
629 |
*(target_ulong *)ptr = tswapl(env->PC[env->current_tc]); |
630 |
ptr += sizeof(target_ulong);
|
631 |
|
632 |
if (env->CP0_Config1 & (1 << CP0C1_FP)) |
633 |
{ |
634 |
for (i = 0; i < 32; i++) |
635 |
{ |
636 |
if (env->CP0_Status & (1 << CP0St_FR)) |
637 |
*(target_ulong *)ptr = tswapl(env->fpu->fpr[i].d); |
638 |
else
|
639 |
*(target_ulong *)ptr = tswap32(env->fpu->fpr[i].w[FP_ENDIAN_IDX]); |
640 |
ptr += sizeof(target_ulong);
|
641 |
} |
642 |
|
643 |
*(target_ulong *)ptr = (int32_t)tswap32(env->fpu->fcr31); |
644 |
ptr += sizeof(target_ulong);
|
645 |
|
646 |
*(target_ulong *)ptr = (int32_t)tswap32(env->fpu->fcr0); |
647 |
ptr += sizeof(target_ulong);
|
648 |
} |
649 |
|
650 |
/* "fp", pseudo frame pointer. Not yet implemented in gdb. */
|
651 |
*(target_ulong *)ptr = 0;
|
652 |
ptr += sizeof(target_ulong);
|
653 |
|
654 |
/* Registers for embedded use, we just pad them. */
|
655 |
for (i = 0; i < 16; i++) |
656 |
{ |
657 |
*(target_ulong *)ptr = 0;
|
658 |
ptr += sizeof(target_ulong);
|
659 |
} |
660 |
|
661 |
/* Processor ID. */
|
662 |
*(target_ulong *)ptr = (int32_t)tswap32(env->CP0_PRid); |
663 |
ptr += sizeof(target_ulong);
|
664 |
|
665 |
return ptr - mem_buf;
|
666 |
} |
667 |
|
668 |
/* convert MIPS rounding mode in FCR31 to IEEE library */
|
669 |
static unsigned int ieee_rm[] = |
670 |
{ |
671 |
float_round_nearest_even, |
672 |
float_round_to_zero, |
673 |
float_round_up, |
674 |
float_round_down |
675 |
}; |
676 |
#define RESTORE_ROUNDING_MODE \
|
677 |
set_float_rounding_mode(ieee_rm[env->fpu->fcr31 & 3], &env->fpu->fp_status)
|
678 |
|
679 |
static void cpu_gdb_write_registers(CPUState *env, uint8_t *mem_buf, int size) |
680 |
{ |
681 |
int i;
|
682 |
uint8_t *ptr; |
683 |
|
684 |
ptr = mem_buf; |
685 |
for (i = 0; i < 32; i++) |
686 |
{ |
687 |
env->gpr[i][env->current_tc] = tswapl(*(target_ulong *)ptr); |
688 |
ptr += sizeof(target_ulong);
|
689 |
} |
690 |
|
691 |
env->CP0_Status = tswapl(*(target_ulong *)ptr); |
692 |
ptr += sizeof(target_ulong);
|
693 |
|
694 |
env->LO[0][env->current_tc] = tswapl(*(target_ulong *)ptr);
|
695 |
ptr += sizeof(target_ulong);
|
696 |
|
697 |
env->HI[0][env->current_tc] = tswapl(*(target_ulong *)ptr);
|
698 |
ptr += sizeof(target_ulong);
|
699 |
|
700 |
env->CP0_BadVAddr = tswapl(*(target_ulong *)ptr); |
701 |
ptr += sizeof(target_ulong);
|
702 |
|
703 |
env->CP0_Cause = tswapl(*(target_ulong *)ptr); |
704 |
ptr += sizeof(target_ulong);
|
705 |
|
706 |
env->PC[env->current_tc] = tswapl(*(target_ulong *)ptr); |
707 |
ptr += sizeof(target_ulong);
|
708 |
|
709 |
if (env->CP0_Config1 & (1 << CP0C1_FP)) |
710 |
{ |
711 |
for (i = 0; i < 32; i++) |
712 |
{ |
713 |
if (env->CP0_Status & (1 << CP0St_FR)) |
714 |
env->fpu->fpr[i].d = tswapl(*(target_ulong *)ptr); |
715 |
else
|
716 |
env->fpu->fpr[i].w[FP_ENDIAN_IDX] = tswapl(*(target_ulong *)ptr); |
717 |
ptr += sizeof(target_ulong);
|
718 |
} |
719 |
|
720 |
env->fpu->fcr31 = tswapl(*(target_ulong *)ptr) & 0xFF83FFFF;
|
721 |
ptr += sizeof(target_ulong);
|
722 |
|
723 |
/* The remaining registers are assumed to be read-only. */
|
724 |
|
725 |
/* set rounding mode */
|
726 |
RESTORE_ROUNDING_MODE; |
727 |
|
728 |
#ifndef CONFIG_SOFTFLOAT
|
729 |
/* no floating point exception for native float */
|
730 |
SET_FP_ENABLE(env->fcr31, 0);
|
731 |
#endif
|
732 |
} |
733 |
} |
734 |
#elif defined (TARGET_SH4)
|
735 |
|
736 |
/* Hint: Use "set architecture sh4" in GDB to see fpu registers */
|
737 |
|
738 |
static int cpu_gdb_read_registers(CPUState *env, uint8_t *mem_buf) |
739 |
{ |
740 |
uint32_t *ptr = (uint32_t *)mem_buf; |
741 |
int i;
|
742 |
|
743 |
#define SAVE(x) *ptr++=tswapl(x)
|
744 |
if ((env->sr & (SR_MD | SR_RB)) == (SR_MD | SR_RB)) {
|
745 |
for (i = 0; i < 8; i++) SAVE(env->gregs[i + 16]); |
746 |
} else {
|
747 |
for (i = 0; i < 8; i++) SAVE(env->gregs[i]); |
748 |
} |
749 |
for (i = 8; i < 16; i++) SAVE(env->gregs[i]); |
750 |
SAVE (env->pc); |
751 |
SAVE (env->pr); |
752 |
SAVE (env->gbr); |
753 |
SAVE (env->vbr); |
754 |
SAVE (env->mach); |
755 |
SAVE (env->macl); |
756 |
SAVE (env->sr); |
757 |
SAVE (env->fpul); |
758 |
SAVE (env->fpscr); |
759 |
for (i = 0; i < 16; i++) |
760 |
SAVE(env->fregs[i + ((env->fpscr & FPSCR_FR) ? 16 : 0)]); |
761 |
SAVE (env->ssr); |
762 |
SAVE (env->spc); |
763 |
for (i = 0; i < 8; i++) SAVE(env->gregs[i]); |
764 |
for (i = 0; i < 8; i++) SAVE(env->gregs[i + 16]); |
765 |
return ((uint8_t *)ptr - mem_buf);
|
766 |
} |
767 |
|
768 |
static void cpu_gdb_write_registers(CPUState *env, uint8_t *mem_buf, int size) |
769 |
{ |
770 |
uint32_t *ptr = (uint32_t *)mem_buf; |
771 |
int i;
|
772 |
|
773 |
#define LOAD(x) (x)=*ptr++;
|
774 |
if ((env->sr & (SR_MD | SR_RB)) == (SR_MD | SR_RB)) {
|
775 |
for (i = 0; i < 8; i++) LOAD(env->gregs[i + 16]); |
776 |
} else {
|
777 |
for (i = 0; i < 8; i++) LOAD(env->gregs[i]); |
778 |
} |
779 |
for (i = 8; i < 16; i++) LOAD(env->gregs[i]); |
780 |
LOAD (env->pc); |
781 |
LOAD (env->pr); |
782 |
LOAD (env->gbr); |
783 |
LOAD (env->vbr); |
784 |
LOAD (env->mach); |
785 |
LOAD (env->macl); |
786 |
LOAD (env->sr); |
787 |
LOAD (env->fpul); |
788 |
LOAD (env->fpscr); |
789 |
for (i = 0; i < 16; i++) |
790 |
LOAD(env->fregs[i + ((env->fpscr & FPSCR_FR) ? 16 : 0)]); |
791 |
LOAD (env->ssr); |
792 |
LOAD (env->spc); |
793 |
for (i = 0; i < 8; i++) LOAD(env->gregs[i]); |
794 |
for (i = 0; i < 8; i++) LOAD(env->gregs[i + 16]); |
795 |
} |
796 |
#elif defined (TARGET_CRIS)
|
797 |
|
798 |
static int cris_save_32 (unsigned char *d, uint32_t value) |
799 |
{ |
800 |
*d++ = (value); |
801 |
*d++ = (value >>= 8);
|
802 |
*d++ = (value >>= 8);
|
803 |
*d++ = (value >>= 8);
|
804 |
return 4; |
805 |
} |
806 |
static int cris_save_16 (unsigned char *d, uint32_t value) |
807 |
{ |
808 |
*d++ = (value); |
809 |
*d++ = (value >>= 8);
|
810 |
return 2; |
811 |
} |
812 |
static int cris_save_8 (unsigned char *d, uint32_t value) |
813 |
{ |
814 |
*d++ = (value); |
815 |
return 1; |
816 |
} |
817 |
|
818 |
/* FIXME: this will bug on archs not supporting unaligned word accesses. */
|
819 |
static int cpu_gdb_read_registers(CPUState *env, uint8_t *mem_buf) |
820 |
{ |
821 |
uint8_t *ptr = mem_buf; |
822 |
uint8_t srs; |
823 |
int i;
|
824 |
|
825 |
for (i = 0; i < 16; i++) |
826 |
ptr += cris_save_32 (ptr, env->regs[i]); |
827 |
|
828 |
srs = env->pregs[SR_SRS]; |
829 |
|
830 |
ptr += cris_save_8 (ptr, env->pregs[0]);
|
831 |
ptr += cris_save_8 (ptr, env->pregs[1]);
|
832 |
ptr += cris_save_32 (ptr, env->pregs[2]);
|
833 |
ptr += cris_save_8 (ptr, srs); |
834 |
ptr += cris_save_16 (ptr, env->pregs[4]);
|
835 |
|
836 |
for (i = 5; i < 16; i++) |
837 |
ptr += cris_save_32 (ptr, env->pregs[i]); |
838 |
|
839 |
ptr += cris_save_32 (ptr, env->pc); |
840 |
|
841 |
for (i = 0; i < 16; i++) |
842 |
ptr += cris_save_32 (ptr, env->sregs[srs][i]); |
843 |
|
844 |
return ((uint8_t *)ptr - mem_buf);
|
845 |
} |
846 |
|
847 |
static void cpu_gdb_write_registers(CPUState *env, uint8_t *mem_buf, int size) |
848 |
{ |
849 |
uint32_t *ptr = (uint32_t *)mem_buf; |
850 |
int i;
|
851 |
|
852 |
#define LOAD(x) (x)=*ptr++;
|
853 |
for (i = 0; i < 16; i++) LOAD(env->regs[i]); |
854 |
LOAD (env->pc); |
855 |
} |
856 |
#else
|
857 |
static int cpu_gdb_read_registers(CPUState *env, uint8_t *mem_buf) |
858 |
{ |
859 |
return 0; |
860 |
} |
861 |
|
862 |
static void cpu_gdb_write_registers(CPUState *env, uint8_t *mem_buf, int size) |
863 |
{ |
864 |
} |
865 |
|
866 |
#endif
|
867 |
|
868 |
static int gdb_handle_packet(GDBState *s, CPUState *env, const char *line_buf) |
869 |
{ |
870 |
const char *p; |
871 |
int ch, reg_size, type;
|
872 |
char buf[4096]; |
873 |
uint8_t mem_buf[4096];
|
874 |
uint32_t *registers; |
875 |
target_ulong addr, len; |
876 |
|
877 |
#ifdef DEBUG_GDB
|
878 |
printf("command='%s'\n", line_buf);
|
879 |
#endif
|
880 |
p = line_buf; |
881 |
ch = *p++; |
882 |
switch(ch) {
|
883 |
case '?': |
884 |
/* TODO: Make this return the correct value for user-mode. */
|
885 |
snprintf(buf, sizeof(buf), "S%02x", SIGTRAP); |
886 |
put_packet(s, buf); |
887 |
break;
|
888 |
case 'c': |
889 |
if (*p != '\0') { |
890 |
addr = strtoull(p, (char **)&p, 16); |
891 |
#if defined(TARGET_I386)
|
892 |
env->eip = addr; |
893 |
#elif defined (TARGET_PPC)
|
894 |
env->nip = addr; |
895 |
#elif defined (TARGET_SPARC)
|
896 |
env->pc = addr; |
897 |
env->npc = addr + 4;
|
898 |
#elif defined (TARGET_ARM)
|
899 |
env->regs[15] = addr;
|
900 |
#elif defined (TARGET_SH4)
|
901 |
env->pc = addr; |
902 |
#elif defined (TARGET_MIPS)
|
903 |
env->PC[env->current_tc] = addr; |
904 |
#elif defined (TARGET_CRIS)
|
905 |
env->pc = addr; |
906 |
#endif
|
907 |
} |
908 |
#ifdef CONFIG_USER_ONLY
|
909 |
s->running_state = 1;
|
910 |
#else
|
911 |
vm_start(); |
912 |
#endif
|
913 |
return RS_IDLE;
|
914 |
case 's': |
915 |
if (*p != '\0') { |
916 |
addr = strtoull(p, (char **)&p, 16); |
917 |
#if defined(TARGET_I386)
|
918 |
env->eip = addr; |
919 |
#elif defined (TARGET_PPC)
|
920 |
env->nip = addr; |
921 |
#elif defined (TARGET_SPARC)
|
922 |
env->pc = addr; |
923 |
env->npc = addr + 4;
|
924 |
#elif defined (TARGET_ARM)
|
925 |
env->regs[15] = addr;
|
926 |
#elif defined (TARGET_SH4)
|
927 |
env->pc = addr; |
928 |
#elif defined (TARGET_MIPS)
|
929 |
env->PC[env->current_tc] = addr; |
930 |
#elif defined (TARGET_CRIS)
|
931 |
env->pc = addr; |
932 |
#endif
|
933 |
} |
934 |
cpu_single_step(env, 1);
|
935 |
#ifdef CONFIG_USER_ONLY
|
936 |
s->running_state = 1;
|
937 |
#else
|
938 |
vm_start(); |
939 |
#endif
|
940 |
return RS_IDLE;
|
941 |
case 'F': |
942 |
{ |
943 |
target_ulong ret; |
944 |
target_ulong err; |
945 |
|
946 |
ret = strtoull(p, (char **)&p, 16); |
947 |
if (*p == ',') { |
948 |
p++; |
949 |
err = strtoull(p, (char **)&p, 16); |
950 |
} else {
|
951 |
err = 0;
|
952 |
} |
953 |
if (*p == ',') |
954 |
p++; |
955 |
type = *p; |
956 |
if (gdb_current_syscall_cb)
|
957 |
gdb_current_syscall_cb(s->env, ret, err); |
958 |
if (type == 'C') { |
959 |
put_packet(s, "T02");
|
960 |
} else {
|
961 |
#ifdef CONFIG_USER_ONLY
|
962 |
s->running_state = 1;
|
963 |
#else
|
964 |
vm_start(); |
965 |
#endif
|
966 |
} |
967 |
} |
968 |
break;
|
969 |
case 'g': |
970 |
reg_size = cpu_gdb_read_registers(env, mem_buf); |
971 |
memtohex(buf, mem_buf, reg_size); |
972 |
put_packet(s, buf); |
973 |
break;
|
974 |
case 'G': |
975 |
registers = (void *)mem_buf;
|
976 |
len = strlen(p) / 2;
|
977 |
hextomem((uint8_t *)registers, p, len); |
978 |
cpu_gdb_write_registers(env, mem_buf, len); |
979 |
put_packet(s, "OK");
|
980 |
break;
|
981 |
case 'm': |
982 |
addr = strtoull(p, (char **)&p, 16); |
983 |
if (*p == ',') |
984 |
p++; |
985 |
len = strtoull(p, NULL, 16); |
986 |
if (cpu_memory_rw_debug(env, addr, mem_buf, len, 0) != 0) { |
987 |
put_packet (s, "E14");
|
988 |
} else {
|
989 |
memtohex(buf, mem_buf, len); |
990 |
put_packet(s, buf); |
991 |
} |
992 |
break;
|
993 |
case 'M': |
994 |
addr = strtoull(p, (char **)&p, 16); |
995 |
if (*p == ',') |
996 |
p++; |
997 |
len = strtoull(p, (char **)&p, 16); |
998 |
if (*p == ':') |
999 |
p++; |
1000 |
hextomem(mem_buf, p, len); |
1001 |
if (cpu_memory_rw_debug(env, addr, mem_buf, len, 1) != 0) |
1002 |
put_packet(s, "E14");
|
1003 |
else
|
1004 |
put_packet(s, "OK");
|
1005 |
break;
|
1006 |
case 'Z': |
1007 |
type = strtoul(p, (char **)&p, 16); |
1008 |
if (*p == ',') |
1009 |
p++; |
1010 |
addr = strtoull(p, (char **)&p, 16); |
1011 |
if (*p == ',') |
1012 |
p++; |
1013 |
len = strtoull(p, (char **)&p, 16); |
1014 |
if (type == 0 || type == 1) { |
1015 |
if (cpu_breakpoint_insert(env, addr) < 0) |
1016 |
goto breakpoint_error;
|
1017 |
put_packet(s, "OK");
|
1018 |
#ifndef CONFIG_USER_ONLY
|
1019 |
} else if (type == 2) { |
1020 |
if (cpu_watchpoint_insert(env, addr) < 0) |
1021 |
goto breakpoint_error;
|
1022 |
put_packet(s, "OK");
|
1023 |
#endif
|
1024 |
} else {
|
1025 |
breakpoint_error:
|
1026 |
put_packet(s, "E22");
|
1027 |
} |
1028 |
break;
|
1029 |
case 'z': |
1030 |
type = strtoul(p, (char **)&p, 16); |
1031 |
if (*p == ',') |
1032 |
p++; |
1033 |
addr = strtoull(p, (char **)&p, 16); |
1034 |
if (*p == ',') |
1035 |
p++; |
1036 |
len = strtoull(p, (char **)&p, 16); |
1037 |
if (type == 0 || type == 1) { |
1038 |
cpu_breakpoint_remove(env, addr); |
1039 |
put_packet(s, "OK");
|
1040 |
#ifndef CONFIG_USER_ONLY
|
1041 |
} else if (type == 2) { |
1042 |
cpu_watchpoint_remove(env, addr); |
1043 |
put_packet(s, "OK");
|
1044 |
#endif
|
1045 |
} else {
|
1046 |
goto breakpoint_error;
|
1047 |
} |
1048 |
break;
|
1049 |
#ifdef CONFIG_LINUX_USER
|
1050 |
case 'q': |
1051 |
if (strncmp(p, "Offsets", 7) == 0) { |
1052 |
TaskState *ts = env->opaque; |
1053 |
|
1054 |
sprintf(buf, |
1055 |
"Text=" TARGET_FMT_lx ";Data=" TARGET_FMT_lx ";Bss=" TARGET_FMT_lx, |
1056 |
ts->info->code_offset, |
1057 |
ts->info->data_offset, |
1058 |
ts->info->data_offset); |
1059 |
put_packet(s, buf); |
1060 |
break;
|
1061 |
} |
1062 |
/* Fall through. */
|
1063 |
#endif
|
1064 |
default:
|
1065 |
// unknown_command:
|
1066 |
/* put empty packet */
|
1067 |
buf[0] = '\0'; |
1068 |
put_packet(s, buf); |
1069 |
break;
|
1070 |
} |
1071 |
return RS_IDLE;
|
1072 |
} |
1073 |
|
1074 |
extern void tb_flush(CPUState *env); |
1075 |
|
1076 |
#ifndef CONFIG_USER_ONLY
|
1077 |
static void gdb_vm_stopped(void *opaque, int reason) |
1078 |
{ |
1079 |
GDBState *s = opaque; |
1080 |
char buf[256]; |
1081 |
int ret;
|
1082 |
|
1083 |
if (s->state == RS_SYSCALL)
|
1084 |
return;
|
1085 |
|
1086 |
/* disable single step if it was enable */
|
1087 |
cpu_single_step(s->env, 0);
|
1088 |
|
1089 |
if (reason == EXCP_DEBUG) {
|
1090 |
if (s->env->watchpoint_hit) {
|
1091 |
snprintf(buf, sizeof(buf), "T%02xwatch:" TARGET_FMT_lx ";", |
1092 |
SIGTRAP, |
1093 |
s->env->watchpoint[s->env->watchpoint_hit - 1].vaddr);
|
1094 |
put_packet(s, buf); |
1095 |
s->env->watchpoint_hit = 0;
|
1096 |
return;
|
1097 |
} |
1098 |
tb_flush(s->env); |
1099 |
ret = SIGTRAP; |
1100 |
} else if (reason == EXCP_INTERRUPT) { |
1101 |
ret = SIGINT; |
1102 |
} else {
|
1103 |
ret = 0;
|
1104 |
} |
1105 |
snprintf(buf, sizeof(buf), "S%02x", ret); |
1106 |
put_packet(s, buf); |
1107 |
} |
1108 |
#endif
|
1109 |
|
1110 |
/* Send a gdb syscall request.
|
1111 |
This accepts limited printf-style format specifiers, specifically:
|
1112 |
%x - target_ulong argument printed in hex.
|
1113 |
%lx - 64-bit argument printed in hex.
|
1114 |
%s - string pointer (target_ulong) and length (int) pair. */
|
1115 |
void gdb_do_syscall(gdb_syscall_complete_cb cb, char *fmt, ...) |
1116 |
{ |
1117 |
va_list va; |
1118 |
char buf[256]; |
1119 |
char *p;
|
1120 |
target_ulong addr; |
1121 |
uint64_t i64; |
1122 |
GDBState *s; |
1123 |
|
1124 |
s = gdb_syscall_state; |
1125 |
if (!s)
|
1126 |
return;
|
1127 |
gdb_current_syscall_cb = cb; |
1128 |
s->state = RS_SYSCALL; |
1129 |
#ifndef CONFIG_USER_ONLY
|
1130 |
vm_stop(EXCP_DEBUG); |
1131 |
#endif
|
1132 |
s->state = RS_IDLE; |
1133 |
va_start(va, fmt); |
1134 |
p = buf; |
1135 |
*(p++) = 'F';
|
1136 |
while (*fmt) {
|
1137 |
if (*fmt == '%') { |
1138 |
fmt++; |
1139 |
switch (*fmt++) {
|
1140 |
case 'x': |
1141 |
addr = va_arg(va, target_ulong); |
1142 |
p += sprintf(p, TARGET_FMT_lx, addr); |
1143 |
break;
|
1144 |
case 'l': |
1145 |
if (*(fmt++) != 'x') |
1146 |
goto bad_format;
|
1147 |
i64 = va_arg(va, uint64_t); |
1148 |
p += sprintf(p, "%" PRIx64, i64);
|
1149 |
break;
|
1150 |
case 's': |
1151 |
addr = va_arg(va, target_ulong); |
1152 |
p += sprintf(p, TARGET_FMT_lx "/%x", addr, va_arg(va, int)); |
1153 |
break;
|
1154 |
default:
|
1155 |
bad_format:
|
1156 |
fprintf(stderr, "gdbstub: Bad syscall format string '%s'\n",
|
1157 |
fmt - 1);
|
1158 |
break;
|
1159 |
} |
1160 |
} else {
|
1161 |
*(p++) = *(fmt++); |
1162 |
} |
1163 |
} |
1164 |
*p = 0;
|
1165 |
va_end(va); |
1166 |
put_packet(s, buf); |
1167 |
#ifdef CONFIG_USER_ONLY
|
1168 |
gdb_handlesig(s->env, 0);
|
1169 |
#else
|
1170 |
cpu_interrupt(s->env, CPU_INTERRUPT_EXIT); |
1171 |
#endif
|
1172 |
} |
1173 |
|
1174 |
static void gdb_read_byte(GDBState *s, int ch) |
1175 |
{ |
1176 |
CPUState *env = s->env; |
1177 |
int i, csum;
|
1178 |
char reply[1]; |
1179 |
|
1180 |
#ifndef CONFIG_USER_ONLY
|
1181 |
if (s->last_packet_len) {
|
1182 |
/* Waiting for a response to the last packet. If we see the start
|
1183 |
of a new command then abandon the previous response. */
|
1184 |
if (ch == '-') { |
1185 |
#ifdef DEBUG_GDB
|
1186 |
printf("Got NACK, retransmitting\n");
|
1187 |
#endif
|
1188 |
put_buffer(s, s->last_packet, s->last_packet_len); |
1189 |
} |
1190 |
#ifdef DEBUG_GDB
|
1191 |
else if (ch == '+') |
1192 |
printf("Got ACK\n");
|
1193 |
else
|
1194 |
printf("Got '%c' when expecting ACK/NACK\n", ch);
|
1195 |
#endif
|
1196 |
if (ch == '+' || ch == '$') |
1197 |
s->last_packet_len = 0;
|
1198 |
if (ch != '$') |
1199 |
return;
|
1200 |
} |
1201 |
if (vm_running) {
|
1202 |
/* when the CPU is running, we cannot do anything except stop
|
1203 |
it when receiving a char */
|
1204 |
vm_stop(EXCP_INTERRUPT); |
1205 |
} else
|
1206 |
#endif
|
1207 |
{ |
1208 |
switch(s->state) {
|
1209 |
case RS_IDLE:
|
1210 |
if (ch == '$') { |
1211 |
s->line_buf_index = 0;
|
1212 |
s->state = RS_GETLINE; |
1213 |
} |
1214 |
break;
|
1215 |
case RS_GETLINE:
|
1216 |
if (ch == '#') { |
1217 |
s->state = RS_CHKSUM1; |
1218 |
} else if (s->line_buf_index >= sizeof(s->line_buf) - 1) { |
1219 |
s->state = RS_IDLE; |
1220 |
} else {
|
1221 |
s->line_buf[s->line_buf_index++] = ch; |
1222 |
} |
1223 |
break;
|
1224 |
case RS_CHKSUM1:
|
1225 |
s->line_buf[s->line_buf_index] = '\0';
|
1226 |
s->line_csum = fromhex(ch) << 4;
|
1227 |
s->state = RS_CHKSUM2; |
1228 |
break;
|
1229 |
case RS_CHKSUM2:
|
1230 |
s->line_csum |= fromhex(ch); |
1231 |
csum = 0;
|
1232 |
for(i = 0; i < s->line_buf_index; i++) { |
1233 |
csum += s->line_buf[i]; |
1234 |
} |
1235 |
if (s->line_csum != (csum & 0xff)) { |
1236 |
reply[0] = '-'; |
1237 |
put_buffer(s, reply, 1);
|
1238 |
s->state = RS_IDLE; |
1239 |
} else {
|
1240 |
reply[0] = '+'; |
1241 |
put_buffer(s, reply, 1);
|
1242 |
s->state = gdb_handle_packet(s, env, s->line_buf); |
1243 |
} |
1244 |
break;
|
1245 |
default:
|
1246 |
abort(); |
1247 |
} |
1248 |
} |
1249 |
} |
1250 |
|
1251 |
#ifdef CONFIG_USER_ONLY
|
1252 |
int
|
1253 |
gdb_handlesig (CPUState *env, int sig)
|
1254 |
{ |
1255 |
GDBState *s; |
1256 |
char buf[256]; |
1257 |
int n;
|
1258 |
|
1259 |
if (gdbserver_fd < 0) |
1260 |
return sig;
|
1261 |
|
1262 |
s = &gdbserver_state; |
1263 |
|
1264 |
/* disable single step if it was enabled */
|
1265 |
cpu_single_step(env, 0);
|
1266 |
tb_flush(env); |
1267 |
|
1268 |
if (sig != 0) |
1269 |
{ |
1270 |
snprintf(buf, sizeof(buf), "S%02x", sig); |
1271 |
put_packet(s, buf); |
1272 |
} |
1273 |
|
1274 |
sig = 0;
|
1275 |
s->state = RS_IDLE; |
1276 |
s->running_state = 0;
|
1277 |
while (s->running_state == 0) { |
1278 |
n = read (s->fd, buf, 256);
|
1279 |
if (n > 0) |
1280 |
{ |
1281 |
int i;
|
1282 |
|
1283 |
for (i = 0; i < n; i++) |
1284 |
gdb_read_byte (s, buf[i]); |
1285 |
} |
1286 |
else if (n == 0 || errno != EAGAIN) |
1287 |
{ |
1288 |
/* XXX: Connection closed. Should probably wait for annother
|
1289 |
connection before continuing. */
|
1290 |
return sig;
|
1291 |
} |
1292 |
} |
1293 |
return sig;
|
1294 |
} |
1295 |
|
1296 |
/* Tell the remote gdb that the process has exited. */
|
1297 |
void gdb_exit(CPUState *env, int code) |
1298 |
{ |
1299 |
GDBState *s; |
1300 |
char buf[4]; |
1301 |
|
1302 |
if (gdbserver_fd < 0) |
1303 |
return;
|
1304 |
|
1305 |
s = &gdbserver_state; |
1306 |
|
1307 |
snprintf(buf, sizeof(buf), "W%02x", code); |
1308 |
put_packet(s, buf); |
1309 |
} |
1310 |
|
1311 |
|
1312 |
static void gdb_accept(void *opaque) |
1313 |
{ |
1314 |
GDBState *s; |
1315 |
struct sockaddr_in sockaddr;
|
1316 |
socklen_t len; |
1317 |
int val, fd;
|
1318 |
|
1319 |
for(;;) {
|
1320 |
len = sizeof(sockaddr);
|
1321 |
fd = accept(gdbserver_fd, (struct sockaddr *)&sockaddr, &len);
|
1322 |
if (fd < 0 && errno != EINTR) { |
1323 |
perror("accept");
|
1324 |
return;
|
1325 |
} else if (fd >= 0) { |
1326 |
break;
|
1327 |
} |
1328 |
} |
1329 |
|
1330 |
/* set short latency */
|
1331 |
val = 1;
|
1332 |
setsockopt(fd, IPPROTO_TCP, TCP_NODELAY, (char *)&val, sizeof(val)); |
1333 |
|
1334 |
s = &gdbserver_state; |
1335 |
memset (s, 0, sizeof (GDBState)); |
1336 |
s->env = first_cpu; /* XXX: allow to change CPU */
|
1337 |
s->fd = fd; |
1338 |
|
1339 |
gdb_syscall_state = s; |
1340 |
|
1341 |
fcntl(fd, F_SETFL, O_NONBLOCK); |
1342 |
} |
1343 |
|
1344 |
static int gdbserver_open(int port) |
1345 |
{ |
1346 |
struct sockaddr_in sockaddr;
|
1347 |
int fd, val, ret;
|
1348 |
|
1349 |
fd = socket(PF_INET, SOCK_STREAM, 0);
|
1350 |
if (fd < 0) { |
1351 |
perror("socket");
|
1352 |
return -1; |
1353 |
} |
1354 |
|
1355 |
/* allow fast reuse */
|
1356 |
val = 1;
|
1357 |
setsockopt(fd, SOL_SOCKET, SO_REUSEADDR, (char *)&val, sizeof(val)); |
1358 |
|
1359 |
sockaddr.sin_family = AF_INET; |
1360 |
sockaddr.sin_port = htons(port); |
1361 |
sockaddr.sin_addr.s_addr = 0;
|
1362 |
ret = bind(fd, (struct sockaddr *)&sockaddr, sizeof(sockaddr)); |
1363 |
if (ret < 0) { |
1364 |
perror("bind");
|
1365 |
return -1; |
1366 |
} |
1367 |
ret = listen(fd, 0);
|
1368 |
if (ret < 0) { |
1369 |
perror("listen");
|
1370 |
return -1; |
1371 |
} |
1372 |
return fd;
|
1373 |
} |
1374 |
|
1375 |
int gdbserver_start(int port) |
1376 |
{ |
1377 |
gdbserver_fd = gdbserver_open(port); |
1378 |
if (gdbserver_fd < 0) |
1379 |
return -1; |
1380 |
/* accept connections */
|
1381 |
gdb_accept (NULL);
|
1382 |
return 0; |
1383 |
} |
1384 |
#else
|
1385 |
static int gdb_chr_can_receive(void *opaque) |
1386 |
{ |
1387 |
return 1; |
1388 |
} |
1389 |
|
1390 |
static void gdb_chr_receive(void *opaque, const uint8_t *buf, int size) |
1391 |
{ |
1392 |
GDBState *s = opaque; |
1393 |
int i;
|
1394 |
|
1395 |
for (i = 0; i < size; i++) { |
1396 |
gdb_read_byte(s, buf[i]); |
1397 |
} |
1398 |
} |
1399 |
|
1400 |
static void gdb_chr_event(void *opaque, int event) |
1401 |
{ |
1402 |
switch (event) {
|
1403 |
case CHR_EVENT_RESET:
|
1404 |
vm_stop(EXCP_INTERRUPT); |
1405 |
gdb_syscall_state = opaque; |
1406 |
break;
|
1407 |
default:
|
1408 |
break;
|
1409 |
} |
1410 |
} |
1411 |
|
1412 |
int gdbserver_start(const char *port) |
1413 |
{ |
1414 |
GDBState *s; |
1415 |
char gdbstub_port_name[128]; |
1416 |
int port_num;
|
1417 |
char *p;
|
1418 |
CharDriverState *chr; |
1419 |
|
1420 |
if (!port || !*port)
|
1421 |
return -1; |
1422 |
|
1423 |
port_num = strtol(port, &p, 10);
|
1424 |
if (*p == 0) { |
1425 |
/* A numeric value is interpreted as a port number. */
|
1426 |
snprintf(gdbstub_port_name, sizeof(gdbstub_port_name),
|
1427 |
"tcp::%d,nowait,nodelay,server", port_num);
|
1428 |
port = gdbstub_port_name; |
1429 |
} |
1430 |
|
1431 |
chr = qemu_chr_open(port); |
1432 |
if (!chr)
|
1433 |
return -1; |
1434 |
|
1435 |
s = qemu_mallocz(sizeof(GDBState));
|
1436 |
if (!s) {
|
1437 |
return -1; |
1438 |
} |
1439 |
s->env = first_cpu; /* XXX: allow to change CPU */
|
1440 |
s->chr = chr; |
1441 |
qemu_chr_add_handlers(chr, gdb_chr_can_receive, gdb_chr_receive, |
1442 |
gdb_chr_event, s); |
1443 |
qemu_add_vm_stop_handler(gdb_vm_stopped, s); |
1444 |
return 0; |
1445 |
} |
1446 |
#endif
|