Revision 5845f0e5
| b/hw/lsi53c895a.c | ||
|---|---|---|
| 2120 | 2120 |
/* PCI base class code */ |
| 2121 | 2121 |
pci_config_set_class(pci_conf, PCI_CLASS_STORAGE_SCSI); |
| 2122 | 2122 |
/* PCI subsystem ID */ |
| 2123 |
pci_conf[0x2e] = 0x00;
|
|
| 2124 |
pci_conf[0x2f] = 0x10;
|
|
| 2123 |
pci_conf[PCI_SUBSYSTEM_ID] = 0x00;
|
|
| 2124 |
pci_conf[PCI_SUBSYSTEM_ID + 1] = 0x10;
|
|
| 2125 | 2125 |
/* PCI latency timer = 255 */ |
| 2126 |
pci_conf[0x0d] = 0xff; |
|
| 2126 |
pci_conf[PCI_LATENCY_TIMER] = 0xff; |
|
| 2127 |
/* TODO: RST# value should be 0 */ |
|
| 2127 | 2128 |
/* Interrupt pin 1 */ |
| 2128 |
pci_conf[0x3d] = 0x01;
|
|
| 2129 |
pci_conf[PCI_INTERRUPT_PIN] = 0x01;
|
|
| 2129 | 2130 |
|
| 2130 | 2131 |
s->mmio_io_addr = cpu_register_io_memory(lsi_mmio_readfn, |
| 2131 | 2132 |
lsi_mmio_writefn, s); |
| 2132 | 2133 |
s->ram_io_addr = cpu_register_io_memory(lsi_ram_readfn, |
| 2133 | 2134 |
lsi_ram_writefn, s); |
| 2134 | 2135 |
|
| 2136 |
/* TODO: use dev and get rid of cast below */ |
|
| 2135 | 2137 |
pci_register_bar((struct PCIDevice *)s, 0, 256, |
| 2136 | 2138 |
PCI_BASE_ADDRESS_SPACE_IO, lsi_io_mapfunc); |
| 2137 | 2139 |
pci_register_bar((struct PCIDevice *)s, 1, 0x400, |
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