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/*
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 *  ARM micro operations
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 * 
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 *  Copyright (c) 2003 Fabrice Bellard
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 *  Copyright (c) 2005 CodeSourcery, LLC
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 *
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 * This library is free software; you can redistribute it and/or
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 * modify it under the terms of the GNU Lesser General Public
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 * License as published by the Free Software Foundation; either
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 * version 2 of the License, or (at your option) any later version.
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 *
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 * This library is distributed in the hope that it will be useful,
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 * but WITHOUT ANY WARRANTY; without even the implied warranty of
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 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
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 * Lesser General Public License for more details.
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 *
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 * You should have received a copy of the GNU Lesser General Public
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 * License along with this library; if not, write to the Free Software
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 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA  02111-1307  USA
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 */
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#include "exec.h"
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#define REGNAME r0
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#define REG (env->regs[0])
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#include "op_template.h"
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#define REGNAME r1
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#define REG (env->regs[1])
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#include "op_template.h"
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#define REGNAME r2
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#define REG (env->regs[2])
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#include "op_template.h"
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#define REGNAME r3
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#define REG (env->regs[3])
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#include "op_template.h"
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#define REGNAME r4
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#define REG (env->regs[4])
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#include "op_template.h"
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#define REGNAME r5
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#define REG (env->regs[5])
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#include "op_template.h"
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#define REGNAME r6
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#define REG (env->regs[6])
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#include "op_template.h"
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#define REGNAME r7
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#define REG (env->regs[7])
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#include "op_template.h"
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#define REGNAME r8
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#define REG (env->regs[8])
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#include "op_template.h"
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#define REGNAME r9
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#define REG (env->regs[9])
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#include "op_template.h"
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#define REGNAME r10
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#define REG (env->regs[10])
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#include "op_template.h"
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#define REGNAME r11
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#define REG (env->regs[11])
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#include "op_template.h"
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#define REGNAME r12
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#define REG (env->regs[12])
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#include "op_template.h"
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#define REGNAME r13
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#define REG (env->regs[13])
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#include "op_template.h"
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#define REGNAME r14
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#define REG (env->regs[14])
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#include "op_template.h"
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#define REGNAME r15
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#define REG (env->regs[15])
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#define SET_REG(x) REG = x & ~(uint32_t)1
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#include "op_template.h"
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void OPPROTO op_bx_T0(void)
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{
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  env->regs[15] = T0 & ~(uint32_t)1;
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  env->thumb = (T0 & 1) != 0;
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}
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void OPPROTO op_movl_T0_0(void)
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{
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    T0 = 0;
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}
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void OPPROTO op_movl_T0_im(void)
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{
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    T0 = PARAM1;
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}
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void OPPROTO op_movl_T1_im(void)
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{
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    T1 = PARAM1;
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}
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void OPPROTO op_mov_CF_T1(void)
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{
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    env->CF = ((uint32_t)T1) >> 31;
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}
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void OPPROTO op_movl_T2_im(void)
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{
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    T2 = PARAM1;
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}
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void OPPROTO op_addl_T1_im(void)
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{
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    T1 += PARAM1;
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}
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void OPPROTO op_addl_T1_T2(void)
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{
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    T1 += T2;
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}
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void OPPROTO op_subl_T1_T2(void)
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{
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    T1 -= T2;
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}
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void OPPROTO op_addl_T0_T1(void)
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{
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    T0 += T1;
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}
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void OPPROTO op_addl_T0_T1_cc(void)
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{
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    unsigned int src1;
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    src1 = T0;
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    T0 += T1;
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    env->NZF = T0;
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    env->CF = T0 < src1;
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    env->VF = (src1 ^ T1 ^ -1) & (src1 ^ T0);
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}
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void OPPROTO op_adcl_T0_T1(void)
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{
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    T0 += T1 + env->CF;
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}
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void OPPROTO op_adcl_T0_T1_cc(void)
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{
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    unsigned int src1;
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    src1 = T0;
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    if (!env->CF) {
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        T0 += T1;
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        env->CF = T0 < src1;
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    } else {
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        T0 += T1 + 1;
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        env->CF = T0 <= src1;
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    }
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    env->VF = (src1 ^ T1 ^ -1) & (src1 ^ T0);
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    env->NZF = T0;
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    FORCE_RET();
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}
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#define OPSUB(sub, sbc, res, T0, T1)            \
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                                                \
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void OPPROTO op_ ## sub ## l_T0_T1(void)        \
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{                                               \
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    res = T0 - T1;                              \
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}                                               \
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                                                \
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void OPPROTO op_ ## sub ## l_T0_T1_cc(void)     \
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{                                               \
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    unsigned int src1;                          \
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    src1 = T0;                                  \
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    T0 -= T1;                                   \
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    env->NZF = T0;                              \
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    env->CF = src1 >= T1;                       \
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    env->VF = (src1 ^ T1) & (src1 ^ T0);        \
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    res = T0;                                   \
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}                                               \
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                                                \
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void OPPROTO op_ ## sbc ## l_T0_T1(void)        \
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{                                               \
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    res = T0 - T1 + env->CF - 1;                \
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}                                               \
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                                                \
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void OPPROTO op_ ## sbc ## l_T0_T1_cc(void)     \
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{                                               \
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    unsigned int src1;                          \
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    src1 = T0;                                  \
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    if (!env->CF) {                             \
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        T0 = T0 - T1 - 1;                       \
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        env->CF = src1 > T1;                    \
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    } else {                                    \
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        T0 = T0 - T1;                           \
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        env->CF = src1 >= T1;                   \
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    }                                           \
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    env->VF = (src1 ^ T1) & (src1 ^ T0);        \
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    env->NZF = T0;                              \
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    res = T0;                                   \
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    FORCE_RET();                                \
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}
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OPSUB(sub, sbc, T0, T0, T1)
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OPSUB(rsb, rsc, T0, T1, T0)
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void OPPROTO op_andl_T0_T1(void)
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{
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    T0 &= T1;
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}
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void OPPROTO op_xorl_T0_T1(void)
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{
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    T0 ^= T1;
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}
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void OPPROTO op_orl_T0_T1(void)
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{
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    T0 |= T1;
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}
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void OPPROTO op_bicl_T0_T1(void)
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{
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    T0 &= ~T1;
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}
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void OPPROTO op_notl_T1(void)
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{
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    T1 = ~T1;
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}
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void OPPROTO op_logic_T0_cc(void)
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{
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    env->NZF = T0;
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}
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void OPPROTO op_logic_T1_cc(void)
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{
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    env->NZF = T1;
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}
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#define EIP (env->regs[15])
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void OPPROTO op_test_eq(void)
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{
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    if (env->NZF == 0)
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        GOTO_LABEL_PARAM(1);;
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    FORCE_RET();
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}
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void OPPROTO op_test_ne(void)
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{
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    if (env->NZF != 0)
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        GOTO_LABEL_PARAM(1);;
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    FORCE_RET();
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}
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void OPPROTO op_test_cs(void)
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{
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    if (env->CF != 0)
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        GOTO_LABEL_PARAM(1);
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    FORCE_RET();
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}
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void OPPROTO op_test_cc(void)
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{
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    if (env->CF == 0)
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        GOTO_LABEL_PARAM(1);
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    FORCE_RET();
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}
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void OPPROTO op_test_mi(void)
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{
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    if ((env->NZF & 0x80000000) != 0)
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        GOTO_LABEL_PARAM(1);
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    FORCE_RET();
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}
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void OPPROTO op_test_pl(void)
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{
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    if ((env->NZF & 0x80000000) == 0)
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        GOTO_LABEL_PARAM(1);
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    FORCE_RET();
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}
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void OPPROTO op_test_vs(void)
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{
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    if ((env->VF & 0x80000000) != 0)
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        GOTO_LABEL_PARAM(1);
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    FORCE_RET();
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}
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void OPPROTO op_test_vc(void)
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{
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    if ((env->VF & 0x80000000) == 0)
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        GOTO_LABEL_PARAM(1);
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    FORCE_RET();
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}
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void OPPROTO op_test_hi(void)
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{
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    if (env->CF != 0 && env->NZF != 0)
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        GOTO_LABEL_PARAM(1);
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    FORCE_RET();
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}
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void OPPROTO op_test_ls(void)
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{
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    if (env->CF == 0 || env->NZF == 0)
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        GOTO_LABEL_PARAM(1);
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    FORCE_RET();
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}
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void OPPROTO op_test_ge(void)
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{
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    if (((env->VF ^ env->NZF) & 0x80000000) == 0)
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        GOTO_LABEL_PARAM(1);
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    FORCE_RET();
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}
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void OPPROTO op_test_lt(void)
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{
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    if (((env->VF ^ env->NZF) & 0x80000000) != 0)
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        GOTO_LABEL_PARAM(1);
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    FORCE_RET();
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}
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void OPPROTO op_test_gt(void)
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{
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    if (env->NZF != 0 && ((env->VF ^ env->NZF) & 0x80000000) == 0)
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        GOTO_LABEL_PARAM(1);
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    FORCE_RET();
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}
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void OPPROTO op_test_le(void)
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{
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    if (env->NZF == 0 || ((env->VF ^ env->NZF) & 0x80000000) != 0)
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        GOTO_LABEL_PARAM(1);
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    FORCE_RET();
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}
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void OPPROTO op_jmp0(void)
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{
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    JUMP_TB(op_jmp0, PARAM1, 0, PARAM2);
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}
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void OPPROTO op_jmp1(void)
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{
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    JUMP_TB(op_jmp1, PARAM1, 1, PARAM2);
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}
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void OPPROTO op_exit_tb(void)
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{
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    EXIT_TB();
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}
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void OPPROTO op_movl_T0_psr(void)
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{
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    T0 = compute_cpsr();
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}
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/* NOTE: N = 1 and Z = 1 cannot be stored currently */
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void OPPROTO op_movl_psr_T0(void)
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{
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    unsigned int psr;
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    psr = T0;
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    env->CF = (psr >> 29) & 1;
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    env->NZF = (psr & 0xc0000000) ^ 0x40000000;
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    env->VF = (psr << 3) & 0x80000000;
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    /* for user mode we do not update other state info */
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}
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void OPPROTO op_mul_T0_T1(void)
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{
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    T0 = T0 * T1;
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}
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/* 64 bit unsigned mul */
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void OPPROTO op_mull_T0_T1(void)
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{
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    uint64_t res;
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    res = (uint64_t)T0 * (uint64_t)T1;
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    T1 = res >> 32;
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    T0 = res;
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}
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/* 64 bit signed mul */
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void OPPROTO op_imull_T0_T1(void)
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{
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    uint64_t res;
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    res = (int64_t)((int32_t)T0) * (int64_t)((int32_t)T1);
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    T1 = res >> 32;
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    T0 = res;
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}
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/* 48 bit signed mul, top 32 bits */
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void OPPROTO op_imulw_T0_T1(void)
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{
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  uint64_t res;
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  res = (int64_t)((int32_t)T0) * (int64_t)((int32_t)T1);
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  T0 = res >> 16;
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}
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void OPPROTO op_addq_T0_T1(void)
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{
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    uint64_t res;
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    res = ((uint64_t)T1 << 32) | T0;
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    res += ((uint64_t)(env->regs[PARAM2]) << 32) | (env->regs[PARAM1]);
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    T1 = res >> 32;
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    T0 = res;
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}
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void OPPROTO op_addq_lo_T0_T1(void)
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{
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    uint64_t res;
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    res = ((uint64_t)T1 << 32) | T0;
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    res += (uint64_t)(env->regs[PARAM1]);
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    T1 = res >> 32;
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    T0 = res;
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}
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void OPPROTO op_logicq_cc(void)
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{
431 2c0262af bellard
    env->NZF = (T1 & 0x80000000) | ((T0 | T1) != 0);
432 2c0262af bellard
}
433 2c0262af bellard
434 2c0262af bellard
/* memory access */
435 2c0262af bellard
436 2c0262af bellard
void OPPROTO op_ldub_T0_T1(void)
437 2c0262af bellard
{
438 2c0262af bellard
    T0 = ldub((void *)T1);
439 2c0262af bellard
}
440 2c0262af bellard
441 2c0262af bellard
void OPPROTO op_ldsb_T0_T1(void)
442 2c0262af bellard
{
443 2c0262af bellard
    T0 = ldsb((void *)T1);
444 2c0262af bellard
}
445 2c0262af bellard
446 2c0262af bellard
void OPPROTO op_lduw_T0_T1(void)
447 2c0262af bellard
{
448 2c0262af bellard
    T0 = lduw((void *)T1);
449 2c0262af bellard
}
450 2c0262af bellard
451 2c0262af bellard
void OPPROTO op_ldsw_T0_T1(void)
452 2c0262af bellard
{
453 2c0262af bellard
    T0 = ldsw((void *)T1);
454 2c0262af bellard
}
455 2c0262af bellard
456 2c0262af bellard
void OPPROTO op_ldl_T0_T1(void)
457 2c0262af bellard
{
458 2c0262af bellard
    T0 = ldl((void *)T1);
459 2c0262af bellard
}
460 2c0262af bellard
461 2c0262af bellard
void OPPROTO op_stb_T0_T1(void)
462 2c0262af bellard
{
463 2c0262af bellard
    stb((void *)T1, T0);
464 2c0262af bellard
}
465 2c0262af bellard
466 2c0262af bellard
void OPPROTO op_stw_T0_T1(void)
467 2c0262af bellard
{
468 2c0262af bellard
    stw((void *)T1, T0);
469 2c0262af bellard
}
470 2c0262af bellard
471 2c0262af bellard
void OPPROTO op_stl_T0_T1(void)
472 2c0262af bellard
{
473 2c0262af bellard
    stl((void *)T1, T0);
474 2c0262af bellard
}
475 2c0262af bellard
476 2c0262af bellard
void OPPROTO op_swpb_T0_T1(void)
477 2c0262af bellard
{
478 2c0262af bellard
    int tmp;
479 2c0262af bellard
480 2c0262af bellard
    cpu_lock();
481 2c0262af bellard
    tmp = ldub((void *)T1);
482 2c0262af bellard
    stb((void *)T1, T0);
483 2c0262af bellard
    T0 = tmp;
484 2c0262af bellard
    cpu_unlock();
485 2c0262af bellard
}
486 2c0262af bellard
487 2c0262af bellard
void OPPROTO op_swpl_T0_T1(void)
488 2c0262af bellard
{
489 2c0262af bellard
    int tmp;
490 2c0262af bellard
491 2c0262af bellard
    cpu_lock();
492 2c0262af bellard
    tmp = ldl((void *)T1);
493 2c0262af bellard
    stl((void *)T1, T0);
494 2c0262af bellard
    T0 = tmp;
495 2c0262af bellard
    cpu_unlock();
496 2c0262af bellard
}
497 2c0262af bellard
498 2c0262af bellard
/* shifts */
499 2c0262af bellard
500 2c0262af bellard
/* T1 based */
501 1e8d4eec bellard
502 2c0262af bellard
void OPPROTO op_shll_T1_im(void)
503 2c0262af bellard
{
504 2c0262af bellard
    T1 = T1 << PARAM1;
505 2c0262af bellard
}
506 2c0262af bellard
507 2c0262af bellard
void OPPROTO op_shrl_T1_im(void)
508 2c0262af bellard
{
509 2c0262af bellard
    T1 = (uint32_t)T1 >> PARAM1;
510 2c0262af bellard
}
511 2c0262af bellard
512 1e8d4eec bellard
void OPPROTO op_shrl_T1_0(void)
513 1e8d4eec bellard
{
514 1e8d4eec bellard
    T1 = 0;
515 1e8d4eec bellard
}
516 1e8d4eec bellard
517 2c0262af bellard
void OPPROTO op_sarl_T1_im(void)
518 2c0262af bellard
{
519 2c0262af bellard
    T1 = (int32_t)T1 >> PARAM1;
520 2c0262af bellard
}
521 2c0262af bellard
522 1e8d4eec bellard
void OPPROTO op_sarl_T1_0(void)
523 1e8d4eec bellard
{
524 1e8d4eec bellard
    T1 = (int32_t)T1 >> 31;
525 1e8d4eec bellard
}
526 1e8d4eec bellard
527 2c0262af bellard
void OPPROTO op_rorl_T1_im(void)
528 2c0262af bellard
{
529 2c0262af bellard
    int shift;
530 2c0262af bellard
    shift = PARAM1;
531 2c0262af bellard
    T1 = ((uint32_t)T1 >> shift) | (T1 << (32 - shift));
532 2c0262af bellard
}
533 2c0262af bellard
534 88920f34 bellard
void OPPROTO op_rrxl_T1(void)
535 88920f34 bellard
{
536 88920f34 bellard
    T1 = ((uint32_t)T1 >> 1) | ((uint32_t)env->CF << 31);
537 88920f34 bellard
}
538 88920f34 bellard
539 2c0262af bellard
/* T1 based, set C flag */
540 2c0262af bellard
void OPPROTO op_shll_T1_im_cc(void)
541 2c0262af bellard
{
542 2c0262af bellard
    env->CF = (T1 >> (32 - PARAM1)) & 1;
543 2c0262af bellard
    T1 = T1 << PARAM1;
544 2c0262af bellard
}
545 2c0262af bellard
546 2c0262af bellard
void OPPROTO op_shrl_T1_im_cc(void)
547 2c0262af bellard
{
548 2c0262af bellard
    env->CF = (T1 >> (PARAM1 - 1)) & 1;
549 2c0262af bellard
    T1 = (uint32_t)T1 >> PARAM1;
550 2c0262af bellard
}
551 2c0262af bellard
552 1e8d4eec bellard
void OPPROTO op_shrl_T1_0_cc(void)
553 1e8d4eec bellard
{
554 1e8d4eec bellard
    env->CF = (T1 >> 31) & 1;
555 1e8d4eec bellard
    T1 = 0;
556 1e8d4eec bellard
}
557 1e8d4eec bellard
558 2c0262af bellard
void OPPROTO op_sarl_T1_im_cc(void)
559 2c0262af bellard
{
560 2c0262af bellard
    env->CF = (T1 >> (PARAM1 - 1)) & 1;
561 2c0262af bellard
    T1 = (int32_t)T1 >> PARAM1;
562 2c0262af bellard
}
563 2c0262af bellard
564 1e8d4eec bellard
void OPPROTO op_sarl_T1_0_cc(void)
565 1e8d4eec bellard
{
566 1e8d4eec bellard
    env->CF = (T1 >> 31) & 1;
567 1e8d4eec bellard
    T1 = (int32_t)T1 >> 31;
568 1e8d4eec bellard
}
569 1e8d4eec bellard
570 2c0262af bellard
void OPPROTO op_rorl_T1_im_cc(void)
571 2c0262af bellard
{
572 2c0262af bellard
    int shift;
573 2c0262af bellard
    shift = PARAM1;
574 2c0262af bellard
    env->CF = (T1 >> (shift - 1)) & 1;
575 2c0262af bellard
    T1 = ((uint32_t)T1 >> shift) | (T1 << (32 - shift));
576 2c0262af bellard
}
577 2c0262af bellard
578 88920f34 bellard
void OPPROTO op_rrxl_T1_cc(void)
579 88920f34 bellard
{
580 88920f34 bellard
    uint32_t c;
581 88920f34 bellard
    c = T1 & 1;
582 88920f34 bellard
    T1 = ((uint32_t)T1 >> 1) | ((uint32_t)env->CF << 31);
583 88920f34 bellard
    env->CF = c;
584 88920f34 bellard
}
585 88920f34 bellard
586 2c0262af bellard
/* T2 based */
587 2c0262af bellard
void OPPROTO op_shll_T2_im(void)
588 2c0262af bellard
{
589 2c0262af bellard
    T2 = T2 << PARAM1;
590 2c0262af bellard
}
591 2c0262af bellard
592 2c0262af bellard
void OPPROTO op_shrl_T2_im(void)
593 2c0262af bellard
{
594 2c0262af bellard
    T2 = (uint32_t)T2 >> PARAM1;
595 2c0262af bellard
}
596 2c0262af bellard
597 1e8d4eec bellard
void OPPROTO op_shrl_T2_0(void)
598 1e8d4eec bellard
{
599 1e8d4eec bellard
    T2 = 0;
600 1e8d4eec bellard
}
601 1e8d4eec bellard
602 2c0262af bellard
void OPPROTO op_sarl_T2_im(void)
603 2c0262af bellard
{
604 2c0262af bellard
    T2 = (int32_t)T2 >> PARAM1;
605 2c0262af bellard
}
606 2c0262af bellard
607 1e8d4eec bellard
void OPPROTO op_sarl_T2_0(void)
608 1e8d4eec bellard
{
609 1e8d4eec bellard
    T2 = (int32_t)T2 >> 31;
610 1e8d4eec bellard
}
611 1e8d4eec bellard
612 2c0262af bellard
void OPPROTO op_rorl_T2_im(void)
613 2c0262af bellard
{
614 2c0262af bellard
    int shift;
615 2c0262af bellard
    shift = PARAM1;
616 2c0262af bellard
    T2 = ((uint32_t)T2 >> shift) | (T2 << (32 - shift));
617 2c0262af bellard
}
618 2c0262af bellard
619 1e8d4eec bellard
void OPPROTO op_rrxl_T2(void)
620 1e8d4eec bellard
{
621 1e8d4eec bellard
    T2 = ((uint32_t)T2 >> 1) | ((uint32_t)env->CF << 31);
622 1e8d4eec bellard
}
623 1e8d4eec bellard
624 2c0262af bellard
/* T1 based, use T0 as shift count */
625 2c0262af bellard
626 2c0262af bellard
void OPPROTO op_shll_T1_T0(void)
627 2c0262af bellard
{
628 2c0262af bellard
    int shift;
629 2c0262af bellard
    shift = T0 & 0xff;
630 2c0262af bellard
    if (shift >= 32)
631 2c0262af bellard
        T1 = 0;
632 2c0262af bellard
    else
633 2c0262af bellard
        T1 = T1 << shift;
634 2c0262af bellard
    FORCE_RET();
635 2c0262af bellard
}
636 2c0262af bellard
637 2c0262af bellard
void OPPROTO op_shrl_T1_T0(void)
638 2c0262af bellard
{
639 2c0262af bellard
    int shift;
640 2c0262af bellard
    shift = T0 & 0xff;
641 2c0262af bellard
    if (shift >= 32)
642 2c0262af bellard
        T1 = 0;
643 2c0262af bellard
    else
644 2c0262af bellard
        T1 = (uint32_t)T1 >> shift;
645 2c0262af bellard
    FORCE_RET();
646 2c0262af bellard
}
647 2c0262af bellard
648 2c0262af bellard
void OPPROTO op_sarl_T1_T0(void)
649 2c0262af bellard
{
650 2c0262af bellard
    int shift;
651 2c0262af bellard
    shift = T0 & 0xff;
652 2c0262af bellard
    if (shift >= 32)
653 2c0262af bellard
        shift = 31;
654 2c0262af bellard
    T1 = (int32_t)T1 >> shift;
655 2c0262af bellard
}
656 2c0262af bellard
657 2c0262af bellard
void OPPROTO op_rorl_T1_T0(void)
658 2c0262af bellard
{
659 2c0262af bellard
    int shift;
660 2c0262af bellard
    shift = T0 & 0x1f;
661 2c0262af bellard
    if (shift) {
662 2c0262af bellard
        T1 = ((uint32_t)T1 >> shift) | (T1 << (32 - shift));
663 2c0262af bellard
    }
664 2c0262af bellard
    FORCE_RET();
665 2c0262af bellard
}
666 2c0262af bellard
667 2c0262af bellard
/* T1 based, use T0 as shift count and compute CF */
668 2c0262af bellard
669 2c0262af bellard
void OPPROTO op_shll_T1_T0_cc(void)
670 2c0262af bellard
{
671 2c0262af bellard
    int shift;
672 2c0262af bellard
    shift = T0 & 0xff;
673 2c0262af bellard
    if (shift >= 32) {
674 2c0262af bellard
        if (shift == 32)
675 2c0262af bellard
            env->CF = T1 & 1;
676 2c0262af bellard
        else
677 2c0262af bellard
            env->CF = 0;
678 2c0262af bellard
        T1 = 0;
679 2c0262af bellard
    } else if (shift != 0) {
680 2c0262af bellard
        env->CF = (T1 >> (32 - shift)) & 1;
681 2c0262af bellard
        T1 = T1 << shift;
682 2c0262af bellard
    }
683 2c0262af bellard
    FORCE_RET();
684 2c0262af bellard
}
685 2c0262af bellard
686 2c0262af bellard
void OPPROTO op_shrl_T1_T0_cc(void)
687 2c0262af bellard
{
688 2c0262af bellard
    int shift;
689 2c0262af bellard
    shift = T0 & 0xff;
690 2c0262af bellard
    if (shift >= 32) {
691 2c0262af bellard
        if (shift == 32)
692 2c0262af bellard
            env->CF = (T1 >> 31) & 1;
693 2c0262af bellard
        else
694 2c0262af bellard
            env->CF = 0;
695 2c0262af bellard
        T1 = 0;
696 2c0262af bellard
    } else if (shift != 0) {
697 2c0262af bellard
        env->CF = (T1 >> (shift - 1)) & 1;
698 2c0262af bellard
        T1 = (uint32_t)T1 >> shift;
699 2c0262af bellard
    }
700 2c0262af bellard
    FORCE_RET();
701 2c0262af bellard
}
702 2c0262af bellard
703 2c0262af bellard
void OPPROTO op_sarl_T1_T0_cc(void)
704 2c0262af bellard
{
705 2c0262af bellard
    int shift;
706 2c0262af bellard
    shift = T0 & 0xff;
707 2c0262af bellard
    if (shift >= 32) {
708 2c0262af bellard
        env->CF = (T1 >> 31) & 1;
709 2c0262af bellard
        T1 = (int32_t)T1 >> 31;
710 2c0262af bellard
    } else {
711 2c0262af bellard
        env->CF = (T1 >> (shift - 1)) & 1;
712 2c0262af bellard
        T1 = (int32_t)T1 >> shift;
713 2c0262af bellard
    }
714 2c0262af bellard
    FORCE_RET();
715 2c0262af bellard
}
716 2c0262af bellard
717 2c0262af bellard
void OPPROTO op_rorl_T1_T0_cc(void)
718 2c0262af bellard
{
719 2c0262af bellard
    int shift1, shift;
720 2c0262af bellard
    shift1 = T0 & 0xff;
721 2c0262af bellard
    shift = shift1 & 0x1f;
722 2c0262af bellard
    if (shift == 0) {
723 2c0262af bellard
        if (shift1 != 0)
724 2c0262af bellard
            env->CF = (T1 >> 31) & 1;
725 2c0262af bellard
    } else {
726 2c0262af bellard
        env->CF = (T1 >> (shift - 1)) & 1;
727 2c0262af bellard
        T1 = ((uint32_t)T1 >> shift) | (T1 << (32 - shift));
728 2c0262af bellard
    }
729 2c0262af bellard
    FORCE_RET();
730 2c0262af bellard
}
731 2c0262af bellard
732 99c475ab bellard
/* misc */
733 99c475ab bellard
void OPPROTO op_clz_T0(void)
734 99c475ab bellard
{
735 99c475ab bellard
    int count;
736 99c475ab bellard
    for (count = 32; T0 > 0; count--)
737 99c475ab bellard
        T0 = T0 >> 1;
738 99c475ab bellard
    T0 = count;
739 99c475ab bellard
    FORCE_RET();
740 99c475ab bellard
}
741 99c475ab bellard
742 99c475ab bellard
void OPPROTO op_sarl_T0_im(void)
743 99c475ab bellard
{
744 99c475ab bellard
    T0 = (int32_t)T0 >> PARAM1;
745 99c475ab bellard
}
746 99c475ab bellard
747 99c475ab bellard
/* 16->32 Sign extend */
748 99c475ab bellard
void OPPROTO op_sxl_T0(void)
749 99c475ab bellard
{
750 99c475ab bellard
  T0 = (int16_t)T0;
751 99c475ab bellard
}
752 99c475ab bellard
753 99c475ab bellard
void OPPROTO op_sxl_T1(void)
754 99c475ab bellard
{
755 99c475ab bellard
  T1 = (int16_t)T1;
756 99c475ab bellard
}
757 99c475ab bellard
758 99c475ab bellard
#define SIGNBIT (uint32_t)0x80000000
759 99c475ab bellard
/* saturating arithmetic  */
760 99c475ab bellard
void OPPROTO op_addl_T0_T1_setq(void)
761 99c475ab bellard
{
762 99c475ab bellard
  uint32_t res;
763 99c475ab bellard
764 99c475ab bellard
  res = T0 + T1;
765 99c475ab bellard
  if (((res ^ T0) & SIGNBIT) && !((T0 ^ T1) & SIGNBIT))
766 99c475ab bellard
      env->QF = 1;
767 99c475ab bellard
768 99c475ab bellard
  T0 = res;
769 99c475ab bellard
  FORCE_RET();
770 99c475ab bellard
}
771 99c475ab bellard
772 99c475ab bellard
void OPPROTO op_addl_T0_T1_saturate(void)
773 99c475ab bellard
{
774 99c475ab bellard
  uint32_t res;
775 99c475ab bellard
776 99c475ab bellard
  res = T0 + T1;
777 99c475ab bellard
  if (((res ^ T0) & SIGNBIT) && !((T0 ^ T1) & SIGNBIT)) {
778 99c475ab bellard
      env->QF = 1;
779 99c475ab bellard
      if (T0 & SIGNBIT)
780 99c475ab bellard
          T0 = 0x80000000;
781 99c475ab bellard
      else
782 99c475ab bellard
          T0 = 0x7fffffff;
783 99c475ab bellard
  }
784 99c475ab bellard
  else
785 99c475ab bellard
    T0 = res;
786 99c475ab bellard
  
787 99c475ab bellard
  FORCE_RET();
788 99c475ab bellard
}
789 99c475ab bellard
790 99c475ab bellard
void OPPROTO op_subl_T0_T1_saturate(void)
791 99c475ab bellard
{
792 99c475ab bellard
  uint32_t res;
793 99c475ab bellard
794 99c475ab bellard
  res = T0 - T1;
795 99c475ab bellard
  if (((res ^ T0) & SIGNBIT) && ((T0 ^ T1) & SIGNBIT)) {
796 99c475ab bellard
      env->QF = 1;
797 99c475ab bellard
      if (T0 & SIGNBIT)
798 99c475ab bellard
          T0 = 0x8000000;
799 99c475ab bellard
      else
800 99c475ab bellard
          T0 = 0x7fffffff;
801 99c475ab bellard
  }
802 99c475ab bellard
  else
803 99c475ab bellard
    T0 = res;
804 99c475ab bellard
  
805 99c475ab bellard
  FORCE_RET();
806 99c475ab bellard
}
807 99c475ab bellard
808 99c475ab bellard
/* thumb shift by immediate */
809 99c475ab bellard
void OPPROTO op_shll_T0_im_thumb(void)
810 99c475ab bellard
{
811 99c475ab bellard
    int shift;
812 99c475ab bellard
    shift = PARAM1;
813 99c475ab bellard
    if (shift != 0) {
814 99c475ab bellard
        env->CF = (T1 >> (32 - shift)) & 1;
815 99c475ab bellard
        T0 = T0 << shift;
816 99c475ab bellard
    }
817 99c475ab bellard
    env->NZF = T0;
818 99c475ab bellard
    FORCE_RET();
819 99c475ab bellard
}
820 99c475ab bellard
821 99c475ab bellard
void OPPROTO op_shrl_T0_im_thumb(void)
822 99c475ab bellard
{
823 99c475ab bellard
    int shift;
824 99c475ab bellard
825 99c475ab bellard
    shift = PARAM1;
826 99c475ab bellard
    if (shift == 0) {
827 5899f386 bellard
        env->CF = ((uint32_t)shift) >> 31;
828 99c475ab bellard
        T0 = 0;
829 99c475ab bellard
    } else {
830 99c475ab bellard
        env->CF = (T0 >> (shift - 1)) & 1;
831 99c475ab bellard
        T0 = T0 >> shift;
832 99c475ab bellard
    }
833 5899f386 bellard
    env->NZF = T0;
834 99c475ab bellard
    FORCE_RET();
835 99c475ab bellard
}
836 99c475ab bellard
837 99c475ab bellard
void OPPROTO op_sarl_T0_im_thumb(void)
838 99c475ab bellard
{
839 99c475ab bellard
    int shift;
840 99c475ab bellard
841 99c475ab bellard
    shift = PARAM1;
842 99c475ab bellard
    if (shift == 0) {
843 99c475ab bellard
        T0 = ((int32_t)T0) >> 31;
844 99c475ab bellard
        env->CF = T0 & 1;
845 99c475ab bellard
    } else {
846 99c475ab bellard
        env->CF = (T0 >> (shift - 1)) & 1;
847 99c475ab bellard
        T0 = ((int32_t)T0) >> shift;
848 99c475ab bellard
    }
849 99c475ab bellard
    env->NZF = T0;
850 99c475ab bellard
    FORCE_RET();
851 99c475ab bellard
}
852 99c475ab bellard
853 2c0262af bellard
/* exceptions */
854 2c0262af bellard
855 2c0262af bellard
void OPPROTO op_swi(void)
856 2c0262af bellard
{
857 2c0262af bellard
    env->exception_index = EXCP_SWI;
858 2c0262af bellard
    cpu_loop_exit();
859 2c0262af bellard
}
860 2c0262af bellard
861 2c0262af bellard
void OPPROTO op_undef_insn(void)
862 2c0262af bellard
{
863 2c0262af bellard
    env->exception_index = EXCP_UDEF;
864 2c0262af bellard
    cpu_loop_exit();
865 2c0262af bellard
}
866 2c0262af bellard
867 1fddef4b bellard
void OPPROTO op_debug(void)
868 1fddef4b bellard
{
869 1fddef4b bellard
    env->exception_index = EXCP_DEBUG;
870 1fddef4b bellard
    cpu_loop_exit();
871 1fddef4b bellard
}
872 1fddef4b bellard
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/* VFP support.  We follow the convention used for VFP instrunctions:
874 b7bcbe95 bellard
   Single precition routines have a "s" suffix, double precision a
875 b7bcbe95 bellard
   "d" suffix.  */
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#define VFP_OP(name, p) void OPPROTO op_vfp_##name##p(void)
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879 53cd6637 bellard
#define VFP_BINOP(name) \
880 b7bcbe95 bellard
VFP_OP(name, s)             \
881 b7bcbe95 bellard
{                           \
882 53cd6637 bellard
    FT0s = float32_ ## name (FT0s, FT1s, &env->vfp.fp_status);    \
883 b7bcbe95 bellard
}                           \
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VFP_OP(name, d)             \
885 b7bcbe95 bellard
{                           \
886 53cd6637 bellard
    FT0d = float64_ ## name (FT0d, FT1d, &env->vfp.fp_status);    \
887 b7bcbe95 bellard
}
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VFP_BINOP(add)
889 53cd6637 bellard
VFP_BINOP(sub)
890 53cd6637 bellard
VFP_BINOP(mul)
891 53cd6637 bellard
VFP_BINOP(div)
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#undef VFP_BINOP
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#define VFP_HELPER(name)  \
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VFP_OP(name, s)           \
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{                         \
897 b7bcbe95 bellard
    do_vfp_##name##s();    \
898 b7bcbe95 bellard
}                         \
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VFP_OP(name, d)           \
900 b7bcbe95 bellard
{                         \
901 b7bcbe95 bellard
    do_vfp_##name##d();    \
902 b7bcbe95 bellard
}
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VFP_HELPER(abs)
904 b7bcbe95 bellard
VFP_HELPER(sqrt)
905 b7bcbe95 bellard
VFP_HELPER(cmp)
906 b7bcbe95 bellard
VFP_HELPER(cmpe)
907 b7bcbe95 bellard
#undef VFP_HELPER
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909 b7bcbe95 bellard
/* XXX: Will this do the right thing for NANs.  Should invert the signbit
910 b7bcbe95 bellard
   without looking at the rest of the value.  */
911 b7bcbe95 bellard
VFP_OP(neg, s)
912 b7bcbe95 bellard
{
913 53cd6637 bellard
    FT0s = float32_chs(FT0s);
914 b7bcbe95 bellard
}
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916 b7bcbe95 bellard
VFP_OP(neg, d)
917 b7bcbe95 bellard
{
918 53cd6637 bellard
    FT0d = float64_chs(FT0d);
919 b7bcbe95 bellard
}
920 b7bcbe95 bellard
921 b7bcbe95 bellard
VFP_OP(F1_ld0, s)
922 b7bcbe95 bellard
{
923 53cd6637 bellard
    union {
924 53cd6637 bellard
        uint32_t i;
925 53cd6637 bellard
        float32 s;
926 53cd6637 bellard
    } v;
927 53cd6637 bellard
    v.i = 0;
928 53cd6637 bellard
    FT1s = v.s;
929 b7bcbe95 bellard
}
930 b7bcbe95 bellard
931 b7bcbe95 bellard
VFP_OP(F1_ld0, d)
932 b7bcbe95 bellard
{
933 53cd6637 bellard
    union {
934 53cd6637 bellard
        uint64_t i;
935 53cd6637 bellard
        float64 d;
936 53cd6637 bellard
    } v;
937 53cd6637 bellard
    v.i = 0;
938 53cd6637 bellard
    FT1d = v.d;
939 b7bcbe95 bellard
}
940 b7bcbe95 bellard
941 b7bcbe95 bellard
/* Helper routines to perform bitwise copies between float and int.  */
942 53cd6637 bellard
static inline float32 vfp_itos(uint32_t i)
943 b7bcbe95 bellard
{
944 b7bcbe95 bellard
    union {
945 b7bcbe95 bellard
        uint32_t i;
946 53cd6637 bellard
        float32 s;
947 b7bcbe95 bellard
    } v;
948 b7bcbe95 bellard
949 b7bcbe95 bellard
    v.i = i;
950 b7bcbe95 bellard
    return v.s;
951 b7bcbe95 bellard
}
952 b7bcbe95 bellard
953 53cd6637 bellard
static inline uint32_t vfp_stoi(float32 s)
954 b7bcbe95 bellard
{
955 b7bcbe95 bellard
    union {
956 b7bcbe95 bellard
        uint32_t i;
957 53cd6637 bellard
        float32 s;
958 b7bcbe95 bellard
    } v;
959 b7bcbe95 bellard
960 b7bcbe95 bellard
    v.s = s;
961 b7bcbe95 bellard
    return v.i;
962 b7bcbe95 bellard
}
963 b7bcbe95 bellard
964 b7bcbe95 bellard
/* Integer to float conversion.  */
965 b7bcbe95 bellard
VFP_OP(uito, s)
966 b7bcbe95 bellard
{
967 53cd6637 bellard
    FT0s = uint32_to_float32(vfp_stoi(FT0s), &env->vfp.fp_status);
968 b7bcbe95 bellard
}
969 b7bcbe95 bellard
970 b7bcbe95 bellard
VFP_OP(uito, d)
971 b7bcbe95 bellard
{
972 53cd6637 bellard
    FT0d = uint32_to_float64(vfp_stoi(FT0s), &env->vfp.fp_status);
973 b7bcbe95 bellard
}
974 b7bcbe95 bellard
975 b7bcbe95 bellard
VFP_OP(sito, s)
976 b7bcbe95 bellard
{
977 53cd6637 bellard
    FT0s = int32_to_float32(vfp_stoi(FT0s), &env->vfp.fp_status);
978 b7bcbe95 bellard
}
979 b7bcbe95 bellard
980 b7bcbe95 bellard
VFP_OP(sito, d)
981 b7bcbe95 bellard
{
982 53cd6637 bellard
    FT0d = int32_to_float64(vfp_stoi(FT0s), &env->vfp.fp_status);
983 b7bcbe95 bellard
}
984 b7bcbe95 bellard
985 b7bcbe95 bellard
/* Float to integer conversion.  */
986 b7bcbe95 bellard
VFP_OP(toui, s)
987 b7bcbe95 bellard
{
988 53cd6637 bellard
    FT0s = vfp_itos(float32_to_uint32(FT0s, &env->vfp.fp_status));
989 b7bcbe95 bellard
}
990 b7bcbe95 bellard
991 b7bcbe95 bellard
VFP_OP(toui, d)
992 b7bcbe95 bellard
{
993 53cd6637 bellard
    FT0s = vfp_itos(float64_to_uint32(FT0d, &env->vfp.fp_status));
994 b7bcbe95 bellard
}
995 b7bcbe95 bellard
996 b7bcbe95 bellard
VFP_OP(tosi, s)
997 b7bcbe95 bellard
{
998 53cd6637 bellard
    FT0s = vfp_itos(float32_to_int32(FT0s, &env->vfp.fp_status));
999 b7bcbe95 bellard
}
1000 b7bcbe95 bellard
1001 b7bcbe95 bellard
VFP_OP(tosi, d)
1002 b7bcbe95 bellard
{
1003 53cd6637 bellard
    FT0s = vfp_itos(float64_to_int32(FT0d, &env->vfp.fp_status));
1004 b7bcbe95 bellard
}
1005 b7bcbe95 bellard
1006 b7bcbe95 bellard
/* TODO: Set rounding mode properly.  */
1007 b7bcbe95 bellard
VFP_OP(touiz, s)
1008 b7bcbe95 bellard
{
1009 53cd6637 bellard
    FT0s = vfp_itos(float32_to_uint32_round_to_zero(FT0s, &env->vfp.fp_status));
1010 b7bcbe95 bellard
}
1011 b7bcbe95 bellard
1012 b7bcbe95 bellard
VFP_OP(touiz, d)
1013 b7bcbe95 bellard
{
1014 53cd6637 bellard
    FT0s = vfp_itos(float64_to_uint32_round_to_zero(FT0d, &env->vfp.fp_status));
1015 b7bcbe95 bellard
}
1016 b7bcbe95 bellard
1017 b7bcbe95 bellard
VFP_OP(tosiz, s)
1018 b7bcbe95 bellard
{
1019 53cd6637 bellard
    FT0s = vfp_itos(float32_to_int32_round_to_zero(FT0s, &env->vfp.fp_status));
1020 b7bcbe95 bellard
}
1021 b7bcbe95 bellard
1022 b7bcbe95 bellard
VFP_OP(tosiz, d)
1023 2c0262af bellard
{
1024 53cd6637 bellard
    FT0s = vfp_itos(float64_to_int32_round_to_zero(FT0d, &env->vfp.fp_status));
1025 2c0262af bellard
}
1026 2c0262af bellard
1027 b7bcbe95 bellard
/* floating point conversion */
1028 b7bcbe95 bellard
VFP_OP(fcvtd, s)
1029 2c0262af bellard
{
1030 53cd6637 bellard
    FT0d = float32_to_float64(FT0s, &env->vfp.fp_status);
1031 2c0262af bellard
}
1032 2c0262af bellard
1033 b7bcbe95 bellard
VFP_OP(fcvts, d)
1034 b7bcbe95 bellard
{
1035 53cd6637 bellard
    FT0s = float64_to_float32(FT0d, &env->vfp.fp_status);
1036 b7bcbe95 bellard
}
1037 b7bcbe95 bellard
1038 b7bcbe95 bellard
/* Get and Put values from registers.  */
1039 b7bcbe95 bellard
VFP_OP(getreg_F0, d)
1040 b7bcbe95 bellard
{
1041 53cd6637 bellard
  FT0d = *(float64 *)((char *) env + PARAM1);
1042 b7bcbe95 bellard
}
1043 b7bcbe95 bellard
1044 b7bcbe95 bellard
VFP_OP(getreg_F0, s)
1045 b7bcbe95 bellard
{
1046 53cd6637 bellard
  FT0s = *(float32 *)((char *) env + PARAM1);
1047 b7bcbe95 bellard
}
1048 b7bcbe95 bellard
1049 b7bcbe95 bellard
VFP_OP(getreg_F1, d)
1050 b7bcbe95 bellard
{
1051 53cd6637 bellard
  FT1d = *(float64 *)((char *) env + PARAM1);
1052 b7bcbe95 bellard
}
1053 b7bcbe95 bellard
1054 b7bcbe95 bellard
VFP_OP(getreg_F1, s)
1055 b7bcbe95 bellard
{
1056 53cd6637 bellard
  FT1s = *(float32 *)((char *) env + PARAM1);
1057 b7bcbe95 bellard
}
1058 b7bcbe95 bellard
1059 b7bcbe95 bellard
VFP_OP(setreg_F0, d)
1060 b7bcbe95 bellard
{
1061 53cd6637 bellard
  *(float64 *)((char *) env + PARAM1) = FT0d;
1062 b7bcbe95 bellard
}
1063 b7bcbe95 bellard
1064 b7bcbe95 bellard
VFP_OP(setreg_F0, s)
1065 b7bcbe95 bellard
{
1066 53cd6637 bellard
  *(float32 *)((char *) env + PARAM1) = FT0s;
1067 b7bcbe95 bellard
}
1068 b7bcbe95 bellard
1069 b7bcbe95 bellard
void OPPROTO op_vfp_movl_T0_fpscr(void)
1070 b7bcbe95 bellard
{
1071 b7bcbe95 bellard
    do_vfp_get_fpscr ();
1072 b7bcbe95 bellard
}
1073 b7bcbe95 bellard
1074 b7bcbe95 bellard
void OPPROTO op_vfp_movl_T0_fpscr_flags(void)
1075 b7bcbe95 bellard
{
1076 b7bcbe95 bellard
    T0 = env->vfp.fpscr & (0xf << 28);
1077 b7bcbe95 bellard
}
1078 b7bcbe95 bellard
1079 b7bcbe95 bellard
void OPPROTO op_vfp_movl_fpscr_T0(void)
1080 b7bcbe95 bellard
{
1081 b7bcbe95 bellard
    do_vfp_set_fpscr();
1082 b7bcbe95 bellard
}
1083 b7bcbe95 bellard
1084 b7bcbe95 bellard
/* Move between FT0s to T0  */
1085 b7bcbe95 bellard
void OPPROTO op_vfp_mrs(void)
1086 b7bcbe95 bellard
{
1087 b7bcbe95 bellard
    T0 = vfp_stoi(FT0s);
1088 b7bcbe95 bellard
}
1089 b7bcbe95 bellard
1090 b7bcbe95 bellard
void OPPROTO op_vfp_msr(void)
1091 b7bcbe95 bellard
{
1092 b7bcbe95 bellard
    FT0s = vfp_itos(T0);
1093 b7bcbe95 bellard
}
1094 b7bcbe95 bellard
1095 b7bcbe95 bellard
/* Move between FT0d and {T0,T1} */
1096 b7bcbe95 bellard
void OPPROTO op_vfp_mrrd(void)
1097 b7bcbe95 bellard
{
1098 b7bcbe95 bellard
    CPU_DoubleU u;
1099 b7bcbe95 bellard
    
1100 b7bcbe95 bellard
    u.d = FT0d;
1101 b7bcbe95 bellard
    T0 = u.l.lower;
1102 b7bcbe95 bellard
    T1 = u.l.upper;
1103 b7bcbe95 bellard
}
1104 b7bcbe95 bellard
1105 b7bcbe95 bellard
void OPPROTO op_vfp_mdrr(void)
1106 b7bcbe95 bellard
{
1107 b7bcbe95 bellard
    CPU_DoubleU u;
1108 b7bcbe95 bellard
    
1109 b7bcbe95 bellard
    u.l.lower = T0;
1110 b7bcbe95 bellard
    u.l.upper = T1;
1111 b7bcbe95 bellard
    FT0d = u.d;
1112 b7bcbe95 bellard
}
1113 b7bcbe95 bellard
1114 b7bcbe95 bellard
/* Floating point load/store.  Address is in T1 */
1115 b7bcbe95 bellard
void OPPROTO op_vfp_lds(void)
1116 b7bcbe95 bellard
{
1117 b7bcbe95 bellard
    FT0s = ldfl((void *)T1);
1118 b7bcbe95 bellard
}
1119 b7bcbe95 bellard
1120 b7bcbe95 bellard
void OPPROTO op_vfp_ldd(void)
1121 b7bcbe95 bellard
{
1122 b7bcbe95 bellard
    FT0d = ldfq((void *)T1);
1123 b7bcbe95 bellard
}
1124 b7bcbe95 bellard
1125 b7bcbe95 bellard
void OPPROTO op_vfp_sts(void)
1126 b7bcbe95 bellard
{
1127 b7bcbe95 bellard
    stfl((void *)T1, FT0s);
1128 b7bcbe95 bellard
}
1129 b7bcbe95 bellard
1130 b7bcbe95 bellard
void OPPROTO op_vfp_std(void)
1131 b7bcbe95 bellard
{
1132 b7bcbe95 bellard
    stfq((void *)T1, FT0d);
1133 b7bcbe95 bellard
}