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1 | b9adb4a6 | bellard | /* General "disassemble this chunk" code. Used for debugging. */
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2 | 5bbe9299 | bellard | #include "config.h" |
3 | 76cad711 | Paolo Bonzini | #include "disas/bfd.h" |
4 | b9adb4a6 | bellard | #include "elf.h" |
5 | aa0aa4fa | bellard | #include <errno.h> |
6 | b9adb4a6 | bellard | |
7 | c6105c0a | bellard | #include "cpu.h" |
8 | 76cad711 | Paolo Bonzini | #include "disas/disas.h" |
9 | c6105c0a | bellard | |
10 | f4359b9f | Blue Swirl | typedef struct CPUDebug { |
11 | f4359b9f | Blue Swirl | struct disassemble_info info;
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12 | f4359b9f | Blue Swirl | CPUArchState *env; |
13 | f4359b9f | Blue Swirl | } CPUDebug; |
14 | f4359b9f | Blue Swirl | |
15 | b9adb4a6 | bellard | /* Filled in by elfload.c. Simplistic, but will do for now. */
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16 | e80cfcfc | bellard | struct syminfo *syminfos = NULL; |
17 | b9adb4a6 | bellard | |
18 | aa0aa4fa | bellard | /* Get LENGTH bytes from info's buffer, at target address memaddr.
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19 | aa0aa4fa | bellard | Transfer them to myaddr. */
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20 | aa0aa4fa | bellard | int
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21 | 3a742b76 | pbrook | buffer_read_memory(bfd_vma memaddr, bfd_byte *myaddr, int length,
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22 | 3a742b76 | pbrook | struct disassemble_info *info)
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23 | aa0aa4fa | bellard | { |
24 | c6105c0a | bellard | if (memaddr < info->buffer_vma
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25 | c6105c0a | bellard | || memaddr + length > info->buffer_vma + info->buffer_length) |
26 | c6105c0a | bellard | /* Out of bounds. Use EIO because GDB uses it. */
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27 | c6105c0a | bellard | return EIO;
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28 | c6105c0a | bellard | memcpy (myaddr, info->buffer + (memaddr - info->buffer_vma), length); |
29 | c6105c0a | bellard | return 0; |
30 | aa0aa4fa | bellard | } |
31 | aa0aa4fa | bellard | |
32 | c6105c0a | bellard | /* Get LENGTH bytes from info's buffer, at target address memaddr.
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33 | c6105c0a | bellard | Transfer them to myaddr. */
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34 | c6105c0a | bellard | static int |
35 | c27004ec | bellard | target_read_memory (bfd_vma memaddr, |
36 | c27004ec | bellard | bfd_byte *myaddr, |
37 | c27004ec | bellard | int length,
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38 | c27004ec | bellard | struct disassemble_info *info)
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39 | c6105c0a | bellard | { |
40 | f4359b9f | Blue Swirl | CPUDebug *s = container_of(info, CPUDebug, info); |
41 | f4359b9f | Blue Swirl | |
42 | f4359b9f | Blue Swirl | cpu_memory_rw_debug(s->env, memaddr, myaddr, length, 0);
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43 | c6105c0a | bellard | return 0; |
44 | c6105c0a | bellard | } |
45 | c6105c0a | bellard | |
46 | aa0aa4fa | bellard | /* Print an error message. We can assume that this is in response to
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47 | aa0aa4fa | bellard | an error return from buffer_read_memory. */
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48 | aa0aa4fa | bellard | void
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49 | 3a742b76 | pbrook | perror_memory (int status, bfd_vma memaddr, struct disassemble_info *info) |
50 | aa0aa4fa | bellard | { |
51 | aa0aa4fa | bellard | if (status != EIO)
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52 | aa0aa4fa | bellard | /* Can't happen. */
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53 | aa0aa4fa | bellard | (*info->fprintf_func) (info->stream, "Unknown error %d\n", status);
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54 | aa0aa4fa | bellard | else
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55 | aa0aa4fa | bellard | /* Actually, address between memaddr and memaddr + len was
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56 | aa0aa4fa | bellard | out of bounds. */
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57 | aa0aa4fa | bellard | (*info->fprintf_func) (info->stream, |
58 | 26a76461 | bellard | "Address 0x%" PRIx64 " is out of bounds.\n", memaddr); |
59 | aa0aa4fa | bellard | } |
60 | aa0aa4fa | bellard | |
61 | a31f0531 | Jim Meyering | /* This could be in a separate file, to save minuscule amounts of space
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62 | aa0aa4fa | bellard | in statically linked executables. */
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63 | aa0aa4fa | bellard | |
64 | aa0aa4fa | bellard | /* Just print the address is hex. This is included for completeness even
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65 | aa0aa4fa | bellard | though both GDB and objdump provide their own (to print symbolic
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66 | aa0aa4fa | bellard | addresses). */
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67 | aa0aa4fa | bellard | |
68 | aa0aa4fa | bellard | void
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69 | 3a742b76 | pbrook | generic_print_address (bfd_vma addr, struct disassemble_info *info)
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70 | aa0aa4fa | bellard | { |
71 | 26a76461 | bellard | (*info->fprintf_func) (info->stream, "0x%" PRIx64, addr);
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72 | aa0aa4fa | bellard | } |
73 | aa0aa4fa | bellard | |
74 | 636bd289 | Peter Maydell | /* Print address in hex, truncated to the width of a target virtual address. */
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75 | 636bd289 | Peter Maydell | static void |
76 | 636bd289 | Peter Maydell | generic_print_target_address(bfd_vma addr, struct disassemble_info *info)
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77 | 636bd289 | Peter Maydell | { |
78 | 636bd289 | Peter Maydell | uint64_t mask = ~0ULL >> (64 - TARGET_VIRT_ADDR_SPACE_BITS); |
79 | 636bd289 | Peter Maydell | generic_print_address(addr & mask, info); |
80 | 636bd289 | Peter Maydell | } |
81 | 636bd289 | Peter Maydell | |
82 | 636bd289 | Peter Maydell | /* Print address in hex, truncated to the width of a host virtual address. */
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83 | 636bd289 | Peter Maydell | static void |
84 | 636bd289 | Peter Maydell | generic_print_host_address(bfd_vma addr, struct disassemble_info *info)
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85 | 636bd289 | Peter Maydell | { |
86 | 636bd289 | Peter Maydell | uint64_t mask = ~0ULL >> (64 - (sizeof(void *) * 8)); |
87 | 636bd289 | Peter Maydell | generic_print_address(addr & mask, info); |
88 | 636bd289 | Peter Maydell | } |
89 | 636bd289 | Peter Maydell | |
90 | aa0aa4fa | bellard | /* Just return the given address. */
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91 | aa0aa4fa | bellard | |
92 | aa0aa4fa | bellard | int
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93 | 3a742b76 | pbrook | generic_symbol_at_address (bfd_vma addr, struct disassemble_info *info)
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94 | aa0aa4fa | bellard | { |
95 | aa0aa4fa | bellard | return 1; |
96 | aa0aa4fa | bellard | } |
97 | aa0aa4fa | bellard | |
98 | 903ec55c | Aurelien Jarno | bfd_vma bfd_getl64 (const bfd_byte *addr)
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99 | 903ec55c | Aurelien Jarno | { |
100 | 903ec55c | Aurelien Jarno | unsigned long long v; |
101 | 903ec55c | Aurelien Jarno | |
102 | 903ec55c | Aurelien Jarno | v = (unsigned long long) addr[0]; |
103 | 903ec55c | Aurelien Jarno | v |= (unsigned long long) addr[1] << 8; |
104 | 903ec55c | Aurelien Jarno | v |= (unsigned long long) addr[2] << 16; |
105 | 903ec55c | Aurelien Jarno | v |= (unsigned long long) addr[3] << 24; |
106 | 903ec55c | Aurelien Jarno | v |= (unsigned long long) addr[4] << 32; |
107 | 903ec55c | Aurelien Jarno | v |= (unsigned long long) addr[5] << 40; |
108 | 903ec55c | Aurelien Jarno | v |= (unsigned long long) addr[6] << 48; |
109 | 903ec55c | Aurelien Jarno | v |= (unsigned long long) addr[7] << 56; |
110 | 903ec55c | Aurelien Jarno | return (bfd_vma) v;
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111 | 903ec55c | Aurelien Jarno | } |
112 | 903ec55c | Aurelien Jarno | |
113 | aa0aa4fa | bellard | bfd_vma bfd_getl32 (const bfd_byte *addr)
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114 | aa0aa4fa | bellard | { |
115 | aa0aa4fa | bellard | unsigned long v; |
116 | aa0aa4fa | bellard | |
117 | aa0aa4fa | bellard | v = (unsigned long) addr[0]; |
118 | aa0aa4fa | bellard | v |= (unsigned long) addr[1] << 8; |
119 | aa0aa4fa | bellard | v |= (unsigned long) addr[2] << 16; |
120 | aa0aa4fa | bellard | v |= (unsigned long) addr[3] << 24; |
121 | aa0aa4fa | bellard | return (bfd_vma) v;
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122 | aa0aa4fa | bellard | } |
123 | aa0aa4fa | bellard | |
124 | aa0aa4fa | bellard | bfd_vma bfd_getb32 (const bfd_byte *addr)
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125 | aa0aa4fa | bellard | { |
126 | aa0aa4fa | bellard | unsigned long v; |
127 | aa0aa4fa | bellard | |
128 | aa0aa4fa | bellard | v = (unsigned long) addr[0] << 24; |
129 | aa0aa4fa | bellard | v |= (unsigned long) addr[1] << 16; |
130 | aa0aa4fa | bellard | v |= (unsigned long) addr[2] << 8; |
131 | aa0aa4fa | bellard | v |= (unsigned long) addr[3]; |
132 | aa0aa4fa | bellard | return (bfd_vma) v;
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133 | aa0aa4fa | bellard | } |
134 | aa0aa4fa | bellard | |
135 | 6af0bf9c | bellard | bfd_vma bfd_getl16 (const bfd_byte *addr)
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136 | 6af0bf9c | bellard | { |
137 | 6af0bf9c | bellard | unsigned long v; |
138 | 6af0bf9c | bellard | |
139 | 6af0bf9c | bellard | v = (unsigned long) addr[0]; |
140 | 6af0bf9c | bellard | v |= (unsigned long) addr[1] << 8; |
141 | 6af0bf9c | bellard | return (bfd_vma) v;
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142 | 6af0bf9c | bellard | } |
143 | 6af0bf9c | bellard | |
144 | 6af0bf9c | bellard | bfd_vma bfd_getb16 (const bfd_byte *addr)
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145 | 6af0bf9c | bellard | { |
146 | 6af0bf9c | bellard | unsigned long v; |
147 | 6af0bf9c | bellard | |
148 | 6af0bf9c | bellard | v = (unsigned long) addr[0] << 24; |
149 | 6af0bf9c | bellard | v |= (unsigned long) addr[1] << 16; |
150 | 6af0bf9c | bellard | return (bfd_vma) v;
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151 | 6af0bf9c | bellard | } |
152 | 6af0bf9c | bellard | |
153 | c2d551ff | bellard | #ifdef TARGET_ARM
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154 | c2d551ff | bellard | static int |
155 | c2d551ff | bellard | print_insn_thumb1(bfd_vma pc, disassemble_info *info) |
156 | c2d551ff | bellard | { |
157 | c2d551ff | bellard | return print_insn_arm(pc | 1, info); |
158 | c2d551ff | bellard | } |
159 | c2d551ff | bellard | #endif
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160 | c2d551ff | bellard | |
161 | e91c8a77 | ths | /* Disassemble this for me please... (debugging). 'flags' has the following
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162 | c2d551ff | bellard | values:
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163 | e99722f6 | Frediano Ziglio | i386 - 1 means 16 bit code, 2 means 64 bit code
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164 | d8fd2954 | Paul Brook | arm - bit 0 = thumb, bit 1 = reverse endian
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165 | 6a00d601 | bellard | ppc - nonzero means little endian
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166 | c2d551ff | bellard | other targets - unused
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167 | c2d551ff | bellard | */
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168 | f4359b9f | Blue Swirl | void target_disas(FILE *out, CPUArchState *env, target_ulong code,
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169 | f4359b9f | Blue Swirl | target_ulong size, int flags)
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170 | b9adb4a6 | bellard | { |
171 | c27004ec | bellard | target_ulong pc; |
172 | b9adb4a6 | bellard | int count;
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173 | f4359b9f | Blue Swirl | CPUDebug s; |
174 | b9adb4a6 | bellard | int (*print_insn)(bfd_vma pc, disassemble_info *info);
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175 | b9adb4a6 | bellard | |
176 | f4359b9f | Blue Swirl | INIT_DISASSEMBLE_INFO(s.info, out, fprintf); |
177 | b9adb4a6 | bellard | |
178 | f4359b9f | Blue Swirl | s.env = env; |
179 | f4359b9f | Blue Swirl | s.info.read_memory_func = target_read_memory; |
180 | f4359b9f | Blue Swirl | s.info.buffer_vma = code; |
181 | f4359b9f | Blue Swirl | s.info.buffer_length = size; |
182 | f4359b9f | Blue Swirl | s.info.print_address_func = generic_print_target_address; |
183 | c27004ec | bellard | |
184 | c27004ec | bellard | #ifdef TARGET_WORDS_BIGENDIAN
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185 | f4359b9f | Blue Swirl | s.info.endian = BFD_ENDIAN_BIG; |
186 | c27004ec | bellard | #else
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187 | f4359b9f | Blue Swirl | s.info.endian = BFD_ENDIAN_LITTLE; |
188 | c27004ec | bellard | #endif
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189 | c27004ec | bellard | #if defined(TARGET_I386)
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190 | f4359b9f | Blue Swirl | if (flags == 2) { |
191 | f4359b9f | Blue Swirl | s.info.mach = bfd_mach_x86_64; |
192 | f4359b9f | Blue Swirl | } else if (flags == 1) { |
193 | f4359b9f | Blue Swirl | s.info.mach = bfd_mach_i386_i8086; |
194 | f4359b9f | Blue Swirl | } else {
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195 | f4359b9f | Blue Swirl | s.info.mach = bfd_mach_i386_i386; |
196 | f4359b9f | Blue Swirl | } |
197 | c27004ec | bellard | print_insn = print_insn_i386; |
198 | c27004ec | bellard | #elif defined(TARGET_ARM)
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199 | d8fd2954 | Paul Brook | if (flags & 1) { |
200 | d8fd2954 | Paul Brook | print_insn = print_insn_thumb1; |
201 | d8fd2954 | Paul Brook | } else {
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202 | d8fd2954 | Paul Brook | print_insn = print_insn_arm; |
203 | d8fd2954 | Paul Brook | } |
204 | d8fd2954 | Paul Brook | if (flags & 2) { |
205 | d8fd2954 | Paul Brook | #ifdef TARGET_WORDS_BIGENDIAN
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206 | f4359b9f | Blue Swirl | s.info.endian = BFD_ENDIAN_LITTLE; |
207 | d8fd2954 | Paul Brook | #else
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208 | f4359b9f | Blue Swirl | s.info.endian = BFD_ENDIAN_BIG; |
209 | d8fd2954 | Paul Brook | #endif
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210 | d8fd2954 | Paul Brook | } |
211 | c27004ec | bellard | #elif defined(TARGET_SPARC)
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212 | c27004ec | bellard | print_insn = print_insn_sparc; |
213 | 3475187d | bellard | #ifdef TARGET_SPARC64
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214 | f4359b9f | Blue Swirl | s.info.mach = bfd_mach_sparc_v9b; |
215 | 3b46e624 | ths | #endif
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216 | c27004ec | bellard | #elif defined(TARGET_PPC)
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217 | f4359b9f | Blue Swirl | if (flags >> 16) { |
218 | f4359b9f | Blue Swirl | s.info.endian = BFD_ENDIAN_LITTLE; |
219 | f4359b9f | Blue Swirl | } |
220 | 237c0af0 | j_mayer | if (flags & 0xFFFF) { |
221 | 237c0af0 | j_mayer | /* If we have a precise definitions of the instructions set, use it */
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222 | f4359b9f | Blue Swirl | s.info.mach = flags & 0xFFFF;
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223 | 237c0af0 | j_mayer | } else {
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224 | a2458627 | bellard | #ifdef TARGET_PPC64
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225 | f4359b9f | Blue Swirl | s.info.mach = bfd_mach_ppc64; |
226 | a2458627 | bellard | #else
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227 | f4359b9f | Blue Swirl | s.info.mach = bfd_mach_ppc; |
228 | a2458627 | bellard | #endif
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229 | 237c0af0 | j_mayer | } |
230 | c27004ec | bellard | print_insn = print_insn_ppc; |
231 | e6e5906b | pbrook | #elif defined(TARGET_M68K)
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232 | e6e5906b | pbrook | print_insn = print_insn_m68k; |
233 | 6af0bf9c | bellard | #elif defined(TARGET_MIPS)
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234 | 76b3030c | bellard | #ifdef TARGET_WORDS_BIGENDIAN
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235 | 6af0bf9c | bellard | print_insn = print_insn_big_mips; |
236 | 76b3030c | bellard | #else
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237 | 76b3030c | bellard | print_insn = print_insn_little_mips; |
238 | 76b3030c | bellard | #endif
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239 | fdf9b3e8 | bellard | #elif defined(TARGET_SH4)
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240 | f4359b9f | Blue Swirl | s.info.mach = bfd_mach_sh4; |
241 | fdf9b3e8 | bellard | print_insn = print_insn_sh; |
242 | eddf68a6 | j_mayer | #elif defined(TARGET_ALPHA)
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243 | f4359b9f | Blue Swirl | s.info.mach = bfd_mach_alpha_ev6; |
244 | eddf68a6 | j_mayer | print_insn = print_insn_alpha; |
245 | a25fd137 | ths | #elif defined(TARGET_CRIS)
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246 | b09cd072 | Edgar E. Iglesias | if (flags != 32) { |
247 | f4359b9f | Blue Swirl | s.info.mach = bfd_mach_cris_v0_v10; |
248 | b09cd072 | Edgar E. Iglesias | print_insn = print_insn_crisv10; |
249 | b09cd072 | Edgar E. Iglesias | } else {
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250 | f4359b9f | Blue Swirl | s.info.mach = bfd_mach_cris_v32; |
251 | b09cd072 | Edgar E. Iglesias | print_insn = print_insn_crisv32; |
252 | b09cd072 | Edgar E. Iglesias | } |
253 | db500609 | Ulrich Hecht | #elif defined(TARGET_S390X)
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254 | f4359b9f | Blue Swirl | s.info.mach = bfd_mach_s390_64; |
255 | db500609 | Ulrich Hecht | print_insn = print_insn_s390; |
256 | e90e390c | Edgar E. Iglesias | #elif defined(TARGET_MICROBLAZE)
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257 | f4359b9f | Blue Swirl | s.info.mach = bfd_arch_microblaze; |
258 | e90e390c | Edgar E. Iglesias | print_insn = print_insn_microblaze; |
259 | bd86a88e | Anthony Green | #elif defined(TARGET_MOXIE)
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260 | bd86a88e | Anthony Green | s.info.mach = bfd_arch_moxie; |
261 | bd86a88e | Anthony Green | print_insn = print_insn_moxie; |
262 | 79368f49 | Michael Walle | #elif defined(TARGET_LM32)
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263 | f4359b9f | Blue Swirl | s.info.mach = bfd_mach_lm32; |
264 | 79368f49 | Michael Walle | print_insn = print_insn_lm32; |
265 | c27004ec | bellard | #else
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266 | b8076a74 | bellard | fprintf(out, "0x" TARGET_FMT_lx
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267 | b8076a74 | bellard | ": Asm output not supported on this arch\n", code);
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268 | c27004ec | bellard | return;
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269 | c6105c0a | bellard | #endif
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270 | c6105c0a | bellard | |
271 | 7e000c2e | blueswir1 | for (pc = code; size > 0; pc += count, size -= count) { |
272 | fa15e030 | bellard | fprintf(out, "0x" TARGET_FMT_lx ": ", pc); |
273 | f4359b9f | Blue Swirl | count = print_insn(pc, &s.info); |
274 | c27004ec | bellard | #if 0
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275 | c27004ec | bellard | {
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276 | c27004ec | bellard | int i;
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277 | c27004ec | bellard | uint8_t b;
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278 | c27004ec | bellard | fprintf(out, " {");
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279 | c27004ec | bellard | for(i = 0; i < count; i++) {
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280 | f4359b9f | Blue Swirl | target_read_memory(pc + i, &b, 1, &s.info);
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281 | c27004ec | bellard | fprintf(out, " %02x", b);
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282 | c27004ec | bellard | }
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283 | c27004ec | bellard | fprintf(out, " }");
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284 | c27004ec | bellard | }
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285 | c27004ec | bellard | #endif
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286 | c27004ec | bellard | fprintf(out, "\n");
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287 | c27004ec | bellard | if (count < 0) |
288 | c27004ec | bellard | break;
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289 | 754d00ae | malc | if (size < count) {
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290 | 754d00ae | malc | fprintf(out, |
291 | 754d00ae | malc | "Disassembler disagrees with translator over instruction "
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292 | 754d00ae | malc | "decoding\n"
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293 | 754d00ae | malc | "Please report this to qemu-devel@nongnu.org\n");
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294 | 754d00ae | malc | break;
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295 | 754d00ae | malc | } |
296 | c27004ec | bellard | } |
297 | c27004ec | bellard | } |
298 | c27004ec | bellard | |
299 | c27004ec | bellard | /* Disassemble this for me please... (debugging). */
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300 | c27004ec | bellard | void disas(FILE *out, void *code, unsigned long size) |
301 | c27004ec | bellard | { |
302 | b0b0f1c9 | Stefan Weil | uintptr_t pc; |
303 | c27004ec | bellard | int count;
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304 | f4359b9f | Blue Swirl | CPUDebug s; |
305 | c27004ec | bellard | int (*print_insn)(bfd_vma pc, disassemble_info *info);
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306 | c27004ec | bellard | |
307 | f4359b9f | Blue Swirl | INIT_DISASSEMBLE_INFO(s.info, out, fprintf); |
308 | f4359b9f | Blue Swirl | s.info.print_address_func = generic_print_host_address; |
309 | c27004ec | bellard | |
310 | f4359b9f | Blue Swirl | s.info.buffer = code; |
311 | f4359b9f | Blue Swirl | s.info.buffer_vma = (uintptr_t)code; |
312 | f4359b9f | Blue Swirl | s.info.buffer_length = size; |
313 | b9adb4a6 | bellard | |
314 | e2542fe2 | Juan Quintela | #ifdef HOST_WORDS_BIGENDIAN
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315 | f4359b9f | Blue Swirl | s.info.endian = BFD_ENDIAN_BIG; |
316 | b9adb4a6 | bellard | #else
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317 | f4359b9f | Blue Swirl | s.info.endian = BFD_ENDIAN_LITTLE; |
318 | b9adb4a6 | bellard | #endif
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319 | 5826e519 | Stefan Weil | #if defined(CONFIG_TCG_INTERPRETER)
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320 | 5826e519 | Stefan Weil | print_insn = print_insn_tci; |
321 | 5826e519 | Stefan Weil | #elif defined(__i386__)
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322 | f4359b9f | Blue Swirl | s.info.mach = bfd_mach_i386_i386; |
323 | c27004ec | bellard | print_insn = print_insn_i386; |
324 | bc51c5c9 | bellard | #elif defined(__x86_64__)
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325 | f4359b9f | Blue Swirl | s.info.mach = bfd_mach_x86_64; |
326 | c27004ec | bellard | print_insn = print_insn_i386; |
327 | e58ffeb3 | malc | #elif defined(_ARCH_PPC)
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328 | 66d4f6a3 | Richard Henderson | s.info.disassembler_options = (char *)"any"; |
329 | c27004ec | bellard | print_insn = print_insn_ppc; |
330 | a993ba85 | bellard | #elif defined(__alpha__)
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331 | c27004ec | bellard | print_insn = print_insn_alpha; |
332 | aa0aa4fa | bellard | #elif defined(__sparc__)
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333 | c27004ec | bellard | print_insn = print_insn_sparc; |
334 | f4359b9f | Blue Swirl | s.info.mach = bfd_mach_sparc_v9b; |
335 | 5fafdf24 | ths | #elif defined(__arm__)
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336 | c27004ec | bellard | print_insn = print_insn_arm; |
337 | 6af0bf9c | bellard | #elif defined(__MIPSEB__)
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338 | 6af0bf9c | bellard | print_insn = print_insn_big_mips; |
339 | 6af0bf9c | bellard | #elif defined(__MIPSEL__)
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340 | 6af0bf9c | bellard | print_insn = print_insn_little_mips; |
341 | 48024e4a | bellard | #elif defined(__m68k__)
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342 | 48024e4a | bellard | print_insn = print_insn_m68k; |
343 | 8f860bb8 | ths | #elif defined(__s390__)
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344 | 8f860bb8 | ths | print_insn = print_insn_s390; |
345 | f54b3f92 | aurel32 | #elif defined(__hppa__)
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346 | f54b3f92 | aurel32 | print_insn = print_insn_hppa; |
347 | 903ec55c | Aurelien Jarno | #elif defined(__ia64__)
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348 | 903ec55c | Aurelien Jarno | print_insn = print_insn_ia64; |
349 | b9adb4a6 | bellard | #else
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350 | b8076a74 | bellard | fprintf(out, "0x%lx: Asm output not supported on this arch\n",
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351 | b8076a74 | bellard | (long) code);
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352 | c27004ec | bellard | return;
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353 | b9adb4a6 | bellard | #endif
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354 | b0b0f1c9 | Stefan Weil | for (pc = (uintptr_t)code; size > 0; pc += count, size -= count) { |
355 | b0b0f1c9 | Stefan Weil | fprintf(out, "0x%08" PRIxPTR ": ", pc); |
356 | f4359b9f | Blue Swirl | count = print_insn(pc, &s.info); |
357 | b9adb4a6 | bellard | fprintf(out, "\n");
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358 | b9adb4a6 | bellard | if (count < 0) |
359 | b9adb4a6 | bellard | break;
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360 | b9adb4a6 | bellard | } |
361 | b9adb4a6 | bellard | } |
362 | b9adb4a6 | bellard | |
363 | b9adb4a6 | bellard | /* Look up symbol for debugging purpose. Returns "" if unknown. */
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364 | c27004ec | bellard | const char *lookup_symbol(target_ulong orig_addr) |
365 | b9adb4a6 | bellard | { |
366 | 49918a75 | pbrook | const char *symbol = ""; |
367 | e80cfcfc | bellard | struct syminfo *s;
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368 | 3b46e624 | ths | |
369 | e80cfcfc | bellard | for (s = syminfos; s; s = s->next) {
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370 | 49918a75 | pbrook | symbol = s->lookup_symbol(s, orig_addr); |
371 | 49918a75 | pbrook | if (symbol[0] != '\0') { |
372 | 49918a75 | pbrook | break;
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373 | 49918a75 | pbrook | } |
374 | b9adb4a6 | bellard | } |
375 | 49918a75 | pbrook | |
376 | 49918a75 | pbrook | return symbol;
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377 | b9adb4a6 | bellard | } |
378 | 9307c4c1 | bellard | |
379 | 9307c4c1 | bellard | #if !defined(CONFIG_USER_ONLY)
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380 | 9307c4c1 | bellard | |
381 | 83c9089e | Paolo Bonzini | #include "monitor/monitor.h" |
382 | 3d2cfdf1 | bellard | |
383 | 9307c4c1 | bellard | static int monitor_disas_is_physical; |
384 | 9307c4c1 | bellard | |
385 | 9307c4c1 | bellard | static int |
386 | a5f1b965 | blueswir1 | monitor_read_memory (bfd_vma memaddr, bfd_byte *myaddr, int length,
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387 | a5f1b965 | blueswir1 | struct disassemble_info *info)
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388 | 9307c4c1 | bellard | { |
389 | f4359b9f | Blue Swirl | CPUDebug *s = container_of(info, CPUDebug, info); |
390 | f4359b9f | Blue Swirl | |
391 | 9307c4c1 | bellard | if (monitor_disas_is_physical) {
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392 | 54f7b4a3 | Stefan Weil | cpu_physical_memory_read(memaddr, myaddr, length); |
393 | 9307c4c1 | bellard | } else {
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394 | f4359b9f | Blue Swirl | cpu_memory_rw_debug(s->env, memaddr,myaddr, length, 0);
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395 | 9307c4c1 | bellard | } |
396 | 9307c4c1 | bellard | return 0; |
397 | 9307c4c1 | bellard | } |
398 | 9307c4c1 | bellard | |
399 | 8b7968f7 | Stefan Weil | static int GCC_FMT_ATTR(2, 3) |
400 | 8b7968f7 | Stefan Weil | monitor_fprintf(FILE *stream, const char *fmt, ...) |
401 | 3d2cfdf1 | bellard | { |
402 | 3d2cfdf1 | bellard | va_list ap; |
403 | 3d2cfdf1 | bellard | va_start(ap, fmt); |
404 | 376253ec | aliguori | monitor_vprintf((Monitor *)stream, fmt, ap); |
405 | 3d2cfdf1 | bellard | va_end(ap); |
406 | 3d2cfdf1 | bellard | return 0; |
407 | 3d2cfdf1 | bellard | } |
408 | 3d2cfdf1 | bellard | |
409 | 9349b4f9 | Andreas Färber | void monitor_disas(Monitor *mon, CPUArchState *env,
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410 | 6a00d601 | bellard | target_ulong pc, int nb_insn, int is_physical, int flags) |
411 | 9307c4c1 | bellard | { |
412 | 9307c4c1 | bellard | int count, i;
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413 | f4359b9f | Blue Swirl | CPUDebug s; |
414 | 9307c4c1 | bellard | int (*print_insn)(bfd_vma pc, disassemble_info *info);
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415 | 9307c4c1 | bellard | |
416 | f4359b9f | Blue Swirl | INIT_DISASSEMBLE_INFO(s.info, (FILE *)mon, monitor_fprintf); |
417 | 9307c4c1 | bellard | |
418 | f4359b9f | Blue Swirl | s.env = env; |
419 | 9307c4c1 | bellard | monitor_disas_is_physical = is_physical; |
420 | f4359b9f | Blue Swirl | s.info.read_memory_func = monitor_read_memory; |
421 | f4359b9f | Blue Swirl | s.info.print_address_func = generic_print_target_address; |
422 | 9307c4c1 | bellard | |
423 | f4359b9f | Blue Swirl | s.info.buffer_vma = pc; |
424 | 9307c4c1 | bellard | |
425 | 9307c4c1 | bellard | #ifdef TARGET_WORDS_BIGENDIAN
|
426 | f4359b9f | Blue Swirl | s.info.endian = BFD_ENDIAN_BIG; |
427 | 9307c4c1 | bellard | #else
|
428 | f4359b9f | Blue Swirl | s.info.endian = BFD_ENDIAN_LITTLE; |
429 | 9307c4c1 | bellard | #endif
|
430 | 9307c4c1 | bellard | #if defined(TARGET_I386)
|
431 | f4359b9f | Blue Swirl | if (flags == 2) { |
432 | f4359b9f | Blue Swirl | s.info.mach = bfd_mach_x86_64; |
433 | f4359b9f | Blue Swirl | } else if (flags == 1) { |
434 | f4359b9f | Blue Swirl | s.info.mach = bfd_mach_i386_i8086; |
435 | f4359b9f | Blue Swirl | } else {
|
436 | f4359b9f | Blue Swirl | s.info.mach = bfd_mach_i386_i386; |
437 | f4359b9f | Blue Swirl | } |
438 | 9307c4c1 | bellard | print_insn = print_insn_i386; |
439 | 9307c4c1 | bellard | #elif defined(TARGET_ARM)
|
440 | 9307c4c1 | bellard | print_insn = print_insn_arm; |
441 | cbd669da | ths | #elif defined(TARGET_ALPHA)
|
442 | cbd669da | ths | print_insn = print_insn_alpha; |
443 | 9307c4c1 | bellard | #elif defined(TARGET_SPARC)
|
444 | 9307c4c1 | bellard | print_insn = print_insn_sparc; |
445 | 682c4f15 | blueswir1 | #ifdef TARGET_SPARC64
|
446 | f4359b9f | Blue Swirl | s.info.mach = bfd_mach_sparc_v9b; |
447 | 682c4f15 | blueswir1 | #endif
|
448 | 9307c4c1 | bellard | #elif defined(TARGET_PPC)
|
449 | a2458627 | bellard | #ifdef TARGET_PPC64
|
450 | f4359b9f | Blue Swirl | s.info.mach = bfd_mach_ppc64; |
451 | a2458627 | bellard | #else
|
452 | f4359b9f | Blue Swirl | s.info.mach = bfd_mach_ppc; |
453 | a2458627 | bellard | #endif
|
454 | 9307c4c1 | bellard | print_insn = print_insn_ppc; |
455 | e6e5906b | pbrook | #elif defined(TARGET_M68K)
|
456 | e6e5906b | pbrook | print_insn = print_insn_m68k; |
457 | 6af0bf9c | bellard | #elif defined(TARGET_MIPS)
|
458 | 76b3030c | bellard | #ifdef TARGET_WORDS_BIGENDIAN
|
459 | 6af0bf9c | bellard | print_insn = print_insn_big_mips; |
460 | 76b3030c | bellard | #else
|
461 | 76b3030c | bellard | print_insn = print_insn_little_mips; |
462 | 76b3030c | bellard | #endif
|
463 | b4e1f077 | Magnus Damm | #elif defined(TARGET_SH4)
|
464 | f4359b9f | Blue Swirl | s.info.mach = bfd_mach_sh4; |
465 | b4e1f077 | Magnus Damm | print_insn = print_insn_sh; |
466 | db500609 | Ulrich Hecht | #elif defined(TARGET_S390X)
|
467 | f4359b9f | Blue Swirl | s.info.mach = bfd_mach_s390_64; |
468 | db500609 | Ulrich Hecht | print_insn = print_insn_s390; |
469 | bd86a88e | Anthony Green | #elif defined(TARGET_MOXIE)
|
470 | bd86a88e | Anthony Green | s.info.mach = bfd_arch_moxie; |
471 | bd86a88e | Anthony Green | print_insn = print_insn_moxie; |
472 | 79368f49 | Michael Walle | #elif defined(TARGET_LM32)
|
473 | f4359b9f | Blue Swirl | s.info.mach = bfd_mach_lm32; |
474 | 79368f49 | Michael Walle | print_insn = print_insn_lm32; |
475 | 9307c4c1 | bellard | #else
|
476 | 376253ec | aliguori | monitor_printf(mon, "0x" TARGET_FMT_lx
|
477 | 376253ec | aliguori | ": Asm output not supported on this arch\n", pc);
|
478 | 9307c4c1 | bellard | return;
|
479 | 9307c4c1 | bellard | #endif
|
480 | 9307c4c1 | bellard | |
481 | 9307c4c1 | bellard | for(i = 0; i < nb_insn; i++) { |
482 | 376253ec | aliguori | monitor_printf(mon, "0x" TARGET_FMT_lx ": ", pc); |
483 | f4359b9f | Blue Swirl | count = print_insn(pc, &s.info); |
484 | 376253ec | aliguori | monitor_printf(mon, "\n");
|
485 | 9307c4c1 | bellard | if (count < 0) |
486 | 9307c4c1 | bellard | break;
|
487 | 9307c4c1 | bellard | pc += count; |
488 | 9307c4c1 | bellard | } |
489 | 9307c4c1 | bellard | } |
490 | 9307c4c1 | bellard | #endif |