Revision 5a6932d5
| b/fpu/softfloat-specialize.h | ||
|---|---|---|
| 30 | 30 |
|
| 31 | 31 |
=============================================================================*/ |
| 32 | 32 |
|
| 33 |
#if defined(TARGET_MIPS) || defined(TARGET_HPPA) |
|
| 34 |
#define SNAN_BIT_IS_ONE 1 |
|
| 35 |
#else |
|
| 36 |
#define SNAN_BIT_IS_ONE 0 |
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| 37 |
#endif |
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| 38 |
|
|
| 33 | 39 |
/*---------------------------------------------------------------------------- |
| 34 | 40 |
| Underflow tininess-detection mode, statically initialized to default value. |
| 35 | 41 |
| (The declaration in `softfloat.h' must match the `int8' type here.) |
| ... | ... | |
| 45 | 51 |
|
| 46 | 52 |
void float_raise( int8 flags STATUS_PARAM ) |
| 47 | 53 |
{
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| 48 |
|
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STATUS(float_exception_flags) |= flags; |
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|
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} |
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|
| 53 | 57 |
/*---------------------------------------------------------------------------- |
| ... | ... | |
| 61 | 65 |
/*---------------------------------------------------------------------------- |
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| The pattern for a default generated single-precision NaN. |
| 63 | 67 |
*----------------------------------------------------------------------------*/ |
| 64 |
#if defined(TARGET_MIPS) || defined(TARGET_HPPA)
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|
| 65 |
#define float32_default_nan 0xFF800000
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|
| 68 |
#if SNAN_BIT_IS_ONE
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|
| 69 |
#define float32_default_nan 0x7FBFFFFF
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|
| 66 | 70 |
#else |
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#define float32_default_nan 0xFFC00000 |
| 68 | 72 |
#endif |
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|
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/*---------------------------------------------------------------------------- |
| 71 |
| Returns 1 if the single-precision floating-point value `a' is a NaN;
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| otherwise returns 0. |
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| Returns 1 if the single-precision floating-point value `a' is a quiet
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| NaN; otherwise returns 0.
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|
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*----------------------------------------------------------------------------*/ |
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|
| 75 | 79 |
int float32_is_nan( float32 a ) |
| 76 | 80 |
{
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#if defined(TARGET_MIPS) || defined(TARGET_HPPA)
|
|
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#if SNAN_BIT_IS_ONE
|
|
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return ( ( ( a>>22 ) & 0x1FF ) == 0x1FE ) && ( a & 0x003FFFFF ); |
| 79 | 83 |
#else |
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return ( 0xFF800000 <= (bits32) ( a<<1 ) ); |
| ... | ... | |
| 88 | 92 |
|
| 89 | 93 |
int float32_is_signaling_nan( float32 a ) |
| 90 | 94 |
{
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#if defined(TARGET_MIPS) || defined(TARGET_HPPA)
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#if SNAN_BIT_IS_ONE
|
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return ( 0xFF800000 <= (bits32) ( a<<1 ) ); |
| 93 | 97 |
#else |
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return ( ( ( a>>22 ) & 0x1FF ) == 0x1FE ) && ( a & 0x003FFFFF ); |
| ... | ... | |
| 110 | 114 |
z.low = 0; |
| 111 | 115 |
z.high = ( (bits64) a )<<41; |
| 112 | 116 |
return z; |
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|
|
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} |
| 115 | 118 |
|
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/*---------------------------------------------------------------------------- |
| ... | ... | |
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|
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static float32 commonNaNToFloat32( commonNaNT a ) |
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{
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|
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return ( ( (bits32) a.sign )<<31 ) | 0x7FC00000 | ( a.high>>41 ); |
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|
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} |
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|
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/*---------------------------------------------------------------------------- |
| ... | ... | |
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aIsSignalingNaN = float32_is_signaling_nan( a ); |
| 140 | 141 |
bIsNaN = float32_is_nan( b ); |
| 141 | 142 |
bIsSignalingNaN = float32_is_signaling_nan( b ); |
| 142 |
#if defined(TARGET_MIPS) || defined(TARGET_HPPA)
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|
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#if SNAN_BIT_IS_ONE
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|
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a &= ~0x00400000; |
| 144 | 145 |
b &= ~0x00400000; |
| 145 | 146 |
#else |
| ... | ... | |
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else {
|
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return b; |
| 163 | 164 |
} |
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|
|
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} |
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|
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/*---------------------------------------------------------------------------- |
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| The pattern for a default generated double-precision NaN. |
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*----------------------------------------------------------------------------*/ |
| 170 |
#if defined(TARGET_MIPS) || defined(TARGET_HPPA)
|
|
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#define float64_default_nan LIT64( 0xFFF0000000000000 )
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|
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#if SNAN_BIT_IS_ONE
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#define float64_default_nan LIT64( 0x7FF7FFFFFFFFFFFF )
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|
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#else |
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#define float64_default_nan LIT64( 0xFFF8000000000000 ) |
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#endif |
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|
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/*---------------------------------------------------------------------------- |
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| Returns 1 if the double-precision floating-point value `a' is a NaN;
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| otherwise returns 0. |
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| Returns 1 if the double-precision floating-point value `a' is a quiet
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| NaN; otherwise returns 0.
|
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*----------------------------------------------------------------------------*/ |
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|
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int float64_is_nan( float64 a ) |
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{
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#if defined(TARGET_MIPS) || defined(TARGET_HPPA)
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#if SNAN_BIT_IS_ONE
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|
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return |
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( ( ( a>>51 ) & 0xFFF ) == 0xFFE ) |
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&& ( a & LIT64( 0x0007FFFFFFFFFFFF ) ); |
| ... | ... | |
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|
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int float64_is_signaling_nan( float64 a ) |
| 198 | 198 |
{
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#if defined(TARGET_MIPS) || defined(TARGET_HPPA)
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#if SNAN_BIT_IS_ONE
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|
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return ( LIT64( 0xFFF0000000000000 ) <= (bits64) ( a<<1 ) ); |
| 201 | 201 |
#else |
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return |
| ... | ... | |
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z.low = 0; |
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z.high = a<<12; |
| 222 | 222 |
return z; |
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|
|
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} |
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|
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/*---------------------------------------------------------------------------- |
| ... | ... | |
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|
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static float64 commonNaNToFloat64( commonNaNT a ) |
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{
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|
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return |
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( ( (bits64) a.sign )<<63 ) |
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| LIT64( 0x7FF8000000000000 ) |
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| ( a.high>>12 ); |
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|
|
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} |
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|
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/*---------------------------------------------------------------------------- |
| ... | ... | |
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aIsSignalingNaN = float64_is_signaling_nan( a ); |
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bIsNaN = float64_is_nan( b ); |
| 254 | 251 |
bIsSignalingNaN = float64_is_signaling_nan( b ); |
| 255 |
#if defined(TARGET_MIPS) || defined(TARGET_HPPA)
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|
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#if SNAN_BIT_IS_ONE
|
|
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a &= ~LIT64( 0x0008000000000000 ); |
| 257 | 254 |
b &= ~LIT64( 0x0008000000000000 ); |
| 258 | 255 |
#else |
| ... | ... | |
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else {
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return b; |
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} |
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|
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} |
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|
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#ifdef FLOATX80 |
| ... | ... | |
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| `high' and `low' values hold the most- and least-significant bits, |
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| respectively. |
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*----------------------------------------------------------------------------*/ |
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#if SNAN_BIT_IS_ONE |
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#define floatx80_default_nan_high 0x7FFF |
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#define floatx80_default_nan_low LIT64( 0xBFFFFFFFFFFFFFFF ) |
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#else |
|
| 287 | 287 |
#define floatx80_default_nan_high 0xFFFF |
| 288 | 288 |
#define floatx80_default_nan_low LIT64( 0xC000000000000000 ) |
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#endif |
|
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|
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/*---------------------------------------------------------------------------- |
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| Returns 1 if the extended double-precision floating-point value `a' is a |
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| NaN; otherwise returns 0. |
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| quiet NaN; otherwise returns 0.
|
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*----------------------------------------------------------------------------*/ |
| 294 | 295 |
|
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int floatx80_is_nan( floatx80 a ) |
| 296 | 297 |
{
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#if SNAN_BIT_IS_ONE |
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bits64 aLow; |
|
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aLow = a.low & ~ LIT64( 0x4000000000000000 ); |
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return |
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( ( a.high & 0x7FFF ) == 0x7FFF ) |
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&& (bits64) ( aLow<<1 ) |
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&& ( a.low == aLow ); |
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#else |
|
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return ( ( a.high & 0x7FFF ) == 0x7FFF ) && (bits64) ( a.low<<1 ); |
| 299 |
|
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#endif |
|
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} |
| 301 | 310 |
|
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/*---------------------------------------------------------------------------- |
| ... | ... | |
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|
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int floatx80_is_signaling_nan( floatx80 a ) |
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{
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#if SNAN_BIT_IS_ONE |
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return ( ( a.high & 0x7FFF ) == 0x7FFF ) && (bits64) ( a.low<<1 ); |
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#else |
|
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bits64 aLow; |
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|
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aLow = a.low & ~ LIT64( 0x4000000000000000 ); |
| ... | ... | |
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( ( a.high & 0x7FFF ) == 0x7FFF ) |
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&& (bits64) ( aLow<<1 ) |
| 315 | 327 |
&& ( a.low == aLow ); |
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|
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#endif |
|
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} |
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|
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/*---------------------------------------------------------------------------- |
| ... | ... | |
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z.low = 0; |
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z.high = a.low<<1; |
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return z; |
| 334 |
|
|
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} |
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|
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/*---------------------------------------------------------------------------- |
| ... | ... | |
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z.low = LIT64( 0xC000000000000000 ) | ( a.high>>1 ); |
| 347 | 358 |
z.high = ( ( (bits16) a.sign )<<15 ) | 0x7FFF; |
| 348 | 359 |
return z; |
| 349 |
|
|
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} |
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|
| 352 | 362 |
/*---------------------------------------------------------------------------- |
| ... | ... | |
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aIsSignalingNaN = floatx80_is_signaling_nan( a ); |
| 364 | 374 |
bIsNaN = floatx80_is_nan( b ); |
| 365 | 375 |
bIsSignalingNaN = floatx80_is_signaling_nan( b ); |
| 376 |
#if SNAN_BIT_IS_ONE |
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a.low &= ~LIT64( 0xC000000000000000 ); |
|
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b.low &= ~LIT64( 0xC000000000000000 ); |
|
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#else |
|
| 366 | 380 |
a.low |= LIT64( 0xC000000000000000 ); |
| 367 | 381 |
b.low |= LIT64( 0xC000000000000000 ); |
| 382 |
#endif |
|
| 368 | 383 |
if ( aIsSignalingNaN | bIsSignalingNaN ) float_raise( float_flag_invalid STATUS_VAR); |
| 369 | 384 |
if ( aIsSignalingNaN ) {
|
| 370 | 385 |
if ( bIsSignalingNaN ) goto returnLargerSignificand; |
| ... | ... | |
| 380 | 395 |
else {
|
| 381 | 396 |
return b; |
| 382 | 397 |
} |
| 383 |
|
|
| 384 | 398 |
} |
| 385 | 399 |
|
| 386 | 400 |
#endif |
| ... | ... | |
| 391 | 405 |
| The pattern for a default generated quadruple-precision NaN. The `high' and |
| 392 | 406 |
| `low' values hold the most- and least-significant bits, respectively. |
| 393 | 407 |
*----------------------------------------------------------------------------*/ |
| 408 |
#if SNAN_BIT_IS_ONE |
|
| 409 |
#define float128_default_nan_high LIT64( 0x7FFF7FFFFFFFFFFF ) |
|
| 410 |
#define float128_default_nan_low LIT64( 0xFFFFFFFFFFFFFFFF ) |
|
| 411 |
#else |
|
| 394 | 412 |
#define float128_default_nan_high LIT64( 0xFFFF800000000000 ) |
| 395 | 413 |
#define float128_default_nan_low LIT64( 0x0000000000000000 ) |
| 414 |
#endif |
|
| 396 | 415 |
|
| 397 | 416 |
/*---------------------------------------------------------------------------- |
| 398 |
| Returns 1 if the quadruple-precision floating-point value `a' is a NaN;
|
|
| 399 |
| otherwise returns 0. |
|
| 417 |
| Returns 1 if the quadruple-precision floating-point value `a' is a quiet
|
|
| 418 |
| NaN; otherwise returns 0.
|
|
| 400 | 419 |
*----------------------------------------------------------------------------*/ |
| 401 | 420 |
|
| 402 | 421 |
int float128_is_nan( float128 a ) |
| 403 | 422 |
{
|
| 404 |
|
|
| 423 |
#if SNAN_BIT_IS_ONE |
|
| 424 |
return |
|
| 425 |
( ( ( a.high>>47 ) & 0xFFFF ) == 0xFFFE ) |
|
| 426 |
&& ( a.low || ( a.high & LIT64( 0x00007FFFFFFFFFFF ) ) ); |
|
| 427 |
#else |
|
| 405 | 428 |
return |
| 406 | 429 |
( LIT64( 0xFFFE000000000000 ) <= (bits64) ( a.high<<1 ) ) |
| 407 | 430 |
&& ( a.low || ( a.high & LIT64( 0x0000FFFFFFFFFFFF ) ) ); |
| 408 |
|
|
| 431 |
#endif |
|
| 409 | 432 |
} |
| 410 | 433 |
|
| 411 | 434 |
/*---------------------------------------------------------------------------- |
| ... | ... | |
| 415 | 438 |
|
| 416 | 439 |
int float128_is_signaling_nan( float128 a ) |
| 417 | 440 |
{
|
| 418 |
|
|
| 441 |
#if SNAN_BIT_IS_ONE |
|
| 442 |
return |
|
| 443 |
( LIT64( 0xFFFE000000000000 ) <= (bits64) ( a.high<<1 ) ) |
|
| 444 |
&& ( a.low || ( a.high & LIT64( 0x0000FFFFFFFFFFFF ) ) ); |
|
| 445 |
#else |
|
| 419 | 446 |
return |
| 420 | 447 |
( ( ( a.high>>47 ) & 0xFFFF ) == 0xFFFE ) |
| 421 | 448 |
&& ( a.low || ( a.high & LIT64( 0x00007FFFFFFFFFFF ) ) ); |
| 422 |
|
|
| 449 |
#endif |
|
| 423 | 450 |
} |
| 424 | 451 |
|
| 425 | 452 |
/*---------------------------------------------------------------------------- |
| ... | ... | |
| 436 | 463 |
z.sign = a.high>>63; |
| 437 | 464 |
shortShift128Left( a.high, a.low, 16, &z.high, &z.low ); |
| 438 | 465 |
return z; |
| 439 |
|
|
| 440 | 466 |
} |
| 441 | 467 |
|
| 442 | 468 |
/*---------------------------------------------------------------------------- |
| ... | ... | |
| 451 | 477 |
shift128Right( a.high, a.low, 16, &z.high, &z.low ); |
| 452 | 478 |
z.high |= ( ( (bits64) a.sign )<<63 ) | LIT64( 0x7FFF800000000000 ); |
| 453 | 479 |
return z; |
| 454 |
|
|
| 455 | 480 |
} |
| 456 | 481 |
|
| 457 | 482 |
/*---------------------------------------------------------------------------- |
| ... | ... | |
| 468 | 493 |
aIsSignalingNaN = float128_is_signaling_nan( a ); |
| 469 | 494 |
bIsNaN = float128_is_nan( b ); |
| 470 | 495 |
bIsSignalingNaN = float128_is_signaling_nan( b ); |
| 496 |
#if SNAN_BIT_IS_ONE |
|
| 497 |
a.high &= ~LIT64( 0x0000800000000000 ); |
|
| 498 |
b.high &= ~LIT64( 0x0000800000000000 ); |
|
| 499 |
#else |
|
| 471 | 500 |
a.high |= LIT64( 0x0000800000000000 ); |
| 472 | 501 |
b.high |= LIT64( 0x0000800000000000 ); |
| 502 |
#endif |
|
| 473 | 503 |
if ( aIsSignalingNaN | bIsSignalingNaN ) float_raise( float_flag_invalid STATUS_VAR); |
| 474 | 504 |
if ( aIsSignalingNaN ) {
|
| 475 | 505 |
if ( bIsSignalingNaN ) goto returnLargerSignificand; |
| ... | ... | |
| 485 | 515 |
else {
|
| 486 | 516 |
return b; |
| 487 | 517 |
} |
| 488 |
|
|
| 489 | 518 |
} |
| 490 | 519 |
|
| 491 | 520 |
#endif |
| 492 |
|
|
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