root / tcg / tcg.h @ 5b50e790
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/*
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* Tiny Code Generator for QEMU
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*
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* Copyright (c) 2008 Fabrice Bellard
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*
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* Permission is hereby granted, free of charge, to any person obtaining a copy
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* of this software and associated documentation files (the "Software"), to deal
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* in the Software without restriction, including without limitation the rights
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* to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
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* copies of the Software, and to permit persons to whom the Software is
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* furnished to do so, subject to the following conditions:
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*
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* The above copyright notice and this permission notice shall be included in
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* all copies or substantial portions of the Software.
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*
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* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
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* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
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* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
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* THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
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* LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
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* OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
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* THE SOFTWARE.
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*/
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#include "qemu-common.h" |
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/* Target word size (must be identical to pointer size). */
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#if UINTPTR_MAX == UINT32_MAX
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# define TCG_TARGET_REG_BITS 32 |
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#elif UINTPTR_MAX == UINT64_MAX
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# define TCG_TARGET_REG_BITS 64 |
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#else
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# error Unknown pointer size for tcg target |
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#endif
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#if TCG_TARGET_REG_BITS == 32 |
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typedef int32_t tcg_target_long;
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typedef uint32_t tcg_target_ulong;
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#define TCG_PRIlx PRIx32
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#define TCG_PRIld PRId32
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#elif TCG_TARGET_REG_BITS == 64 |
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typedef int64_t tcg_target_long;
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typedef uint64_t tcg_target_ulong;
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#define TCG_PRIlx PRIx64
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#define TCG_PRIld PRId64
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#else
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#error unsupported
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#endif
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#include "tcg-target.h" |
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#include "tcg-runtime.h" |
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#if TCG_TARGET_NB_REGS <= 32 |
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typedef uint32_t TCGRegSet;
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#elif TCG_TARGET_NB_REGS <= 64 |
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typedef uint64_t TCGRegSet;
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#else
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#error unsupported
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#endif
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#if TCG_TARGET_REG_BITS == 32 |
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/* Turn some undef macros into false macros. */
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#define TCG_TARGET_HAS_div_i64 0 |
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#define TCG_TARGET_HAS_rem_i64 0 |
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#define TCG_TARGET_HAS_div2_i64 0 |
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#define TCG_TARGET_HAS_rot_i64 0 |
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#define TCG_TARGET_HAS_ext8s_i64 0 |
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#define TCG_TARGET_HAS_ext16s_i64 0 |
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#define TCG_TARGET_HAS_ext32s_i64 0 |
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#define TCG_TARGET_HAS_ext8u_i64 0 |
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#define TCG_TARGET_HAS_ext16u_i64 0 |
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#define TCG_TARGET_HAS_ext32u_i64 0 |
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#define TCG_TARGET_HAS_bswap16_i64 0 |
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#define TCG_TARGET_HAS_bswap32_i64 0 |
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#define TCG_TARGET_HAS_bswap64_i64 0 |
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#define TCG_TARGET_HAS_neg_i64 0 |
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#define TCG_TARGET_HAS_not_i64 0 |
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#define TCG_TARGET_HAS_andc_i64 0 |
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#define TCG_TARGET_HAS_orc_i64 0 |
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#define TCG_TARGET_HAS_eqv_i64 0 |
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#define TCG_TARGET_HAS_nand_i64 0 |
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#define TCG_TARGET_HAS_nor_i64 0 |
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#define TCG_TARGET_HAS_deposit_i64 0 |
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#define TCG_TARGET_HAS_movcond_i64 0 |
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#define TCG_TARGET_HAS_add2_i64 0 |
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#define TCG_TARGET_HAS_sub2_i64 0 |
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#define TCG_TARGET_HAS_mulu2_i64 0 |
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#define TCG_TARGET_HAS_muls2_i64 0 |
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/* Turn some undef macros into true macros. */
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#define TCG_TARGET_HAS_add2_i32 1 |
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#define TCG_TARGET_HAS_sub2_i32 1 |
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#define TCG_TARGET_HAS_mulu2_i32 1 |
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#endif
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#ifndef TCG_TARGET_deposit_i32_valid
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#define TCG_TARGET_deposit_i32_valid(ofs, len) 1 |
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#endif
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#ifndef TCG_TARGET_deposit_i64_valid
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#define TCG_TARGET_deposit_i64_valid(ofs, len) 1 |
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#endif
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/* Only one of DIV or DIV2 should be defined. */
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#if defined(TCG_TARGET_HAS_div_i32)
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#define TCG_TARGET_HAS_div2_i32 0 |
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#elif defined(TCG_TARGET_HAS_div2_i32)
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#define TCG_TARGET_HAS_div_i32 0 |
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#define TCG_TARGET_HAS_rem_i32 0 |
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#endif
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#if defined(TCG_TARGET_HAS_div_i64)
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#define TCG_TARGET_HAS_div2_i64 0 |
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#elif defined(TCG_TARGET_HAS_div2_i64)
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#define TCG_TARGET_HAS_div_i64 0 |
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#define TCG_TARGET_HAS_rem_i64 0 |
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#endif
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typedef enum TCGOpcode { |
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#define DEF(name, oargs, iargs, cargs, flags) INDEX_op_ ## name, |
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#include "tcg-opc.h" |
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#undef DEF
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NB_OPS, |
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} TCGOpcode; |
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#define tcg_regset_clear(d) (d) = 0 |
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#define tcg_regset_set(d, s) (d) = (s)
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#define tcg_regset_set32(d, reg, val32) (d) |= (val32) << (reg)
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#define tcg_regset_set_reg(d, r) (d) |= 1L << (r) |
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#define tcg_regset_reset_reg(d, r) (d) &= ~(1L << (r)) |
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#define tcg_regset_test_reg(d, r) (((d) >> (r)) & 1) |
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#define tcg_regset_or(d, a, b) (d) = (a) | (b)
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#define tcg_regset_and(d, a, b) (d) = (a) & (b)
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#define tcg_regset_andnot(d, a, b) (d) = (a) & ~(b)
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#define tcg_regset_not(d, a) (d) = ~(a)
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typedef struct TCGRelocation { |
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struct TCGRelocation *next;
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int type;
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uint8_t *ptr; |
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tcg_target_long addend; |
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} TCGRelocation; |
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typedef struct TCGLabel { |
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int has_value;
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union {
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tcg_target_ulong value; |
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TCGRelocation *first_reloc; |
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} u; |
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} TCGLabel; |
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typedef struct TCGPool { |
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struct TCGPool *next;
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int size;
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uint8_t data[0] __attribute__ ((aligned));
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} TCGPool; |
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#define TCG_POOL_CHUNK_SIZE 32768 |
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#define TCG_MAX_LABELS 512 |
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#define TCG_MAX_TEMPS 512 |
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/* when the size of the arguments of a called function is smaller than
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this value, they are statically allocated in the TB stack frame */
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#define TCG_STATIC_CALL_ARGS_SIZE 128 |
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typedef enum TCGType { |
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TCG_TYPE_I32, |
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TCG_TYPE_I64, |
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TCG_TYPE_COUNT, /* number of different types */
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/* An alias for the size of the host register. */
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#if TCG_TARGET_REG_BITS == 32 |
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TCG_TYPE_REG = TCG_TYPE_I32, |
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#else
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TCG_TYPE_REG = TCG_TYPE_I64, |
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#endif
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/* An alias for the size of the native pointer. We don't currently
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support any hosts with 64-bit registers and 32-bit pointers. */
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TCG_TYPE_PTR = TCG_TYPE_REG, |
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/* An alias for the size of the target "long", aka register. */
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#if TARGET_LONG_BITS == 64 |
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TCG_TYPE_TL = TCG_TYPE_I64, |
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#else
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TCG_TYPE_TL = TCG_TYPE_I32, |
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#endif
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} TCGType; |
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typedef tcg_target_ulong TCGArg;
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/* Define a type and accessor macros for variables. Using a struct is
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nice because it gives some level of type safely. Ideally the compiler
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be able to see through all this. However in practice this is not true,
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especially on targets with braindamaged ABIs (e.g. i386).
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We use plain int by default to avoid this runtime overhead.
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Users of tcg_gen_* don't need to know about any of this, and should
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treat TCGv as an opaque type.
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In addition we do typechecking for different types of variables. TCGv_i32
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and TCGv_i64 are 32/64-bit variables respectively. TCGv and TCGv_ptr
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are aliases for target_ulong and host pointer sized values respectively.
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*/
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#if defined(CONFIG_QEMU_LDST_OPTIMIZATION) && defined(CONFIG_SOFTMMU)
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/* Macros/structures for qemu_ld/st IR code optimization:
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TCG_MAX_HELPER_LABELS is defined as same as OPC_BUF_SIZE in exec-all.h. */
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#define TCG_MAX_QEMU_LDST 640 |
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typedef struct TCGLabelQemuLdst { |
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int is_ld:1; /* qemu_ld: 1, qemu_st: 0 */ |
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int opc:4; |
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int addrlo_reg; /* reg index for low word of guest virtual addr */ |
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int addrhi_reg; /* reg index for high word of guest virtual addr */ |
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int datalo_reg; /* reg index for low word to be loaded or stored */ |
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int datahi_reg; /* reg index for high word to be loaded or stored */ |
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int mem_index; /* soft MMU memory index */ |
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uint8_t *raddr; /* gen code addr of the next IR of qemu_ld/st IR */
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uint8_t *label_ptr[2]; /* label pointers to be updated */ |
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} TCGLabelQemuLdst; |
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#endif
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#ifdef CONFIG_DEBUG_TCG
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#define DEBUG_TCGV 1 |
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#endif
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#ifdef DEBUG_TCGV
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typedef struct |
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{ |
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int i32;
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} TCGv_i32; |
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typedef struct |
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{ |
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int i64;
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} TCGv_i64; |
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typedef struct { |
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int iptr;
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} TCGv_ptr; |
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#define MAKE_TCGV_I32(i) __extension__ \
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({ TCGv_i32 make_tcgv_tmp = {i}; make_tcgv_tmp;}) |
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#define MAKE_TCGV_I64(i) __extension__ \
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({ TCGv_i64 make_tcgv_tmp = {i}; make_tcgv_tmp;}) |
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#define MAKE_TCGV_PTR(i) __extension__ \
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({ TCGv_ptr make_tcgv_tmp = {i}; make_tcgv_tmp; }) |
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#define GET_TCGV_I32(t) ((t).i32)
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#define GET_TCGV_I64(t) ((t).i64)
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#define GET_TCGV_PTR(t) ((t).iptr)
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#if TCG_TARGET_REG_BITS == 32 |
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#define TCGV_LOW(t) MAKE_TCGV_I32(GET_TCGV_I64(t))
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#define TCGV_HIGH(t) MAKE_TCGV_I32(GET_TCGV_I64(t) + 1) |
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#endif
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#else /* !DEBUG_TCGV */ |
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typedef int TCGv_i32; |
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typedef int TCGv_i64; |
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#if TCG_TARGET_REG_BITS == 32 |
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#define TCGv_ptr TCGv_i32
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#else
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#define TCGv_ptr TCGv_i64
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#endif
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#define MAKE_TCGV_I32(x) (x)
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#define MAKE_TCGV_I64(x) (x)
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#define MAKE_TCGV_PTR(x) (x)
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#define GET_TCGV_I32(t) (t)
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#define GET_TCGV_I64(t) (t)
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#define GET_TCGV_PTR(t) (t)
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#if TCG_TARGET_REG_BITS == 32 |
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#define TCGV_LOW(t) (t)
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#define TCGV_HIGH(t) ((t) + 1) |
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#endif
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#endif /* DEBUG_TCGV */ |
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#define TCGV_EQUAL_I32(a, b) (GET_TCGV_I32(a) == GET_TCGV_I32(b))
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#define TCGV_EQUAL_I64(a, b) (GET_TCGV_I64(a) == GET_TCGV_I64(b))
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/* Dummy definition to avoid compiler warnings. */
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#define TCGV_UNUSED_I32(x) x = MAKE_TCGV_I32(-1) |
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#define TCGV_UNUSED_I64(x) x = MAKE_TCGV_I64(-1) |
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#define TCGV_IS_UNUSED_I32(x) (GET_TCGV_I32(x) == -1) |
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#define TCGV_IS_UNUSED_I64(x) (GET_TCGV_I64(x) == -1) |
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/* call flags */
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/* Helper does not read globals (either directly or through an exception). It
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implies TCG_CALL_NO_WRITE_GLOBALS. */
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#define TCG_CALL_NO_READ_GLOBALS 0x0010 |
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/* Helper does not write globals */
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#define TCG_CALL_NO_WRITE_GLOBALS 0x0020 |
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/* Helper can be safely suppressed if the return value is not used. */
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#define TCG_CALL_NO_SIDE_EFFECTS 0x0040 |
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/* convenience version of most used call flags */
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#define TCG_CALL_NO_RWG TCG_CALL_NO_READ_GLOBALS
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#define TCG_CALL_NO_WG TCG_CALL_NO_WRITE_GLOBALS
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#define TCG_CALL_NO_SE TCG_CALL_NO_SIDE_EFFECTS
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#define TCG_CALL_NO_RWG_SE (TCG_CALL_NO_RWG | TCG_CALL_NO_SE)
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#define TCG_CALL_NO_WG_SE (TCG_CALL_NO_WG | TCG_CALL_NO_SE)
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/* used to align parameters */
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#define TCG_CALL_DUMMY_TCGV MAKE_TCGV_I32(-1) |
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#define TCG_CALL_DUMMY_ARG ((TCGArg)(-1)) |
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/* Conditions. Note that these are laid out for easy manipulation by
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the functions below:
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bit 0 is used for inverting;
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bit 1 is signed,
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bit 2 is unsigned,
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bit 3 is used with bit 0 for swapping signed/unsigned. */
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typedef enum { |
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/* non-signed */
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TCG_COND_NEVER = 0 | 0 | 0 | 0, |
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TCG_COND_ALWAYS = 0 | 0 | 0 | 1, |
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TCG_COND_EQ = 8 | 0 | 0 | 0, |
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TCG_COND_NE = 8 | 0 | 0 | 1, |
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/* signed */
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TCG_COND_LT = 0 | 0 | 2 | 0, |
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TCG_COND_GE = 0 | 0 | 2 | 1, |
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TCG_COND_LE = 8 | 0 | 2 | 0, |
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TCG_COND_GT = 8 | 0 | 2 | 1, |
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/* unsigned */
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TCG_COND_LTU = 0 | 4 | 0 | 0, |
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TCG_COND_GEU = 0 | 4 | 0 | 1, |
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TCG_COND_LEU = 8 | 4 | 0 | 0, |
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TCG_COND_GTU = 8 | 4 | 0 | 1, |
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} TCGCond; |
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/* Invert the sense of the comparison. */
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static inline TCGCond tcg_invert_cond(TCGCond c) |
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{ |
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return (TCGCond)(c ^ 1); |
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} |
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/* Swap the operands in a comparison. */
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static inline TCGCond tcg_swap_cond(TCGCond c) |
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{ |
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return c & 6 ? (TCGCond)(c ^ 9) : c; |
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} |
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/* Create an "unsigned" version of a "signed" comparison. */
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static inline TCGCond tcg_unsigned_cond(TCGCond c) |
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{ |
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return c & 2 ? (TCGCond)(c ^ 6) : c; |
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} |
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/* Must a comparison be considered unsigned? */
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static inline bool is_unsigned_cond(TCGCond c) |
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{ |
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return (c & 4) != 0; |
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} |
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/* Create a "high" version of a double-word comparison.
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This removes equality from a LTE or GTE comparison. */
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static inline TCGCond tcg_high_cond(TCGCond c) |
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{ |
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switch (c) {
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case TCG_COND_GE:
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case TCG_COND_LE:
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case TCG_COND_GEU:
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case TCG_COND_LEU:
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return (TCGCond)(c ^ 8); |
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default:
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return c;
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} |
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} |
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#define TEMP_VAL_DEAD 0 |
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#define TEMP_VAL_REG 1 |
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#define TEMP_VAL_MEM 2 |
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#define TEMP_VAL_CONST 3 |
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|
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/* XXX: optimize memory layout */
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typedef struct TCGTemp { |
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TCGType base_type; |
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TCGType type; |
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int val_type;
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int reg;
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tcg_target_long val; |
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int mem_reg;
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tcg_target_long mem_offset; |
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unsigned int fixed_reg:1; |
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unsigned int mem_coherent:1; |
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unsigned int mem_allocated:1; |
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unsigned int temp_local:1; /* If true, the temp is saved across |
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basic blocks. Otherwise, it is not
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preserved across basic blocks. */
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unsigned int temp_allocated:1; /* never used for code gen */ |
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/* index of next free temp of same base type, -1 if end */
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int next_free_temp;
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const char *name; |
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} TCGTemp; |
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typedef struct TCGHelperInfo { |
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tcg_target_ulong func; |
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const char *name; |
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} TCGHelperInfo; |
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typedef struct TCGContext TCGContext; |
402 |
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struct TCGContext {
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uint8_t *pool_cur, *pool_end; |
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TCGPool *pool_first, *pool_current, *pool_first_large; |
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TCGLabel *labels; |
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int nb_labels;
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int nb_globals;
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int nb_temps;
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/* index of free temps, -1 if none */
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int first_free_temp[TCG_TYPE_COUNT * 2]; |
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/* goto_tb support */
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uint8_t *code_buf; |
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uintptr_t *tb_next; |
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uint16_t *tb_next_offset; |
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uint16_t *tb_jmp_offset; /* != NULL if USE_DIRECT_JUMP */
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/* liveness analysis */
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uint16_t *op_dead_args; /* for each operation, each bit tells if the
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corresponding argument is dead */
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uint8_t *op_sync_args; /* for each operation, each bit tells if the
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corresponding output argument needs to be
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sync to memory. */
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/* tells in which temporary a given register is. It does not take
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into account fixed registers */
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int reg_to_temp[TCG_TARGET_NB_REGS];
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TCGRegSet reserved_regs; |
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tcg_target_long current_frame_offset; |
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tcg_target_long frame_start; |
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tcg_target_long frame_end; |
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int frame_reg;
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uint8_t *code_ptr; |
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TCGTemp temps[TCG_MAX_TEMPS]; /* globals first, temps after */
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TCGHelperInfo *helpers; |
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int nb_helpers;
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int allocated_helpers;
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int helpers_sorted;
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|
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#ifdef CONFIG_PROFILER
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/* profiling info */
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int64_t tb_count1; |
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int64_t tb_count; |
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int64_t op_count; /* total insn count */
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int op_count_max; /* max insn per TB */ |
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int64_t temp_count; |
450 |
int temp_count_max;
|
451 |
int64_t del_op_count; |
452 |
int64_t code_in_len; |
453 |
int64_t code_out_len; |
454 |
int64_t interm_time; |
455 |
int64_t code_time; |
456 |
int64_t la_time; |
457 |
int64_t opt_time; |
458 |
int64_t restore_count; |
459 |
int64_t restore_time; |
460 |
#endif
|
461 |
|
462 |
#ifdef CONFIG_DEBUG_TCG
|
463 |
int temps_in_use;
|
464 |
int goto_tb_issue_mask;
|
465 |
#endif
|
466 |
|
467 |
uint16_t gen_opc_buf[OPC_BUF_SIZE]; |
468 |
TCGArg gen_opparam_buf[OPPARAM_BUF_SIZE]; |
469 |
|
470 |
uint16_t *gen_opc_ptr; |
471 |
TCGArg *gen_opparam_ptr; |
472 |
target_ulong gen_opc_pc[OPC_BUF_SIZE]; |
473 |
uint16_t gen_opc_icount[OPC_BUF_SIZE]; |
474 |
uint8_t gen_opc_instr_start[OPC_BUF_SIZE]; |
475 |
|
476 |
/* Code generation */
|
477 |
int code_gen_max_blocks;
|
478 |
uint8_t *code_gen_prologue; |
479 |
uint8_t *code_gen_buffer; |
480 |
size_t code_gen_buffer_size; |
481 |
/* threshold to flush the translated code buffer */
|
482 |
size_t code_gen_buffer_max_size; |
483 |
uint8_t *code_gen_ptr; |
484 |
|
485 |
TBContext tb_ctx; |
486 |
|
487 |
#if defined(CONFIG_QEMU_LDST_OPTIMIZATION) && defined(CONFIG_SOFTMMU)
|
488 |
/* labels info for qemu_ld/st IRs
|
489 |
The labels help to generate TLB miss case codes at the end of TB */
|
490 |
TCGLabelQemuLdst *qemu_ldst_labels; |
491 |
int nb_qemu_ldst_labels;
|
492 |
#endif
|
493 |
}; |
494 |
|
495 |
extern TCGContext tcg_ctx;
|
496 |
|
497 |
/* pool based memory allocation */
|
498 |
|
499 |
void *tcg_malloc_internal(TCGContext *s, int size); |
500 |
void tcg_pool_reset(TCGContext *s);
|
501 |
void tcg_pool_delete(TCGContext *s);
|
502 |
|
503 |
static inline void *tcg_malloc(int size) |
504 |
{ |
505 |
TCGContext *s = &tcg_ctx; |
506 |
uint8_t *ptr, *ptr_end; |
507 |
size = (size + sizeof(long) - 1) & ~(sizeof(long) - 1); |
508 |
ptr = s->pool_cur; |
509 |
ptr_end = ptr + size; |
510 |
if (unlikely(ptr_end > s->pool_end)) {
|
511 |
return tcg_malloc_internal(&tcg_ctx, size);
|
512 |
} else {
|
513 |
s->pool_cur = ptr_end; |
514 |
return ptr;
|
515 |
} |
516 |
} |
517 |
|
518 |
void tcg_context_init(TCGContext *s);
|
519 |
void tcg_prologue_init(TCGContext *s);
|
520 |
void tcg_func_start(TCGContext *s);
|
521 |
|
522 |
int tcg_gen_code(TCGContext *s, uint8_t *gen_code_buf);
|
523 |
int tcg_gen_code_search_pc(TCGContext *s, uint8_t *gen_code_buf, long offset); |
524 |
|
525 |
void tcg_set_frame(TCGContext *s, int reg, |
526 |
tcg_target_long start, tcg_target_long size); |
527 |
|
528 |
TCGv_i32 tcg_global_reg_new_i32(int reg, const char *name); |
529 |
TCGv_i32 tcg_global_mem_new_i32(int reg, tcg_target_long offset,
|
530 |
const char *name); |
531 |
TCGv_i32 tcg_temp_new_internal_i32(int temp_local);
|
532 |
static inline TCGv_i32 tcg_temp_new_i32(void) |
533 |
{ |
534 |
return tcg_temp_new_internal_i32(0); |
535 |
} |
536 |
static inline TCGv_i32 tcg_temp_local_new_i32(void) |
537 |
{ |
538 |
return tcg_temp_new_internal_i32(1); |
539 |
} |
540 |
void tcg_temp_free_i32(TCGv_i32 arg);
|
541 |
char *tcg_get_arg_str_i32(TCGContext *s, char *buf, int buf_size, TCGv_i32 arg); |
542 |
|
543 |
TCGv_i64 tcg_global_reg_new_i64(int reg, const char *name); |
544 |
TCGv_i64 tcg_global_mem_new_i64(int reg, tcg_target_long offset,
|
545 |
const char *name); |
546 |
TCGv_i64 tcg_temp_new_internal_i64(int temp_local);
|
547 |
static inline TCGv_i64 tcg_temp_new_i64(void) |
548 |
{ |
549 |
return tcg_temp_new_internal_i64(0); |
550 |
} |
551 |
static inline TCGv_i64 tcg_temp_local_new_i64(void) |
552 |
{ |
553 |
return tcg_temp_new_internal_i64(1); |
554 |
} |
555 |
void tcg_temp_free_i64(TCGv_i64 arg);
|
556 |
char *tcg_get_arg_str_i64(TCGContext *s, char *buf, int buf_size, TCGv_i64 arg); |
557 |
|
558 |
#if defined(CONFIG_DEBUG_TCG)
|
559 |
/* If you call tcg_clear_temp_count() at the start of a section of
|
560 |
* code which is not supposed to leak any TCG temporaries, then
|
561 |
* calling tcg_check_temp_count() at the end of the section will
|
562 |
* return 1 if the section did in fact leak a temporary.
|
563 |
*/
|
564 |
void tcg_clear_temp_count(void); |
565 |
int tcg_check_temp_count(void); |
566 |
#else
|
567 |
#define tcg_clear_temp_count() do { } while (0) |
568 |
#define tcg_check_temp_count() 0 |
569 |
#endif
|
570 |
|
571 |
void tcg_dump_info(FILE *f, fprintf_function cpu_fprintf);
|
572 |
|
573 |
#define TCG_CT_ALIAS 0x80 |
574 |
#define TCG_CT_IALIAS 0x40 |
575 |
#define TCG_CT_REG 0x01 |
576 |
#define TCG_CT_CONST 0x02 /* any constant of register size */ |
577 |
|
578 |
typedef struct TCGArgConstraint { |
579 |
uint16_t ct; |
580 |
uint8_t alias_index; |
581 |
union {
|
582 |
TCGRegSet regs; |
583 |
} u; |
584 |
} TCGArgConstraint; |
585 |
|
586 |
#define TCG_MAX_OP_ARGS 16 |
587 |
|
588 |
/* Bits for TCGOpDef->flags, 8 bits available. */
|
589 |
enum {
|
590 |
/* Instruction defines the end of a basic block. */
|
591 |
TCG_OPF_BB_END = 0x01,
|
592 |
/* Instruction clobbers call registers and potentially update globals. */
|
593 |
TCG_OPF_CALL_CLOBBER = 0x02,
|
594 |
/* Instruction has side effects: it cannot be removed if its outputs
|
595 |
are not used, and might trigger exceptions. */
|
596 |
TCG_OPF_SIDE_EFFECTS = 0x04,
|
597 |
/* Instruction operands are 64-bits (otherwise 32-bits). */
|
598 |
TCG_OPF_64BIT = 0x08,
|
599 |
/* Instruction is optional and not implemented by the host, or insn
|
600 |
is generic and should not be implemened by the host. */
|
601 |
TCG_OPF_NOT_PRESENT = 0x10,
|
602 |
}; |
603 |
|
604 |
typedef struct TCGOpDef { |
605 |
const char *name; |
606 |
uint8_t nb_oargs, nb_iargs, nb_cargs, nb_args; |
607 |
uint8_t flags; |
608 |
TCGArgConstraint *args_ct; |
609 |
int *sorted_args;
|
610 |
#if defined(CONFIG_DEBUG_TCG)
|
611 |
int used;
|
612 |
#endif
|
613 |
} TCGOpDef; |
614 |
|
615 |
extern TCGOpDef tcg_op_defs[];
|
616 |
extern const size_t tcg_op_defs_max; |
617 |
|
618 |
typedef struct TCGTargetOpDef { |
619 |
TCGOpcode op; |
620 |
const char *args_ct_str[TCG_MAX_OP_ARGS]; |
621 |
} TCGTargetOpDef; |
622 |
|
623 |
#define tcg_abort() \
|
624 |
do {\
|
625 |
fprintf(stderr, "%s:%d: tcg fatal error\n", __FILE__, __LINE__);\
|
626 |
abort();\ |
627 |
} while (0) |
628 |
|
629 |
#ifdef CONFIG_DEBUG_TCG
|
630 |
# define tcg_debug_assert(X) do { assert(X); } while (0) |
631 |
#elif QEMU_GNUC_PREREQ(4, 5) |
632 |
# define tcg_debug_assert(X) \
|
633 |
do { if (!(X)) { __builtin_unreachable(); } } while (0) |
634 |
#else
|
635 |
# define tcg_debug_assert(X) do { (void)(X); } while (0) |
636 |
#endif
|
637 |
|
638 |
void tcg_add_target_add_op_defs(const TCGTargetOpDef *tdefs); |
639 |
|
640 |
#if TCG_TARGET_REG_BITS == 32 |
641 |
#define TCGV_NAT_TO_PTR(n) MAKE_TCGV_PTR(GET_TCGV_I32(n))
|
642 |
#define TCGV_PTR_TO_NAT(n) MAKE_TCGV_I32(GET_TCGV_PTR(n))
|
643 |
|
644 |
#define tcg_const_ptr(V) TCGV_NAT_TO_PTR(tcg_const_i32((tcg_target_long)(V)))
|
645 |
#define tcg_global_reg_new_ptr(R, N) \
|
646 |
TCGV_NAT_TO_PTR(tcg_global_reg_new_i32((R), (N))) |
647 |
#define tcg_global_mem_new_ptr(R, O, N) \
|
648 |
TCGV_NAT_TO_PTR(tcg_global_mem_new_i32((R), (O), (N))) |
649 |
#define tcg_temp_new_ptr() TCGV_NAT_TO_PTR(tcg_temp_new_i32())
|
650 |
#define tcg_temp_free_ptr(T) tcg_temp_free_i32(TCGV_PTR_TO_NAT(T))
|
651 |
#else
|
652 |
#define TCGV_NAT_TO_PTR(n) MAKE_TCGV_PTR(GET_TCGV_I64(n))
|
653 |
#define TCGV_PTR_TO_NAT(n) MAKE_TCGV_I64(GET_TCGV_PTR(n))
|
654 |
|
655 |
#define tcg_const_ptr(V) TCGV_NAT_TO_PTR(tcg_const_i64((tcg_target_long)(V)))
|
656 |
#define tcg_global_reg_new_ptr(R, N) \
|
657 |
TCGV_NAT_TO_PTR(tcg_global_reg_new_i64((R), (N))) |
658 |
#define tcg_global_mem_new_ptr(R, O, N) \
|
659 |
TCGV_NAT_TO_PTR(tcg_global_mem_new_i64((R), (O), (N))) |
660 |
#define tcg_temp_new_ptr() TCGV_NAT_TO_PTR(tcg_temp_new_i64())
|
661 |
#define tcg_temp_free_ptr(T) tcg_temp_free_i64(TCGV_PTR_TO_NAT(T))
|
662 |
#endif
|
663 |
|
664 |
void tcg_gen_callN(TCGContext *s, TCGv_ptr func, unsigned int flags, |
665 |
int sizemask, TCGArg ret, int nargs, TCGArg *args); |
666 |
|
667 |
void tcg_gen_shifti_i64(TCGv_i64 ret, TCGv_i64 arg1,
|
668 |
int c, int right, int arith); |
669 |
|
670 |
TCGArg *tcg_optimize(TCGContext *s, uint16_t *tcg_opc_ptr, TCGArg *args, |
671 |
TCGOpDef *tcg_op_def); |
672 |
|
673 |
/* only used for debugging purposes */
|
674 |
void tcg_register_helper(void *func, const char *name); |
675 |
const char *tcg_helper_get_name(TCGContext *s, void *func); |
676 |
void tcg_dump_ops(TCGContext *s);
|
677 |
|
678 |
void dump_ops(const uint16_t *opc_buf, const TCGArg *opparam_buf); |
679 |
TCGv_i32 tcg_const_i32(int32_t val); |
680 |
TCGv_i64 tcg_const_i64(int64_t val); |
681 |
TCGv_i32 tcg_const_local_i32(int32_t val); |
682 |
TCGv_i64 tcg_const_local_i64(int64_t val); |
683 |
|
684 |
/**
|
685 |
* tcg_qemu_tb_exec:
|
686 |
* @env: CPUArchState * for the CPU
|
687 |
* @tb_ptr: address of generated code for the TB to execute
|
688 |
*
|
689 |
* Start executing code from a given translation block.
|
690 |
* Where translation blocks have been linked, execution
|
691 |
* may proceed from the given TB into successive ones.
|
692 |
* Control eventually returns only when some action is needed
|
693 |
* from the top-level loop: either control must pass to a TB
|
694 |
* which has not yet been directly linked, or an asynchronous
|
695 |
* event such as an interrupt needs handling.
|
696 |
*
|
697 |
* The return value is a pointer to the next TB to execute
|
698 |
* (if known; otherwise zero). This pointer is assumed to be
|
699 |
* 4-aligned, and the bottom two bits are used to return further
|
700 |
* information:
|
701 |
* 0, 1: the link between this TB and the next is via the specified
|
702 |
* TB index (0 or 1). That is, we left the TB via (the equivalent
|
703 |
* of) "goto_tb <index>". The main loop uses this to determine
|
704 |
* how to link the TB just executed to the next.
|
705 |
* 2: we are using instruction counting code generation, and we
|
706 |
* did not start executing this TB because the instruction counter
|
707 |
* would hit zero midway through it. In this case the next-TB pointer
|
708 |
* returned is the TB we were about to execute, and the caller must
|
709 |
* arrange to execute the remaining count of instructions.
|
710 |
* 3: we stopped because the CPU's exit_request flag was set
|
711 |
* (usually meaning that there is an interrupt that needs to be
|
712 |
* handled). The next-TB pointer returned is the TB we were
|
713 |
* about to execute when we noticed the pending exit request.
|
714 |
*
|
715 |
* If the bottom two bits indicate an exit-via-index then the CPU
|
716 |
* state is correctly synchronised and ready for execution of the next
|
717 |
* TB (and in particular the guest PC is the address to execute next).
|
718 |
* Otherwise, we gave up on execution of this TB before it started, and
|
719 |
* the caller must fix up the CPU state by calling cpu_pc_from_tb()
|
720 |
* with the next-TB pointer we return.
|
721 |
*
|
722 |
* Note that TCG targets may use a different definition of tcg_qemu_tb_exec
|
723 |
* to this default (which just calls the prologue.code emitted by
|
724 |
* tcg_target_qemu_prologue()).
|
725 |
*/
|
726 |
#define TB_EXIT_MASK 3 |
727 |
#define TB_EXIT_IDX0 0 |
728 |
#define TB_EXIT_IDX1 1 |
729 |
#define TB_EXIT_ICOUNT_EXPIRED 2 |
730 |
#define TB_EXIT_REQUESTED 3 |
731 |
|
732 |
#if !defined(tcg_qemu_tb_exec)
|
733 |
# define tcg_qemu_tb_exec(env, tb_ptr) \
|
734 |
((tcg_target_ulong (*)(void *, void *))tcg_ctx.code_gen_prologue)(env, \ |
735 |
tb_ptr) |
736 |
#endif
|
737 |
|
738 |
void tcg_register_jit(void *buf, size_t buf_size); |
739 |
|
740 |
#if defined(CONFIG_QEMU_LDST_OPTIMIZATION) && defined(CONFIG_SOFTMMU)
|
741 |
/* Generate TB finalization at the end of block */
|
742 |
void tcg_out_tb_finalize(TCGContext *s);
|
743 |
#endif
|