root / target-i386 / TODO @ 5bc89ef6
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1 | 044ef8ea | bellard | Correctness issues: |
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2 | 044ef8ea | bellard | |
3 | bd7a7b33 | bellard | - some eflags manipulation incorrectly reset the bit 0x2. |
4 | 872929aa | bellard | - SVM: test, cpu save/restore, SMM save/restore. |
5 | 044ef8ea | bellard | - x86_64: lcall/ljmp intel/amd differences ? |
6 | 044ef8ea | bellard | - better code fetch (different exception handling + CS.limit support) |
7 | 044ef8ea | bellard | - user/kernel PUSHL/POPL in helper.c |
8 | 044ef8ea | bellard | - add missing cpuid tests |
9 | 044ef8ea | bellard | - return UD exception if LOCK prefix incorrectly used |
10 | 044ef8ea | bellard | - test ldt limit < 7 ? |
11 | 044ef8ea | bellard | - fix some 16 bit sp push/pop overflow (pusha/popa, lcall lret) |
12 | 044ef8ea | bellard | - full support of segment limit/rights |
13 | 044ef8ea | bellard | - full x87 exception support |
14 | 044ef8ea | bellard | - improve x87 bit exactness (use bochs code ?) |
15 | b8b6a50b | bellard | - DRx register support |
16 | b8b6a50b | bellard | - CR0.AC emulation |
17 | b8b6a50b | bellard | - SSE alignment checks |
18 | b8b6a50b | bellard | - fix SSE min/max with nans |
19 | 044ef8ea | bellard | |
20 | 044ef8ea | bellard | Optimizations/Features: |
21 | 044ef8ea | bellard | |
22 | b8b6a50b | bellard | - add SVM nested paging support |
23 | b8b6a50b | bellard | - add VMX support |
24 | b8b6a50b | bellard | - add AVX support |
25 | b8b6a50b | bellard | - add SSE5 support |
26 | 12e26b75 | bellard | - fxsave/fxrstor AMD extensions |
27 | 12e26b75 | bellard | - improve monitor/mwait support |
28 | 3bd7da9e | bellard | - faster EFLAGS update: consider SZAP, C, O can be updated separately |
29 | 3bd7da9e | bellard | with a bit field in CC_OP and more state variables. |
30 | 044ef8ea | bellard | - evaluate x87 stack pointer statically |
31 | 044ef8ea | bellard | - find a way to avoid translating several time the same TB if CR0.TS |
32 | 044ef8ea | bellard | is set or not. |