root / hw / etraxfs_ser.c @ 5c3234c6
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1 | 83fa1010 | ths | /*
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2 | 83fa1010 | ths | * QEMU ETRAX System Emulator
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3 | 83fa1010 | ths | *
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4 | 83fa1010 | ths | * Copyright (c) 2007 Edgar E. Iglesias, Axis Communications AB.
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5 | 83fa1010 | ths | *
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6 | 83fa1010 | ths | * Permission is hereby granted, free of charge, to any person obtaining a copy
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7 | 83fa1010 | ths | * of this software and associated documentation files (the "Software"), to deal
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8 | 83fa1010 | ths | * in the Software without restriction, including without limitation the rights
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9 | 83fa1010 | ths | * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
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10 | 83fa1010 | ths | * copies of the Software, and to permit persons to whom the Software is
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11 | 83fa1010 | ths | * furnished to do so, subject to the following conditions:
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12 | 83fa1010 | ths | *
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13 | 83fa1010 | ths | * The above copyright notice and this permission notice shall be included in
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14 | 83fa1010 | ths | * all copies or substantial portions of the Software.
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15 | 83fa1010 | ths | *
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16 | 83fa1010 | ths | * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
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17 | 83fa1010 | ths | * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
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18 | 83fa1010 | ths | * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
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19 | 83fa1010 | ths | * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
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20 | 83fa1010 | ths | * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
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21 | 83fa1010 | ths | * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
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22 | 83fa1010 | ths | * THE SOFTWARE.
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23 | 83fa1010 | ths | */
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24 | 83fa1010 | ths | |
25 | 4b816985 | Edgar E. Iglesias | #include "sysbus.h" |
26 | f062058f | edgar_igl | #include "qemu-char.h" |
27 | 83fa1010 | ths | |
28 | bbaf29c7 | edgar_igl | #define D(x)
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29 | bbaf29c7 | edgar_igl | |
30 | 72af9170 | Edgar E. Iglesias | #define RW_TR_CTRL (0x00 / 4) |
31 | 72af9170 | Edgar E. Iglesias | #define RW_TR_DMA_EN (0x04 / 4) |
32 | 72af9170 | Edgar E. Iglesias | #define RW_REC_CTRL (0x08 / 4) |
33 | 72af9170 | Edgar E. Iglesias | #define RW_DOUT (0x1c / 4) |
34 | 72af9170 | Edgar E. Iglesias | #define RS_STAT_DIN (0x20 / 4) |
35 | 72af9170 | Edgar E. Iglesias | #define R_STAT_DIN (0x24 / 4) |
36 | 72af9170 | Edgar E. Iglesias | #define RW_INTR_MASK (0x2c / 4) |
37 | 72af9170 | Edgar E. Iglesias | #define RW_ACK_INTR (0x30 / 4) |
38 | 72af9170 | Edgar E. Iglesias | #define R_INTR (0x34 / 4) |
39 | 72af9170 | Edgar E. Iglesias | #define R_MASKED_INTR (0x38 / 4) |
40 | 72af9170 | Edgar E. Iglesias | #define R_MAX (0x3c / 4) |
41 | 83fa1010 | ths | |
42 | f062058f | edgar_igl | #define STAT_DAV 16 |
43 | f062058f | edgar_igl | #define STAT_TR_IDLE 22 |
44 | f062058f | edgar_igl | #define STAT_TR_RDY 24 |
45 | f062058f | edgar_igl | |
46 | f2964260 | Edgar E. Iglesias | struct etrax_serial
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47 | 83fa1010 | ths | { |
48 | 2a9859e7 | Edgar E. Iglesias | SysBusDevice busdev; |
49 | 2a9859e7 | Edgar E. Iglesias | CharDriverState *chr; |
50 | 2a9859e7 | Edgar E. Iglesias | qemu_irq irq; |
51 | f062058f | edgar_igl | |
52 | 2a9859e7 | Edgar E. Iglesias | int pending_tx;
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53 | f062058f | edgar_igl | |
54 | f2fcffbb | Edgar E. Iglesias | uint8_t rx_fifo[16];
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55 | f2fcffbb | Edgar E. Iglesias | unsigned int rx_fifo_pos; |
56 | f2fcffbb | Edgar E. Iglesias | unsigned int rx_fifo_len; |
57 | f2fcffbb | Edgar E. Iglesias | |
58 | 2a9859e7 | Edgar E. Iglesias | /* Control registers. */
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59 | 2a9859e7 | Edgar E. Iglesias | uint32_t regs[R_MAX]; |
60 | f062058f | edgar_igl | }; |
61 | f062058f | edgar_igl | |
62 | f2964260 | Edgar E. Iglesias | static void ser_update_irq(struct etrax_serial *s) |
63 | f062058f | edgar_igl | { |
64 | 72af9170 | Edgar E. Iglesias | |
65 | f2fcffbb | Edgar E. Iglesias | if (s->rx_fifo_len) {
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66 | f2fcffbb | Edgar E. Iglesias | s->regs[R_INTR] |= 8;
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67 | f2fcffbb | Edgar E. Iglesias | } else {
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68 | f2fcffbb | Edgar E. Iglesias | s->regs[R_INTR] &= ~8;
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69 | f2fcffbb | Edgar E. Iglesias | } |
70 | f2fcffbb | Edgar E. Iglesias | |
71 | f2fcffbb | Edgar E. Iglesias | s->regs[R_MASKED_INTR] = s->regs[R_INTR] & s->regs[RW_INTR_MASK]; |
72 | 2a9859e7 | Edgar E. Iglesias | qemu_set_irq(s->irq, !!s->regs[R_MASKED_INTR]); |
73 | 83fa1010 | ths | } |
74 | f062058f | edgar_igl | |
75 | c227f099 | Anthony Liguori | static uint32_t ser_readl (void *opaque, target_phys_addr_t addr) |
76 | 83fa1010 | ths | { |
77 | 2a9859e7 | Edgar E. Iglesias | struct etrax_serial *s = opaque;
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78 | 2a9859e7 | Edgar E. Iglesias | D(CPUState *env = s->env); |
79 | 2a9859e7 | Edgar E. Iglesias | uint32_t r = 0;
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80 | 2a9859e7 | Edgar E. Iglesias | |
81 | 2a9859e7 | Edgar E. Iglesias | addr >>= 2;
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82 | 2a9859e7 | Edgar E. Iglesias | switch (addr)
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83 | 2a9859e7 | Edgar E. Iglesias | { |
84 | 2a9859e7 | Edgar E. Iglesias | case R_STAT_DIN:
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85 | f2fcffbb | Edgar E. Iglesias | r = s->rx_fifo[(s->rx_fifo_pos - s->rx_fifo_len) & 15];
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86 | f2fcffbb | Edgar E. Iglesias | if (s->rx_fifo_len) {
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87 | f2fcffbb | Edgar E. Iglesias | r |= 1 << STAT_DAV;
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88 | f2fcffbb | Edgar E. Iglesias | } |
89 | f2fcffbb | Edgar E. Iglesias | r |= 1 << STAT_TR_RDY;
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90 | f2fcffbb | Edgar E. Iglesias | r |= 1 << STAT_TR_IDLE;
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91 | 2a9859e7 | Edgar E. Iglesias | break;
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92 | 2a9859e7 | Edgar E. Iglesias | case RS_STAT_DIN:
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93 | f2fcffbb | Edgar E. Iglesias | r = s->rx_fifo[(s->rx_fifo_pos - s->rx_fifo_len) & 15];
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94 | f2fcffbb | Edgar E. Iglesias | if (s->rx_fifo_len) {
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95 | f2fcffbb | Edgar E. Iglesias | r |= 1 << STAT_DAV;
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96 | f2fcffbb | Edgar E. Iglesias | s->rx_fifo_len--; |
97 | f2fcffbb | Edgar E. Iglesias | } |
98 | f2fcffbb | Edgar E. Iglesias | r |= 1 << STAT_TR_RDY;
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99 | f2fcffbb | Edgar E. Iglesias | r |= 1 << STAT_TR_IDLE;
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100 | 2a9859e7 | Edgar E. Iglesias | break;
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101 | 2a9859e7 | Edgar E. Iglesias | default:
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102 | 2a9859e7 | Edgar E. Iglesias | r = s->regs[addr]; |
103 | f2fcffbb | Edgar E. Iglesias | D(printf ("%s " TARGET_FMT_plx "=%x\n", __func__, addr, r)); |
104 | 2a9859e7 | Edgar E. Iglesias | break;
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105 | 2a9859e7 | Edgar E. Iglesias | } |
106 | 2a9859e7 | Edgar E. Iglesias | return r;
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107 | 83fa1010 | ths | } |
108 | 83fa1010 | ths | |
109 | 83fa1010 | ths | static void |
110 | c227f099 | Anthony Liguori | ser_writel (void *opaque, target_phys_addr_t addr, uint32_t value)
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111 | 83fa1010 | ths | { |
112 | 2a9859e7 | Edgar E. Iglesias | struct etrax_serial *s = opaque;
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113 | 2a9859e7 | Edgar E. Iglesias | unsigned char ch = value; |
114 | 2a9859e7 | Edgar E. Iglesias | D(CPUState *env = s->env); |
115 | 2a9859e7 | Edgar E. Iglesias | |
116 | f2fcffbb | Edgar E. Iglesias | D(printf ("%s " TARGET_FMT_plx "=%x\n", __func__, addr, value)); |
117 | 2a9859e7 | Edgar E. Iglesias | addr >>= 2;
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118 | 2a9859e7 | Edgar E. Iglesias | switch (addr)
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119 | 2a9859e7 | Edgar E. Iglesias | { |
120 | 2a9859e7 | Edgar E. Iglesias | case RW_DOUT:
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121 | 2a9859e7 | Edgar E. Iglesias | qemu_chr_write(s->chr, &ch, 1);
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122 | f2fcffbb | Edgar E. Iglesias | s->regs[R_INTR] |= 3;
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123 | 2a9859e7 | Edgar E. Iglesias | s->pending_tx = 1;
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124 | 2a9859e7 | Edgar E. Iglesias | s->regs[addr] = value; |
125 | 2a9859e7 | Edgar E. Iglesias | break;
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126 | 2a9859e7 | Edgar E. Iglesias | case RW_ACK_INTR:
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127 | f2fcffbb | Edgar E. Iglesias | if (s->pending_tx) {
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128 | f2fcffbb | Edgar E. Iglesias | value &= ~1;
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129 | 2a9859e7 | Edgar E. Iglesias | s->pending_tx = 0;
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130 | f2fcffbb | Edgar E. Iglesias | D(printf("fixedup value=%x r_intr=%x\n", value, s->regs[R_INTR]));
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131 | 2a9859e7 | Edgar E. Iglesias | } |
132 | f2fcffbb | Edgar E. Iglesias | s->regs[addr] = value; |
133 | f2fcffbb | Edgar E. Iglesias | s->regs[R_INTR] &= ~value; |
134 | f2fcffbb | Edgar E. Iglesias | D(printf("r_intr=%x\n", s->regs[R_INTR]));
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135 | 2a9859e7 | Edgar E. Iglesias | break;
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136 | 2a9859e7 | Edgar E. Iglesias | default:
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137 | 2a9859e7 | Edgar E. Iglesias | s->regs[addr] = value; |
138 | 2a9859e7 | Edgar E. Iglesias | break;
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139 | 2a9859e7 | Edgar E. Iglesias | } |
140 | 2a9859e7 | Edgar E. Iglesias | ser_update_irq(s); |
141 | 83fa1010 | ths | } |
142 | 83fa1010 | ths | |
143 | d60efc6b | Blue Swirl | static CPUReadMemoryFunc * const ser_read[] = { |
144 | 2a9859e7 | Edgar E. Iglesias | NULL, NULL, |
145 | 2a9859e7 | Edgar E. Iglesias | &ser_readl, |
146 | 83fa1010 | ths | }; |
147 | 83fa1010 | ths | |
148 | d60efc6b | Blue Swirl | static CPUWriteMemoryFunc * const ser_write[] = { |
149 | 2a9859e7 | Edgar E. Iglesias | NULL, NULL, |
150 | 2a9859e7 | Edgar E. Iglesias | &ser_writel, |
151 | 83fa1010 | ths | }; |
152 | 83fa1010 | ths | |
153 | f062058f | edgar_igl | static void serial_receive(void *opaque, const uint8_t *buf, int size) |
154 | 83fa1010 | ths | { |
155 | 2a9859e7 | Edgar E. Iglesias | struct etrax_serial *s = opaque;
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156 | f2fcffbb | Edgar E. Iglesias | int i;
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157 | f2fcffbb | Edgar E. Iglesias | |
158 | f2fcffbb | Edgar E. Iglesias | /* Got a byte. */
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159 | f2fcffbb | Edgar E. Iglesias | if (s->rx_fifo_len >= 16) { |
160 | f2fcffbb | Edgar E. Iglesias | printf("WARNING: UART dropped char.\n");
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161 | f2fcffbb | Edgar E. Iglesias | return;
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162 | f2fcffbb | Edgar E. Iglesias | } |
163 | f2fcffbb | Edgar E. Iglesias | |
164 | f2fcffbb | Edgar E. Iglesias | for (i = 0; i < size; i++) { |
165 | f2fcffbb | Edgar E. Iglesias | s->rx_fifo[s->rx_fifo_pos] = buf[i]; |
166 | f2fcffbb | Edgar E. Iglesias | s->rx_fifo_pos++; |
167 | f2fcffbb | Edgar E. Iglesias | s->rx_fifo_pos &= 15;
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168 | f2fcffbb | Edgar E. Iglesias | s->rx_fifo_len++; |
169 | f2fcffbb | Edgar E. Iglesias | } |
170 | f062058f | edgar_igl | |
171 | 2a9859e7 | Edgar E. Iglesias | ser_update_irq(s); |
172 | f062058f | edgar_igl | } |
173 | f062058f | edgar_igl | |
174 | f062058f | edgar_igl | static int serial_can_receive(void *opaque) |
175 | f062058f | edgar_igl | { |
176 | 2a9859e7 | Edgar E. Iglesias | struct etrax_serial *s = opaque;
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177 | 2a9859e7 | Edgar E. Iglesias | int r;
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178 | f062058f | edgar_igl | |
179 | 2a9859e7 | Edgar E. Iglesias | /* Is the receiver enabled? */
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180 | f2fcffbb | Edgar E. Iglesias | if (!(s->regs[RW_REC_CTRL] & (1 << 3))) { |
181 | f2fcffbb | Edgar E. Iglesias | return 0; |
182 | f2fcffbb | Edgar E. Iglesias | } |
183 | f062058f | edgar_igl | |
184 | f2fcffbb | Edgar E. Iglesias | r = sizeof(s->rx_fifo) - s->rx_fifo_len;
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185 | 2a9859e7 | Edgar E. Iglesias | return r;
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186 | f062058f | edgar_igl | } |
187 | f062058f | edgar_igl | |
188 | f062058f | edgar_igl | static void serial_event(void *opaque, int event) |
189 | f062058f | edgar_igl | { |
190 | f062058f | edgar_igl | |
191 | f062058f | edgar_igl | } |
192 | f062058f | edgar_igl | |
193 | 81a322d4 | Gerd Hoffmann | static int etraxfs_ser_init(SysBusDevice *dev) |
194 | f062058f | edgar_igl | { |
195 | 2a9859e7 | Edgar E. Iglesias | struct etrax_serial *s = FROM_SYSBUS(typeof (*s), dev);
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196 | 2a9859e7 | Edgar E. Iglesias | int ser_regs;
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197 | 2a9859e7 | Edgar E. Iglesias | |
198 | 2a9859e7 | Edgar E. Iglesias | /* transmitter begins ready and idle. */
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199 | 2a9859e7 | Edgar E. Iglesias | s->regs[RS_STAT_DIN] |= (1 << STAT_TR_RDY);
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200 | 2a9859e7 | Edgar E. Iglesias | s->regs[RS_STAT_DIN] |= (1 << STAT_TR_IDLE);
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201 | 2a9859e7 | Edgar E. Iglesias | |
202 | 2a9859e7 | Edgar E. Iglesias | sysbus_init_irq(dev, &s->irq); |
203 | 2507c12a | Alexander Graf | ser_regs = cpu_register_io_memory(ser_read, ser_write, s, |
204 | 2507c12a | Alexander Graf | DEVICE_NATIVE_ENDIAN); |
205 | 2a9859e7 | Edgar E. Iglesias | sysbus_init_mmio(dev, R_MAX * 4, ser_regs);
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206 | 2a9859e7 | Edgar E. Iglesias | s->chr = qdev_init_chardev(&dev->qdev); |
207 | 2a9859e7 | Edgar E. Iglesias | if (s->chr)
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208 | 2a9859e7 | Edgar E. Iglesias | qemu_chr_add_handlers(s->chr, |
209 | 2a9859e7 | Edgar E. Iglesias | serial_can_receive, serial_receive, |
210 | 2a9859e7 | Edgar E. Iglesias | serial_event, s); |
211 | 81a322d4 | Gerd Hoffmann | return 0; |
212 | 83fa1010 | ths | } |
213 | 4b816985 | Edgar E. Iglesias | |
214 | 4b816985 | Edgar E. Iglesias | static void etraxfs_serial_register(void) |
215 | 4b816985 | Edgar E. Iglesias | { |
216 | 2a9859e7 | Edgar E. Iglesias | sysbus_register_dev("etraxfs,serial", sizeof (struct etrax_serial), |
217 | 2a9859e7 | Edgar E. Iglesias | etraxfs_ser_init); |
218 | 4b816985 | Edgar E. Iglesias | } |
219 | 4b816985 | Edgar E. Iglesias | |
220 | 4b816985 | Edgar E. Iglesias | device_init(etraxfs_serial_register) |