root / include / hw / pci / shpc.h @ 5d268704
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1 | 1dc324d2 | Michael S. Tsirkin | #ifndef SHPC_H
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2 | 1dc324d2 | Michael S. Tsirkin | #define SHPC_H
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3 | 1dc324d2 | Michael S. Tsirkin | |
4 | 1dc324d2 | Michael S. Tsirkin | #include "qemu-common.h" |
5 | 022c62cb | Paolo Bonzini | #include "exec/memory.h" |
6 | caf71f86 | Paolo Bonzini | #include "migration/vmstate.h" |
7 | 5d268704 | Igor Mammedov | #include "qapi/error.h" |
8 | 5d268704 | Igor Mammedov | #include "hw/hotplug.h" |
9 | 1dc324d2 | Michael S. Tsirkin | |
10 | 1dc324d2 | Michael S. Tsirkin | struct SHPCDevice {
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11 | 1dc324d2 | Michael S. Tsirkin | /* Capability offset in device's config space */
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12 | 1dc324d2 | Michael S. Tsirkin | int cap;
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13 | 1dc324d2 | Michael S. Tsirkin | |
14 | 1dc324d2 | Michael S. Tsirkin | /* # of hot-pluggable slots */
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15 | 1dc324d2 | Michael S. Tsirkin | int nslots;
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16 | 1dc324d2 | Michael S. Tsirkin | |
17 | 1dc324d2 | Michael S. Tsirkin | /* SHPC WRS: working register set */
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18 | 1dc324d2 | Michael S. Tsirkin | uint8_t *config; |
19 | 1dc324d2 | Michael S. Tsirkin | |
20 | 1dc324d2 | Michael S. Tsirkin | /* Used to enable checks on load. Note that writable bits are
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21 | 1dc324d2 | Michael S. Tsirkin | * never checked even if set in cmask. */
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22 | 1dc324d2 | Michael S. Tsirkin | uint8_t *cmask; |
23 | 1dc324d2 | Michael S. Tsirkin | |
24 | 1dc324d2 | Michael S. Tsirkin | /* Used to implement R/W bytes */
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25 | 1dc324d2 | Michael S. Tsirkin | uint8_t *wmask; |
26 | 1dc324d2 | Michael S. Tsirkin | |
27 | 1dc324d2 | Michael S. Tsirkin | /* Used to implement RW1C(Write 1 to Clear) bytes */
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28 | 1dc324d2 | Michael S. Tsirkin | uint8_t *w1cmask; |
29 | 1dc324d2 | Michael S. Tsirkin | |
30 | 1dc324d2 | Michael S. Tsirkin | /* MMIO for the SHPC BAR */
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31 | 1dc324d2 | Michael S. Tsirkin | MemoryRegion mmio; |
32 | 1dc324d2 | Michael S. Tsirkin | |
33 | 1dc324d2 | Michael S. Tsirkin | /* Bus controlled by this SHPC */
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34 | 1dc324d2 | Michael S. Tsirkin | PCIBus *sec_bus; |
35 | 1dc324d2 | Michael S. Tsirkin | |
36 | 1dc324d2 | Michael S. Tsirkin | /* MSI already requested for this event */
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37 | 1dc324d2 | Michael S. Tsirkin | int msi_requested;
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38 | 1dc324d2 | Michael S. Tsirkin | }; |
39 | 1dc324d2 | Michael S. Tsirkin | |
40 | 1dc324d2 | Michael S. Tsirkin | void shpc_reset(PCIDevice *d);
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41 | 1dc324d2 | Michael S. Tsirkin | int shpc_bar_size(PCIDevice *dev);
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42 | 1dc324d2 | Michael S. Tsirkin | int shpc_init(PCIDevice *dev, PCIBus *sec_bus, MemoryRegion *bar, unsigned off); |
43 | 1dc324d2 | Michael S. Tsirkin | void shpc_cleanup(PCIDevice *dev, MemoryRegion *bar);
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44 | 1dc324d2 | Michael S. Tsirkin | void shpc_cap_write_config(PCIDevice *d, uint32_t addr, uint32_t val, int len); |
45 | 1dc324d2 | Michael S. Tsirkin | |
46 | 5d268704 | Igor Mammedov | |
47 | 5d268704 | Igor Mammedov | void shpc_device_hotplug_cb(HotplugHandler *hotplug_dev, DeviceState *dev,
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48 | 5d268704 | Igor Mammedov | Error **errp); |
49 | 5d268704 | Igor Mammedov | void shpc_device_hot_unplug_cb(HotplugHandler *hotplug_dev, DeviceState *dev,
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50 | 5d268704 | Igor Mammedov | Error **errp); |
51 | 5d268704 | Igor Mammedov | |
52 | 1dc324d2 | Michael S. Tsirkin | extern VMStateInfo shpc_vmstate_info;
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53 | 1dc324d2 | Michael S. Tsirkin | #define SHPC_VMSTATE(_field, _type) \
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54 | 1dc324d2 | Michael S. Tsirkin | VMSTATE_BUFFER_UNSAFE_INFO(_field, _type, 0, shpc_vmstate_info, 0) |
55 | 1dc324d2 | Michael S. Tsirkin | |
56 | 1dc324d2 | Michael S. Tsirkin | #endif |