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/*
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 * QEMU PC keyboard emulation
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 *
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 * Copyright (c) 2003 Fabrice Bellard
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 *
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 * Permission is hereby granted, free of charge, to any person obtaining a copy
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 * of this software and associated documentation files (the "Software"), to deal
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 * in the Software without restriction, including without limitation the rights
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 * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
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 * copies of the Software, and to permit persons to whom the Software is
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 * furnished to do so, subject to the following conditions:
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 *
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 * The above copyright notice and this permission notice shall be included in
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 * all copies or substantial portions of the Software.
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 *
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 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
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 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
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 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
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 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
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 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
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 * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
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 * THE SOFTWARE.
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 */
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#include "hw.h"
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#include "isa.h"
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#include "pc.h"
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#include "ps2.h"
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#include "sysemu.h"
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/* debug PC keyboard */
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//#define DEBUG_KBD
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/*        Keyboard Controller Commands */
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#define KBD_CCMD_READ_MODE        0x20        /* Read mode bits */
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#define KBD_CCMD_WRITE_MODE        0x60        /* Write mode bits */
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#define KBD_CCMD_GET_VERSION        0xA1        /* Get controller version */
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#define KBD_CCMD_MOUSE_DISABLE        0xA7        /* Disable mouse interface */
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#define KBD_CCMD_MOUSE_ENABLE        0xA8        /* Enable mouse interface */
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#define KBD_CCMD_TEST_MOUSE        0xA9        /* Mouse interface test */
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#define KBD_CCMD_SELF_TEST        0xAA        /* Controller self test */
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#define KBD_CCMD_KBD_TEST        0xAB        /* Keyboard interface test */
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#define KBD_CCMD_KBD_DISABLE        0xAD        /* Keyboard interface disable */
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#define KBD_CCMD_KBD_ENABLE        0xAE        /* Keyboard interface enable */
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#define KBD_CCMD_READ_INPORT    0xC0    /* read input port */
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#define KBD_CCMD_READ_OUTPORT        0xD0    /* read output port */
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#define KBD_CCMD_WRITE_OUTPORT        0xD1    /* write output port */
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#define KBD_CCMD_WRITE_OBUF        0xD2
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#define KBD_CCMD_WRITE_AUX_OBUF        0xD3    /* Write to output buffer as if
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                                           initiated by the auxiliary device */
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#define KBD_CCMD_WRITE_MOUSE        0xD4        /* Write the following byte to the mouse */
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#define KBD_CCMD_DISABLE_A20    0xDD    /* HP vectra only ? */
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#define KBD_CCMD_ENABLE_A20     0xDF    /* HP vectra only ? */
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#define KBD_CCMD_RESET                0xFE
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/* Keyboard Commands */
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#define KBD_CMD_SET_LEDS        0xED        /* Set keyboard leds */
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#define KBD_CMD_ECHO             0xEE
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#define KBD_CMD_GET_ID                 0xF2        /* get keyboard ID */
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#define KBD_CMD_SET_RATE        0xF3        /* Set typematic rate */
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#define KBD_CMD_ENABLE                0xF4        /* Enable scanning */
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#define KBD_CMD_RESET_DISABLE        0xF5        /* reset and disable scanning */
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#define KBD_CMD_RESET_ENABLE           0xF6    /* reset and enable scanning */
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#define KBD_CMD_RESET                0xFF        /* Reset */
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/* Keyboard Replies */
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#define KBD_REPLY_POR                0xAA        /* Power on reset */
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#define KBD_REPLY_ACK                0xFA        /* Command ACK */
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#define KBD_REPLY_RESEND        0xFE        /* Command NACK, send the cmd again */
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/* Status Register Bits */
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#define KBD_STAT_OBF                 0x01        /* Keyboard output buffer full */
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#define KBD_STAT_IBF                 0x02        /* Keyboard input buffer full */
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#define KBD_STAT_SELFTEST        0x04        /* Self test successful */
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#define KBD_STAT_CMD                0x08        /* Last write was a command write (0=data) */
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#define KBD_STAT_UNLOCKED        0x10        /* Zero if keyboard locked */
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#define KBD_STAT_MOUSE_OBF        0x20        /* Mouse output buffer full */
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#define KBD_STAT_GTO                 0x40        /* General receive/xmit timeout */
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#define KBD_STAT_PERR                 0x80        /* Parity error */
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/* Controller Mode Register Bits */
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#define KBD_MODE_KBD_INT        0x01        /* Keyboard data generate IRQ1 */
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#define KBD_MODE_MOUSE_INT        0x02        /* Mouse data generate IRQ12 */
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#define KBD_MODE_SYS                 0x04        /* The system flag (?) */
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#define KBD_MODE_NO_KEYLOCK        0x08        /* The keylock doesn't affect the keyboard if set */
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#define KBD_MODE_DISABLE_KBD        0x10        /* Disable keyboard interface */
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#define KBD_MODE_DISABLE_MOUSE        0x20        /* Disable mouse interface */
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#define KBD_MODE_KCC                 0x40        /* Scan code conversion to PC format */
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#define KBD_MODE_RFU                0x80
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/* Mouse Commands */
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#define AUX_SET_SCALE11                0xE6        /* Set 1:1 scaling */
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#define AUX_SET_SCALE21                0xE7        /* Set 2:1 scaling */
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#define AUX_SET_RES                0xE8        /* Set resolution */
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#define AUX_GET_SCALE                0xE9        /* Get scaling factor */
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#define AUX_SET_STREAM                0xEA        /* Set stream mode */
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#define AUX_POLL                0xEB        /* Poll */
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#define AUX_RESET_WRAP                0xEC        /* Reset wrap mode */
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#define AUX_SET_WRAP                0xEE        /* Set wrap mode */
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#define AUX_SET_REMOTE                0xF0        /* Set remote mode */
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#define AUX_GET_TYPE                0xF2        /* Get type */
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#define AUX_SET_SAMPLE                0xF3        /* Set sample rate */
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#define AUX_ENABLE_DEV                0xF4        /* Enable aux device */
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#define AUX_DISABLE_DEV                0xF5        /* Disable aux device */
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#define AUX_SET_DEFAULT                0xF6
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#define AUX_RESET                0xFF        /* Reset aux device */
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#define AUX_ACK                        0xFA        /* Command byte ACK. */
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#define MOUSE_STATUS_REMOTE     0x40
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#define MOUSE_STATUS_ENABLED    0x20
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#define MOUSE_STATUS_SCALE21    0x10
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#define KBD_QUEUE_SIZE 256
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#define KBD_PENDING_KBD         1
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#define KBD_PENDING_AUX         2
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typedef struct KBDState {
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    uint8_t write_cmd; /* if non zero, write data to port 60 is expected */
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    uint8_t status;
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    uint8_t mode;
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    /* Bitmask of devices with data available.  */
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    uint8_t pending;
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    void *kbd;
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    void *mouse;
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    qemu_irq irq_kbd;
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    qemu_irq irq_mouse;
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    target_phys_addr_t base;
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    int it_shift;
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} KBDState;
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KBDState kbd_state;
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/* update irq and KBD_STAT_[MOUSE_]OBF */
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/* XXX: not generating the irqs if KBD_MODE_DISABLE_KBD is set may be
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   incorrect, but it avoids having to simulate exact delays */
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static void kbd_update_irq(KBDState *s)
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{
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    int irq_kbd_level, irq_mouse_level;
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    irq_kbd_level = 0;
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    irq_mouse_level = 0;
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    s->status &= ~(KBD_STAT_OBF | KBD_STAT_MOUSE_OBF);
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    if (s->pending) {
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        s->status |= KBD_STAT_OBF;
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        /* kbd data takes priority over aux data.  */
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        if (s->pending == KBD_PENDING_AUX) {
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            s->status |= KBD_STAT_MOUSE_OBF;
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            if (s->mode & KBD_MODE_MOUSE_INT)
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                irq_mouse_level = 1;
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        } else {
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            if ((s->mode & KBD_MODE_KBD_INT) &&
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                !(s->mode & KBD_MODE_DISABLE_KBD))
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                irq_kbd_level = 1;
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        }
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    }
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    qemu_set_irq(s->irq_kbd, irq_kbd_level);
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    qemu_set_irq(s->irq_mouse, irq_mouse_level);
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}
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static void kbd_update_kbd_irq(void *opaque, int level)
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{
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    KBDState *s = (KBDState *)opaque;
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    if (level)
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        s->pending |= KBD_PENDING_KBD;
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    else
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        s->pending &= ~KBD_PENDING_KBD;
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    kbd_update_irq(s);
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}
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static void kbd_update_aux_irq(void *opaque, int level)
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{
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    KBDState *s = (KBDState *)opaque;
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    if (level)
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        s->pending |= KBD_PENDING_AUX;
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    else
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        s->pending &= ~KBD_PENDING_AUX;
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    kbd_update_irq(s);
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}
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static uint32_t kbd_read_status(void *opaque, uint32_t addr)
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{
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    KBDState *s = opaque;
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    int val;
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    val = s->status;
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#if defined(DEBUG_KBD)
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    printf("kbd: read status=0x%02x\n", val);
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#endif
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    return val;
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}
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static void kbd_queue(KBDState *s, int b, int aux)
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{
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    if (aux)
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        ps2_queue(s->mouse, b);
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    else
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        ps2_queue(s->kbd, b);
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}
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static void kbd_write_command(void *opaque, uint32_t addr, uint32_t val)
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{
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    KBDState *s = opaque;
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#ifdef DEBUG_KBD
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    printf("kbd: write cmd=0x%02x\n", val);
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#endif
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    switch(val) {
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    case KBD_CCMD_READ_MODE:
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        kbd_queue(s, s->mode, 0);
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        break;
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    case KBD_CCMD_WRITE_MODE:
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    case KBD_CCMD_WRITE_OBUF:
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    case KBD_CCMD_WRITE_AUX_OBUF:
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    case KBD_CCMD_WRITE_MOUSE:
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    case KBD_CCMD_WRITE_OUTPORT:
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        s->write_cmd = val;
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        break;
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    case KBD_CCMD_MOUSE_DISABLE:
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        s->mode |= KBD_MODE_DISABLE_MOUSE;
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        break;
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    case KBD_CCMD_MOUSE_ENABLE:
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        s->mode &= ~KBD_MODE_DISABLE_MOUSE;
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        break;
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    case KBD_CCMD_TEST_MOUSE:
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        kbd_queue(s, 0x00, 0);
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        break;
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    case KBD_CCMD_SELF_TEST:
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        s->status |= KBD_STAT_SELFTEST;
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        kbd_queue(s, 0x55, 0);
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        break;
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    case KBD_CCMD_KBD_TEST:
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        kbd_queue(s, 0x00, 0);
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        break;
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    case KBD_CCMD_KBD_DISABLE:
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        s->mode |= KBD_MODE_DISABLE_KBD;
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        kbd_update_irq(s);
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        break;
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    case KBD_CCMD_KBD_ENABLE:
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        s->mode &= ~KBD_MODE_DISABLE_KBD;
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        kbd_update_irq(s);
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        break;
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    case KBD_CCMD_READ_INPORT:
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        kbd_queue(s, 0x00, 0);
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        break;
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    case KBD_CCMD_READ_OUTPORT:
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        /* XXX: check that */
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#ifdef TARGET_I386
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        val = 0x01 | (ioport_get_a20() << 1);
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#else
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        val = 0x01;
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#endif
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        if (s->status & KBD_STAT_OBF)
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            val |= 0x10;
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        if (s->status & KBD_STAT_MOUSE_OBF)
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            val |= 0x20;
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        kbd_queue(s, val, 0);
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        break;
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#ifdef TARGET_I386
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    case KBD_CCMD_ENABLE_A20:
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        ioport_set_a20(1);
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        break;
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    case KBD_CCMD_DISABLE_A20:
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        ioport_set_a20(0);
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        break;
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#endif
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    case KBD_CCMD_RESET:
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        qemu_system_reset_request();
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        break;
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    case 0xff:
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        /* ignore that - I don't know what is its use */
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        break;
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    default:
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        fprintf(stderr, "qemu: unsupported keyboard cmd=0x%02x\n", val);
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        break;
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    }
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}
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static uint32_t kbd_read_data(void *opaque, uint32_t addr)
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{
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    KBDState *s = opaque;
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    uint32_t val;
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    if (s->pending == KBD_PENDING_AUX)
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        val = ps2_read_data(s->mouse);
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    else
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        val = ps2_read_data(s->kbd);
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#if defined(DEBUG_KBD)
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    printf("kbd: read data=0x%02x\n", val);
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#endif
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    return val;
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}
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static void kbd_write_data(void *opaque, uint32_t addr, uint32_t val)
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{
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    KBDState *s = opaque;
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#ifdef DEBUG_KBD
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    printf("kbd: write data=0x%02x\n", val);
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#endif
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    switch(s->write_cmd) {
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    case 0:
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        ps2_write_keyboard(s->kbd, val);
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        break;
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    case KBD_CCMD_WRITE_MODE:
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        s->mode = val;
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        ps2_keyboard_set_translation(s->kbd, (s->mode & KBD_MODE_KCC) != 0);
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        /* ??? */
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        kbd_update_irq(s);
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        break;
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    case KBD_CCMD_WRITE_OBUF:
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        kbd_queue(s, val, 0);
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        break;
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    case KBD_CCMD_WRITE_AUX_OBUF:
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        kbd_queue(s, val, 1);
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        break;
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    case KBD_CCMD_WRITE_OUTPORT:
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#ifdef TARGET_I386
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        ioport_set_a20((val >> 1) & 1);
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#endif
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        if (!(val & 1)) {
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            qemu_system_reset_request();
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        }
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        break;
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    case KBD_CCMD_WRITE_MOUSE:
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        ps2_write_mouse(s->mouse, val);
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        break;
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    default:
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        break;
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    }
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    s->write_cmd = 0;
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}
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static void kbd_reset(void *opaque)
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{
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    KBDState *s = opaque;
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    s->mode = KBD_MODE_KBD_INT | KBD_MODE_MOUSE_INT;
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    s->status = KBD_STAT_CMD | KBD_STAT_UNLOCKED;
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}
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static void kbd_save(QEMUFile* f, void* opaque)
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{
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    KBDState *s = (KBDState*)opaque;
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    qemu_put_8s(f, &s->write_cmd);
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    qemu_put_8s(f, &s->status);
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    qemu_put_8s(f, &s->mode);
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    qemu_put_8s(f, &s->pending);
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}
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static int kbd_load(QEMUFile* f, void* opaque, int version_id)
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{
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    KBDState *s = (KBDState*)opaque;
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    if (version_id != 3)
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        return -EINVAL;
361 675376f2 bellard
    qemu_get_8s(f, &s->write_cmd);
362 675376f2 bellard
    qemu_get_8s(f, &s->status);
363 675376f2 bellard
    qemu_get_8s(f, &s->mode);
364 7783e9f0 pbrook
    qemu_get_8s(f, &s->pending);
365 675376f2 bellard
    return 0;
366 675376f2 bellard
}
367 675376f2 bellard
368 d537cf6c pbrook
void i8042_init(qemu_irq kbd_irq, qemu_irq mouse_irq, uint32_t io_base)
369 80cabfad bellard
{
370 b41a2cd1 bellard
    KBDState *s = &kbd_state;
371 b7678d96 ths
372 d537cf6c pbrook
    s->irq_kbd = kbd_irq;
373 d537cf6c pbrook
    s->irq_mouse = mouse_irq;
374 b92bb99b ths
375 b41a2cd1 bellard
    kbd_reset(s);
376 7783e9f0 pbrook
    register_savevm("pckbd", 0, 3, kbd_save, kbd_load, s);
377 b7678d96 ths
    register_ioport_read(io_base, 1, 1, kbd_read_data, s);
378 b7678d96 ths
    register_ioport_write(io_base, 1, 1, kbd_write_data, s);
379 b7678d96 ths
    register_ioport_read(io_base + 4, 1, 1, kbd_read_status, s);
380 b7678d96 ths
    register_ioport_write(io_base + 4, 1, 1, kbd_write_command, s);
381 63066f4f bellard
382 daa57963 bellard
    s->kbd = ps2_kbd_init(kbd_update_kbd_irq, s);
383 daa57963 bellard
    s->mouse = ps2_mouse_init(kbd_update_aux_irq, s);
384 548df2ac ths
#ifdef TARGET_I386
385 548df2ac ths
    vmmouse_init(s->mouse);
386 548df2ac ths
#endif
387 d7d02e3c bellard
    qemu_register_reset(kbd_reset, s);
388 80cabfad bellard
}
389 b92bb99b ths
390 b92bb99b ths
/* Memory mapped interface */
391 9596ebb7 pbrook
static uint32_t kbd_mm_readb (void *opaque, target_phys_addr_t addr)
392 b92bb99b ths
{
393 b92bb99b ths
    KBDState *s = opaque;
394 b92bb99b ths
395 80355292 ths
    switch ((addr - s->base) >> s->it_shift) {
396 80355292 ths
    case 0:
397 80355292 ths
        return kbd_read_data(s, 0) & 0xff;
398 80355292 ths
    case 1:
399 80355292 ths
        return kbd_read_status(s, 0) & 0xff;
400 80355292 ths
    default:
401 80355292 ths
        return 0xff;
402 80355292 ths
    }
403 b92bb99b ths
}
404 b92bb99b ths
405 9596ebb7 pbrook
static void kbd_mm_writeb (void *opaque, target_phys_addr_t addr, uint32_t value)
406 b92bb99b ths
{
407 b92bb99b ths
    KBDState *s = opaque;
408 b92bb99b ths
409 80355292 ths
    switch ((addr - s->base) >> s->it_shift) {
410 80355292 ths
    case 0:
411 80355292 ths
        kbd_write_data(s, 0, value & 0xff);
412 80355292 ths
        break;
413 80355292 ths
    case 1:
414 80355292 ths
        kbd_write_command(s, 0, value & 0xff);
415 80355292 ths
        break;
416 80355292 ths
    }
417 b92bb99b ths
}
418 b92bb99b ths
419 b92bb99b ths
static CPUReadMemoryFunc *kbd_mm_read[] = {
420 b92bb99b ths
    &kbd_mm_readb,
421 b92bb99b ths
    &kbd_mm_readb,
422 b92bb99b ths
    &kbd_mm_readb,
423 b92bb99b ths
};
424 b92bb99b ths
425 b92bb99b ths
static CPUWriteMemoryFunc *kbd_mm_write[] = {
426 b92bb99b ths
    &kbd_mm_writeb,
427 b92bb99b ths
    &kbd_mm_writeb,
428 b92bb99b ths
    &kbd_mm_writeb,
429 b92bb99b ths
};
430 b92bb99b ths
431 71db710f blueswir1
void i8042_mm_init(qemu_irq kbd_irq, qemu_irq mouse_irq,
432 71db710f blueswir1
                   target_phys_addr_t base, int it_shift)
433 b92bb99b ths
{
434 b92bb99b ths
    KBDState *s = &kbd_state;
435 b92bb99b ths
    int s_io_memory;
436 b92bb99b ths
437 b92bb99b ths
    s->irq_kbd = kbd_irq;
438 b92bb99b ths
    s->irq_mouse = mouse_irq;
439 b92bb99b ths
    s->base = base;
440 80355292 ths
    s->it_shift = it_shift;
441 b92bb99b ths
442 b92bb99b ths
    kbd_reset(s);
443 b92bb99b ths
    register_savevm("pckbd", 0, 3, kbd_save, kbd_load, s);
444 b92bb99b ths
    s_io_memory = cpu_register_io_memory(0, kbd_mm_read, kbd_mm_write, s);
445 e41c0f26 balrog
    cpu_register_physical_memory(base, 2 << it_shift, s_io_memory);
446 b92bb99b ths
447 b92bb99b ths
    s->kbd = ps2_kbd_init(kbd_update_kbd_irq, s);
448 b92bb99b ths
    s->mouse = ps2_mouse_init(kbd_update_aux_irq, s);
449 b92bb99b ths
#ifdef TARGET_I386
450 b92bb99b ths
    vmmouse_init(s->mouse);
451 b92bb99b ths
#endif
452 b92bb99b ths
    qemu_register_reset(kbd_reset, s);
453 b92bb99b ths
}