Revision 5eb7995e target-ppc/translate.c
b/target-ppc/translate.c | ||
---|---|---|
4618 | 4618 |
RET_CHG_FLOW(ctx); |
4619 | 4619 |
#endif |
4620 | 4620 |
} |
4621 |
|
|
4621 | 4622 |
/* TLB management - PowerPC 405 implementation */ |
4622 | 4623 |
/* tlbre */ |
4623 |
GEN_HANDLER(tlbre, 0x1F, 0x12, 0x1D, 0x00000001, PPC_40x_SPEC) |
|
4624 |
GEN_HANDLER(tlbre_40x, 0x1F, 0x12, 0x1D, 0x00000001, PPC_40x_SPEC)
|
|
4624 | 4625 |
{ |
4625 | 4626 |
#if defined(CONFIG_USER_ONLY) |
4626 | 4627 |
RET_PRIVOPC(ctx); |
... | ... | |
4648 | 4649 |
} |
4649 | 4650 |
|
4650 | 4651 |
/* tlbsx - tlbsx. */ |
4651 |
GEN_HANDLER(tlbsx, 0x1F, 0x12, 0x1C, 0x00000000, PPC_40x_SPEC) |
|
4652 |
GEN_HANDLER(tlbsx_40x, 0x1F, 0x12, 0x1C, 0x00000000, PPC_40x_SPEC)
|
|
4652 | 4653 |
{ |
4653 | 4654 |
#if defined(CONFIG_USER_ONLY) |
4654 | 4655 |
RET_PRIVOPC(ctx); |
... | ... | |
4667 | 4668 |
} |
4668 | 4669 |
|
4669 | 4670 |
/* tlbwe */ |
4670 |
GEN_HANDLER(tlbwe, 0x1F, 0x12, 0x1E, 0x00000001, PPC_40x_SPEC) |
|
4671 |
GEN_HANDLER(tlbwe_40x, 0x1F, 0x12, 0x1E, 0x00000001, PPC_40x_SPEC)
|
|
4671 | 4672 |
{ |
4672 | 4673 |
#if defined(CONFIG_USER_ONLY) |
4673 | 4674 |
RET_PRIVOPC(ctx); |
... | ... | |
4694 | 4695 |
#endif |
4695 | 4696 |
} |
4696 | 4697 |
|
4698 |
/* TLB management - PowerPC BookE implementation */ |
|
4699 |
/* tlbre */ |
|
4700 |
GEN_HANDLER(tlbre_booke, 0x1F, 0x12, 0x1D, 0x00000001, PPC_BOOKE) |
|
4701 |
{ |
|
4702 |
#if defined(CONFIG_USER_ONLY) |
|
4703 |
RET_PRIVOPC(ctx); |
|
4704 |
#else |
|
4705 |
if (unlikely(!ctx->supervisor)) { |
|
4706 |
RET_PRIVOPC(ctx); |
|
4707 |
return; |
|
4708 |
} |
|
4709 |
switch (rB(ctx->opcode)) { |
|
4710 |
case 0: |
|
4711 |
gen_op_load_gpr_T0(rA(ctx->opcode)); |
|
4712 |
gen_op_booke_tlbre0(); |
|
4713 |
gen_op_store_T0_gpr(rD(ctx->opcode)); |
|
4714 |
break; |
|
4715 |
case 1: |
|
4716 |
gen_op_load_gpr_T0(rA(ctx->opcode)); |
|
4717 |
gen_op_booke_tlbre1(); |
|
4718 |
gen_op_store_T0_gpr(rD(ctx->opcode)); |
|
4719 |
break; |
|
4720 |
case 2: |
|
4721 |
gen_op_load_gpr_T0(rA(ctx->opcode)); |
|
4722 |
gen_op_booke_tlbre2(); |
|
4723 |
gen_op_store_T0_gpr(rD(ctx->opcode)); |
|
4724 |
break; |
|
4725 |
default: |
|
4726 |
RET_INVAL(ctx); |
|
4727 |
break; |
|
4728 |
} |
|
4729 |
#endif |
|
4730 |
} |
|
4731 |
|
|
4732 |
/* tlbsx - tlbsx. */ |
|
4733 |
GEN_HANDLER(tlbsx_booke, 0x1F, 0x12, 0x1C, 0x00000000, PPC_BOOKE) |
|
4734 |
{ |
|
4735 |
#if defined(CONFIG_USER_ONLY) |
|
4736 |
RET_PRIVOPC(ctx); |
|
4737 |
#else |
|
4738 |
if (unlikely(!ctx->supervisor)) { |
|
4739 |
RET_PRIVOPC(ctx); |
|
4740 |
return; |
|
4741 |
} |
|
4742 |
gen_addr_reg_index(ctx); |
|
4743 |
if (Rc(ctx->opcode)) |
|
4744 |
gen_op_booke_tlbsx_(); |
|
4745 |
else |
|
4746 |
gen_op_booke_tlbsx(); |
|
4747 |
gen_op_store_T0_gpr(rD(ctx->opcode)); |
|
4748 |
#endif |
|
4749 |
} |
|
4750 |
|
|
4751 |
/* tlbwe */ |
|
4752 |
GEN_HANDLER(tlbwe_booke, 0x1F, 0x12, 0x1E, 0x00000001, PPC_BOOKE) |
|
4753 |
{ |
|
4754 |
#if defined(CONFIG_USER_ONLY) |
|
4755 |
RET_PRIVOPC(ctx); |
|
4756 |
#else |
|
4757 |
if (unlikely(!ctx->supervisor)) { |
|
4758 |
RET_PRIVOPC(ctx); |
|
4759 |
return; |
|
4760 |
} |
|
4761 |
switch (rB(ctx->opcode)) { |
|
4762 |
case 0: |
|
4763 |
gen_op_load_gpr_T0(rA(ctx->opcode)); |
|
4764 |
gen_op_load_gpr_T1(rS(ctx->opcode)); |
|
4765 |
gen_op_booke_tlbwe0(); |
|
4766 |
break; |
|
4767 |
case 1: |
|
4768 |
gen_op_load_gpr_T0(rA(ctx->opcode)); |
|
4769 |
gen_op_load_gpr_T1(rS(ctx->opcode)); |
|
4770 |
gen_op_booke_tlbwe1(); |
|
4771 |
break; |
|
4772 |
case 2: |
|
4773 |
gen_op_load_gpr_T0(rA(ctx->opcode)); |
|
4774 |
gen_op_load_gpr_T1(rS(ctx->opcode)); |
|
4775 |
gen_op_booke_tlbwe2(); |
|
4776 |
break; |
|
4777 |
default: |
|
4778 |
RET_INVAL(ctx); |
|
4779 |
break; |
|
4780 |
} |
|
4781 |
#endif |
|
4782 |
} |
|
4783 |
|
|
4697 | 4784 |
/* wrtee */ |
4698 | 4785 |
GEN_HANDLER(wrtee, 0x1F, 0x03, 0x04, 0x000FFC01, PPC_EMB_COMMON) |
4699 | 4786 |
{ |
Also available in: Unified diff