Revision 5f9fc5ad hw/pflash_cfi02.c
| b/hw/pflash_cfi02.c | ||
|---|---|---|
| 103 | 103 |
pfl->cmd = 0; |
| 104 | 104 |
} |
| 105 | 105 |
|
| 106 |
static uint32_t pflash_read (pflash_t *pfl, target_phys_addr_t offset, int width) |
|
| 106 |
static uint32_t pflash_read (pflash_t *pfl, target_phys_addr_t offset, |
|
| 107 |
int width, int be) |
|
| 107 | 108 |
{
|
| 108 | 109 |
target_phys_addr_t boff; |
| 109 | 110 |
uint32_t ret; |
| ... | ... | |
| 140 | 141 |
// DPRINTF("%s: data offset %08x %02x\n", __func__, offset, ret);
|
| 141 | 142 |
break; |
| 142 | 143 |
case 2: |
| 143 |
#if defined(TARGET_WORDS_BIGENDIAN)
|
|
| 144 |
ret = p[offset] << 8; |
|
| 145 |
ret |= p[offset + 1]; |
|
| 146 |
#else
|
|
| 147 |
ret = p[offset]; |
|
| 148 |
ret |= p[offset + 1] << 8; |
|
| 149 |
#endif
|
|
| 144 |
if (be) {
|
|
| 145 |
ret = p[offset] << 8;
|
|
| 146 |
ret |= p[offset + 1];
|
|
| 147 |
} else {
|
|
| 148 |
ret = p[offset];
|
|
| 149 |
ret |= p[offset + 1] << 8;
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|
| 150 |
}
|
|
| 150 | 151 |
// DPRINTF("%s: data offset %08x %04x\n", __func__, offset, ret);
|
| 151 | 152 |
break; |
| 152 | 153 |
case 4: |
| 153 |
#if defined(TARGET_WORDS_BIGENDIAN)
|
|
| 154 |
ret = p[offset] << 24; |
|
| 155 |
ret |= p[offset + 1] << 16; |
|
| 156 |
ret |= p[offset + 2] << 8; |
|
| 157 |
ret |= p[offset + 3]; |
|
| 158 |
#else
|
|
| 159 |
ret = p[offset]; |
|
| 160 |
ret |= p[offset + 1] << 8; |
|
| 161 |
ret |= p[offset + 2] << 16; |
|
| 162 |
ret |= p[offset + 3] << 24; |
|
| 163 |
#endif
|
|
| 154 |
if (be) {
|
|
| 155 |
ret = p[offset] << 24;
|
|
| 156 |
ret |= p[offset + 1] << 16;
|
|
| 157 |
ret |= p[offset + 2] << 8;
|
|
| 158 |
ret |= p[offset + 3];
|
|
| 159 |
} else {
|
|
| 160 |
ret = p[offset];
|
|
| 161 |
ret |= p[offset + 1] << 8;
|
|
| 162 |
ret |= p[offset + 2] << 16;
|
|
| 163 |
ret |= p[offset + 3] << 24;
|
|
| 164 |
}
|
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| 164 | 165 |
// DPRINTF("%s: data offset %08x %08x\n", __func__, offset, ret);
|
| 165 | 166 |
break; |
| 166 | 167 |
} |
| ... | ... | |
| 223 | 224 |
} |
| 224 | 225 |
|
| 225 | 226 |
static void pflash_write (pflash_t *pfl, target_phys_addr_t offset, |
| 226 |
uint32_t value, int width) |
|
| 227 |
uint32_t value, int width, int be)
|
|
| 227 | 228 |
{
|
| 228 | 229 |
target_phys_addr_t boff; |
| 229 | 230 |
uint8_t *p; |
| ... | ... | |
| 316 | 317 |
pflash_update(pfl, offset, 1); |
| 317 | 318 |
break; |
| 318 | 319 |
case 2: |
| 319 |
#if defined(TARGET_WORDS_BIGENDIAN)
|
|
| 320 |
p[offset] &= value >> 8; |
|
| 321 |
p[offset + 1] &= value; |
|
| 322 |
#else
|
|
| 323 |
p[offset] &= value; |
|
| 324 |
p[offset + 1] &= value >> 8; |
|
| 325 |
#endif
|
|
| 320 |
if (be) {
|
|
| 321 |
p[offset] &= value >> 8;
|
|
| 322 |
p[offset + 1] &= value;
|
|
| 323 |
} else {
|
|
| 324 |
p[offset] &= value;
|
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| 325 |
p[offset + 1] &= value >> 8;
|
|
| 326 |
}
|
|
| 326 | 327 |
pflash_update(pfl, offset, 2); |
| 327 | 328 |
break; |
| 328 | 329 |
case 4: |
| 329 |
#if defined(TARGET_WORDS_BIGENDIAN)
|
|
| 330 |
p[offset] &= value >> 24; |
|
| 331 |
p[offset + 1] &= value >> 16; |
|
| 332 |
p[offset + 2] &= value >> 8; |
|
| 333 |
p[offset + 3] &= value; |
|
| 334 |
#else
|
|
| 335 |
p[offset] &= value; |
|
| 336 |
p[offset + 1] &= value >> 8; |
|
| 337 |
p[offset + 2] &= value >> 16; |
|
| 338 |
p[offset + 3] &= value >> 24; |
|
| 339 |
#endif
|
|
| 330 |
if (be) {
|
|
| 331 |
p[offset] &= value >> 24;
|
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| 332 |
p[offset + 1] &= value >> 16;
|
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| 333 |
p[offset + 2] &= value >> 8;
|
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| 334 |
p[offset + 3] &= value;
|
|
| 335 |
} else {
|
|
| 336 |
p[offset] &= value;
|
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| 337 |
p[offset + 1] &= value >> 8;
|
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| 338 |
p[offset + 2] &= value >> 16;
|
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| 339 |
p[offset + 3] &= value >> 24;
|
|
| 340 |
}
|
|
| 340 | 341 |
pflash_update(pfl, offset, 4); |
| 341 | 342 |
break; |
| 342 | 343 |
} |
| ... | ... | |
| 451 | 452 |
} |
| 452 | 453 |
|
| 453 | 454 |
|
| 454 |
static uint32_t pflash_readb (void *opaque, target_phys_addr_t addr) |
|
| 455 |
static uint32_t pflash_readb_be(void *opaque, target_phys_addr_t addr) |
|
| 456 |
{
|
|
| 457 |
return pflash_read(opaque, addr, 1, 1); |
|
| 458 |
} |
|
| 459 |
|
|
| 460 |
static uint32_t pflash_readb_le(void *opaque, target_phys_addr_t addr) |
|
| 461 |
{
|
|
| 462 |
return pflash_read(opaque, addr, 1, 0); |
|
| 463 |
} |
|
| 464 |
|
|
| 465 |
static uint32_t pflash_readw_be(void *opaque, target_phys_addr_t addr) |
|
| 466 |
{
|
|
| 467 |
pflash_t *pfl = opaque; |
|
| 468 |
|
|
| 469 |
return pflash_read(pfl, addr, 2, 1); |
|
| 470 |
} |
|
| 471 |
|
|
| 472 |
static uint32_t pflash_readw_le(void *opaque, target_phys_addr_t addr) |
|
| 473 |
{
|
|
| 474 |
pflash_t *pfl = opaque; |
|
| 475 |
|
|
| 476 |
return pflash_read(pfl, addr, 2, 0); |
|
| 477 |
} |
|
| 478 |
|
|
| 479 |
static uint32_t pflash_readl_be(void *opaque, target_phys_addr_t addr) |
|
| 455 | 480 |
{
|
| 456 |
return pflash_read(opaque, addr, 1); |
|
| 481 |
pflash_t *pfl = opaque; |
|
| 482 |
|
|
| 483 |
return pflash_read(pfl, addr, 4, 1); |
|
| 457 | 484 |
} |
| 458 | 485 |
|
| 459 |
static uint32_t pflash_readw (void *opaque, target_phys_addr_t addr)
|
|
| 486 |
static uint32_t pflash_readl_le(void *opaque, target_phys_addr_t addr)
|
|
| 460 | 487 |
{
|
| 461 | 488 |
pflash_t *pfl = opaque; |
| 462 | 489 |
|
| 463 |
return pflash_read(pfl, addr, 2); |
|
| 490 |
return pflash_read(pfl, addr, 4, 0); |
|
| 491 |
} |
|
| 492 |
|
|
| 493 |
static void pflash_writeb_be(void *opaque, target_phys_addr_t addr, |
|
| 494 |
uint32_t value) |
|
| 495 |
{
|
|
| 496 |
pflash_write(opaque, addr, value, 1, 1); |
|
| 464 | 497 |
} |
| 465 | 498 |
|
| 466 |
static uint32_t pflash_readl (void *opaque, target_phys_addr_t addr) |
|
| 499 |
static void pflash_writeb_le(void *opaque, target_phys_addr_t addr, |
|
| 500 |
uint32_t value) |
|
| 501 |
{
|
|
| 502 |
pflash_write(opaque, addr, value, 1, 0); |
|
| 503 |
} |
|
| 504 |
|
|
| 505 |
static void pflash_writew_be(void *opaque, target_phys_addr_t addr, |
|
| 506 |
uint32_t value) |
|
| 467 | 507 |
{
|
| 468 | 508 |
pflash_t *pfl = opaque; |
| 469 | 509 |
|
| 470 |
return pflash_read(pfl, addr, 4);
|
|
| 510 |
pflash_write(pfl, addr, value, 2, 1);
|
|
| 471 | 511 |
} |
| 472 | 512 |
|
| 473 |
static void pflash_writeb (void *opaque, target_phys_addr_t addr,
|
|
| 474 |
uint32_t value) |
|
| 513 |
static void pflash_writew_le(void *opaque, target_phys_addr_t addr,
|
|
| 514 |
uint32_t value)
|
|
| 475 | 515 |
{
|
| 476 |
pflash_write(opaque, addr, value, 1); |
|
| 516 |
pflash_t *pfl = opaque; |
|
| 517 |
|
|
| 518 |
pflash_write(pfl, addr, value, 2, 0); |
|
| 477 | 519 |
} |
| 478 | 520 |
|
| 479 |
static void pflash_writew (void *opaque, target_phys_addr_t addr,
|
|
| 480 |
uint32_t value) |
|
| 521 |
static void pflash_writel_be(void *opaque, target_phys_addr_t addr,
|
|
| 522 |
uint32_t value)
|
|
| 481 | 523 |
{
|
| 482 | 524 |
pflash_t *pfl = opaque; |
| 483 | 525 |
|
| 484 |
pflash_write(pfl, addr, value, 2);
|
|
| 526 |
pflash_write(pfl, addr, value, 4, 1);
|
|
| 485 | 527 |
} |
| 486 | 528 |
|
| 487 |
static void pflash_writel (void *opaque, target_phys_addr_t addr,
|
|
| 488 |
uint32_t value) |
|
| 529 |
static void pflash_writel_le(void *opaque, target_phys_addr_t addr,
|
|
| 530 |
uint32_t value)
|
|
| 489 | 531 |
{
|
| 490 | 532 |
pflash_t *pfl = opaque; |
| 491 | 533 |
|
| 492 |
pflash_write(pfl, addr, value, 4); |
|
| 534 |
pflash_write(pfl, addr, value, 4, 0);
|
|
| 493 | 535 |
} |
| 494 | 536 |
|
| 495 |
static CPUWriteMemoryFunc * const pflash_write_ops[] = {
|
|
| 496 |
&pflash_writeb, |
|
| 497 |
&pflash_writew, |
|
| 498 |
&pflash_writel, |
|
| 537 |
static CPUWriteMemoryFunc * const pflash_write_ops_be[] = {
|
|
| 538 |
&pflash_writeb_be,
|
|
| 539 |
&pflash_writew_be,
|
|
| 540 |
&pflash_writel_be,
|
|
| 499 | 541 |
}; |
| 500 | 542 |
|
| 501 |
static CPUReadMemoryFunc * const pflash_read_ops[] = {
|
|
| 502 |
&pflash_readb, |
|
| 503 |
&pflash_readw, |
|
| 504 |
&pflash_readl, |
|
| 543 |
static CPUReadMemoryFunc * const pflash_read_ops_be[] = {
|
|
| 544 |
&pflash_readb_be, |
|
| 545 |
&pflash_readw_be, |
|
| 546 |
&pflash_readl_be, |
|
| 547 |
}; |
|
| 548 |
|
|
| 549 |
static CPUWriteMemoryFunc * const pflash_write_ops_le[] = {
|
|
| 550 |
&pflash_writeb_le, |
|
| 551 |
&pflash_writew_le, |
|
| 552 |
&pflash_writel_le, |
|
| 553 |
}; |
|
| 554 |
|
|
| 555 |
static CPUReadMemoryFunc * const pflash_read_ops_le[] = {
|
|
| 556 |
&pflash_readb_le, |
|
| 557 |
&pflash_readw_le, |
|
| 558 |
&pflash_readl_le, |
|
| 505 | 559 |
}; |
| 506 | 560 |
|
| 507 | 561 |
/* Count trailing zeroes of a 32 bits quantity */ |
| ... | ... | |
| 543 | 597 |
int nb_blocs, int nb_mappings, int width, |
| 544 | 598 |
uint16_t id0, uint16_t id1, |
| 545 | 599 |
uint16_t id2, uint16_t id3, |
| 546 |
uint16_t unlock_addr0, uint16_t unlock_addr1) |
|
| 600 |
uint16_t unlock_addr0, uint16_t unlock_addr1, |
|
| 601 |
int be) |
|
| 547 | 602 |
{
|
| 548 | 603 |
pflash_t *pfl; |
| 549 | 604 |
int32_t chip_len; |
| ... | ... | |
| 559 | 614 |
pfl = qemu_mallocz(sizeof(pflash_t)); |
| 560 | 615 |
/* FIXME: Allocate ram ourselves. */ |
| 561 | 616 |
pfl->storage = qemu_get_ram_ptr(off); |
| 562 |
pfl->fl_mem = cpu_register_io_memory(pflash_read_ops, pflash_write_ops, |
|
| 563 |
pfl); |
|
| 617 |
if (be) {
|
|
| 618 |
pfl->fl_mem = cpu_register_io_memory(pflash_read_ops_be, |
|
| 619 |
pflash_write_ops_be, |
|
| 620 |
pfl); |
|
| 621 |
} else {
|
|
| 622 |
pfl->fl_mem = cpu_register_io_memory(pflash_read_ops_le, |
|
| 623 |
pflash_write_ops_le, |
|
| 624 |
pfl); |
|
| 625 |
} |
|
| 564 | 626 |
pfl->off = off; |
| 565 | 627 |
pfl->base = base; |
| 566 | 628 |
pfl->chip_len = chip_len; |
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