Revision 5fafdf24 exec-all.h

b/exec-all.h
1 1
/*
2 2
 * internal execution defines for qemu
3
 * 
3
 *
4 4
 *  Copyright (c) 2003 Fabrice Bellard
5 5
 *
6 6
 * This library is free software; you can redistribute it and/or
......
68 68
typedef void (GenOpFunc1)(long);
69 69
typedef void (GenOpFunc2)(long, long);
70 70
typedef void (GenOpFunc3)(long, long, long);
71
                    
71
                   
72 72
#if defined(TARGET_I386)
73 73

  
74 74
void optimize_flags_init(void);
......
86 86
void dump_ops(const uint16_t *opc_buf, const uint32_t *opparam_buf);
87 87
int cpu_gen_code(CPUState *env, struct TranslationBlock *tb,
88 88
                 int max_code_size, int *gen_code_size_ptr);
89
int cpu_restore_state(struct TranslationBlock *tb, 
89
int cpu_restore_state(struct TranslationBlock *tb,
90 90
                      CPUState *env, unsigned long searched_pc,
91 91
                      void *puc);
92 92
int cpu_gen_code_copy(CPUState *env, struct TranslationBlock *tb,
93 93
                      int max_code_size, int *gen_code_size_ptr);
94
int cpu_restore_state_copy(struct TranslationBlock *tb, 
94
int cpu_restore_state_copy(struct TranslationBlock *tb,
95 95
                           CPUState *env, unsigned long searched_pc,
96 96
                           void *puc);
97 97
void cpu_resume_from_signal(CPUState *env1, void *puc);
98 98
void cpu_exec_init(CPUState *env);
99 99
int page_unprotect(target_ulong address, unsigned long pc, void *puc);
100
void tb_invalidate_phys_page_range(target_ulong start, target_ulong end, 
100
void tb_invalidate_phys_page_range(target_ulong start, target_ulong end,
101 101
                                   int is_cpu_write_access);
102 102
void tb_invalidate_page_range(target_ulong start, target_ulong end);
103 103
void tlb_flush_page(CPUState *env, target_ulong addr);
104 104
void tlb_flush(CPUState *env, int flush_global);
105
int tlb_set_page_exec(CPUState *env, target_ulong vaddr, 
106
                      target_phys_addr_t paddr, int prot, 
105
int tlb_set_page_exec(CPUState *env, target_ulong vaddr,
106
                      target_phys_addr_t paddr, int prot,
107 107
                      int is_user, int is_softmmu);
108
static inline int tlb_set_page(CPUState *env, target_ulong vaddr, 
109
                               target_phys_addr_t paddr, int prot, 
108
static inline int tlb_set_page(CPUState *env, target_ulong vaddr,
109
                               target_phys_addr_t paddr, int prot,
110 110
                               int is_user, int is_softmmu)
111 111
{
112 112
    if (prot & PAGE_READ)
......
156 156

  
157 157
#define CODE_GEN_MAX_BLOCKS    (CODE_GEN_BUFFER_SIZE / CODE_GEN_AVG_BLOCK_SIZE)
158 158

  
159
#if defined(__powerpc__) 
159
#if defined(__powerpc__)
160 160
#define USE_DIRECT_JUMP
161 161
#endif
162 162
#if defined(__i386__) && !defined(_WIN32)
......
177 177

  
178 178
    uint8_t *tc_ptr;    /* pointer to the translated code */
179 179
    /* next matching tb for physical address. */
180
    struct TranslationBlock *phys_hash_next; 
180
    struct TranslationBlock *phys_hash_next;
181 181
    /* first and second physical page containing code. The lower bit
182 182
       of the pointer tells the index in page_next[] */
183
    struct TranslationBlock *page_next[2]; 
184
    target_ulong page_addr[2]; 
183
    struct TranslationBlock *page_next[2];
184
    target_ulong page_addr[2];
185 185

  
186 186
    /* the following data are used to directly call another TB from
187 187
       the code of this one. */
......
195 195
       the two least significant bits of the pointers to tell what is
196 196
       the next pointer: 0 = jmp_next[0], 1 = jmp_next[1], 2 =
197 197
       jmp_first */
198
    struct TranslationBlock *jmp_next[2]; 
198
    struct TranslationBlock *jmp_next[2];
199 199
    struct TranslationBlock *jmp_first;
200 200
} TranslationBlock;
201 201

  
......
221 221

  
222 222
TranslationBlock *tb_alloc(target_ulong pc);
223 223
void tb_flush(CPUState *env);
224
void tb_link_phys(TranslationBlock *tb, 
224
void tb_link_phys(TranslationBlock *tb,
225 225
                  target_ulong phys_pc, target_ulong phys_page2);
226 226

  
227 227
extern TranslationBlock *tb_phys_hash[CODE_GEN_PHYS_HASH_SIZE];
......
257 257
}
258 258
#endif
259 259

  
260
static inline void tb_set_jmp_target(TranslationBlock *tb, 
260
static inline void tb_set_jmp_target(TranslationBlock *tb,
261 261
                                     int n, unsigned long addr)
262 262
{
263 263
    unsigned long offset;
......
272 272
#else
273 273

  
274 274
/* set the jump target */
275
static inline void tb_set_jmp_target(TranslationBlock *tb, 
275
static inline void tb_set_jmp_target(TranslationBlock *tb,
276 276
                                     int n, unsigned long addr)
277 277
{
278 278
    tb->tb_next[n] = addr;
......
280 280

  
281 281
#endif
282 282

  
283
static inline void tb_add_jump(TranslationBlock *tb, int n, 
283
static inline void tb_add_jump(TranslationBlock *tb, int n,
284 284
                               TranslationBlock *tb_next)
285 285
{
286 286
    /* NOTE: this test is only needed for thread safety */
287 287
    if (!tb->jmp_next[n]) {
288 288
        /* patch the native jump address */
289 289
        tb_set_jmp_target(tb, n, (unsigned long)tb_next->tc_ptr);
290
        
290
       
291 291
        /* add in TB jmp circular list */
292 292
        tb->jmp_next[n] = tb_next->jmp_first;
293 293
        tb_next->jmp_first = (TranslationBlock *)((long)(tb) | (n));
......
398 398
static inline int testandset (int *p)
399 399
{
400 400
    long int readval = 0;
401
    
401
   
402 402
    __asm__ __volatile__ ("lock; cmpxchgl %2, %0"
403 403
                          : "+m" (*p), "+a" (readval)
404 404
                          : "r" (1)
......
409 409
static inline int testandset (int *p)
410 410
{
411 411
    long int readval = 0;
412
    
412
   
413 413
    __asm__ __volatile__ ("lock; cmpxchgl %2, %0"
414 414
                          : "+m" (*p), "+a" (readval)
415 415
                          : "r" (1)
......
424 424
    __asm__ __volatile__ ("0: cs    %0,%1,0(%2)\n"
425 425
			  "   jl    0b"
426 426
			  : "=&d" (ret)
427
			  : "r" (1), "a" (p), "0" (*p) 
427
			  : "r" (1), "a" (p), "0" (*p)
428 428
			  : "cc", "memory" );
429 429
    return ret;
430 430
}
......
464 464
    __asm__ __volatile__("swp %0, %1, [%2]"
465 465
                         : "=r"(ret)
466 466
                         : "0"(1), "r"(spinlock));
467
    
467
   
468 468
    return ret;
469 469
}
470 470
#elif defined(__mc68000)
......
549 549

  
550 550
#if !defined(CONFIG_USER_ONLY)
551 551

  
552
void tlb_fill(target_ulong addr, int is_write, int is_user, 
552
void tlb_fill(target_ulong addr, int is_write, int is_user,
553 553
              void *retaddr);
554 554

  
555 555
#define ACCESS_TYPE 3
......
607 607
#else
608 608
#error unimplemented CPU
609 609
#endif
610
    if (__builtin_expect(env->tlb_table[is_user][index].addr_code != 
610
    if (__builtin_expect(env->tlb_table[is_user][index].addr_code !=
611 611
                         (addr & TARGET_PAGE_MASK), 0)) {
612 612
        ldub_code(addr);
613 613
    }
......
638 638
static inline int kqemu_is_ok(CPUState *env)
639 639
{
640 640
    return(env->kqemu_enabled &&
641
           (env->cr[0] & CR0_PE_MASK) && 
641
           (env->cr[0] & CR0_PE_MASK) &&
642 642
           !(env->hflags & HF_INHIBIT_IRQ_MASK) &&
643 643
           (env->eflags & IF_MASK) &&
644 644
           !(env->eflags & VM_MASK) &&
645
           (env->kqemu_enabled == 2 || 
645
           (env->kqemu_enabled == 2 ||
646 646
            ((env->hflags & HF_CPL_MASK) == 3 &&
647 647
             (env->eflags & IOPL_MASK) != IOPL_MASK)));
648 648
}

Also available in: Unified diff