Revision 5fafdf24 mips-dis.c

b/mips-dis.c
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   "l" 32 bit floating point constant in .lit4
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   MDMX instruction operands (note that while these use the FP register
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   fields, they accept both $fN and $vN names for the registers):  
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   fields, they accept both $fN and $vN names for the registers): 
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   "O"	MDMX alignment offset (OP_*_ALN)
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   "Q"	MDMX vector/scalar/immediate source (OP_*_VSEL and OP_*_FT)
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   "X"	MDMX destination register (OP_*_FD) 
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   "X"	MDMX destination register (OP_*_FD)
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   "Y"	MDMX source register (OP_*_FS)
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   "Z"	MDMX source register (OP_*_FT)
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......
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   Because of the lookup algorithm used, entries with the same opcode
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   name must be contiguous.
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   Many instructions are short hand for other instructions (i.e., The
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   jal <register> instruction is short for jalr <register>).  */
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......
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	      lsb = ((l >> OP_SH_SHAMT) & OP_MASK_SHAMT) + 32;
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	      (*info->fprintf_func) (info->stream, "0x%x", lsb);
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	      break;
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	    case 'F':
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	      msb = ((l >> OP_SH_INSMSB) & OP_MASK_INSMSB) + 32;
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	      (*info->fprintf_func) (info->stream, "0x%x", msb - lsb + 1);

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