root / hw / arm_sysctl.c @ 6059631c
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| 1 | 5fafdf24 | ths | /*
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|---|---|---|---|
| 2 | e69954b9 | pbrook | * Status and system control registers for ARM RealView/Versatile boards.
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| 3 | e69954b9 | pbrook | *
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| 4 | 9ee6e8bb | pbrook | * Copyright (c) 2006-2007 CodeSourcery.
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| 5 | e69954b9 | pbrook | * Written by Paul Brook
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| 6 | e69954b9 | pbrook | *
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| 7 | e69954b9 | pbrook | * This code is licenced under the GPL.
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| 8 | e69954b9 | pbrook | */
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| 9 | e69954b9 | pbrook | |
| 10 | 042eb37a | Daniel Jacobowitz | #include "hw.h" |
| 11 | 042eb37a | Daniel Jacobowitz | #include "qemu-timer.h" |
| 12 | 82634c2d | Paul Brook | #include "sysbus.h" |
| 13 | 9596ebb7 | pbrook | #include "primecell.h" |
| 14 | 87ecb68b | pbrook | #include "sysemu.h" |
| 15 | e69954b9 | pbrook | |
| 16 | e69954b9 | pbrook | #define LOCK_VALUE 0xa05f |
| 17 | e69954b9 | pbrook | |
| 18 | e69954b9 | pbrook | typedef struct { |
| 19 | 82634c2d | Paul Brook | SysBusDevice busdev; |
| 20 | e69954b9 | pbrook | uint32_t sys_id; |
| 21 | e69954b9 | pbrook | uint32_t leds; |
| 22 | e69954b9 | pbrook | uint16_t lockval; |
| 23 | e69954b9 | pbrook | uint32_t cfgdata1; |
| 24 | e69954b9 | pbrook | uint32_t cfgdata2; |
| 25 | e69954b9 | pbrook | uint32_t flags; |
| 26 | e69954b9 | pbrook | uint32_t nvflags; |
| 27 | e69954b9 | pbrook | uint32_t resetlevel; |
| 28 | 26e92f65 | Paul Brook | uint32_t proc_id; |
| 29 | b50ff6f5 | Peter Maydell | uint32_t sys_mci; |
| 30 | e69954b9 | pbrook | } arm_sysctl_state; |
| 31 | e69954b9 | pbrook | |
| 32 | b5ad0ae7 | Peter Maydell | static const VMStateDescription vmstate_arm_sysctl = { |
| 33 | b5ad0ae7 | Peter Maydell | .name = "realview_sysctl",
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| 34 | b5ad0ae7 | Peter Maydell | .version_id = 1,
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| 35 | b5ad0ae7 | Peter Maydell | .minimum_version_id = 1,
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| 36 | b5ad0ae7 | Peter Maydell | .fields = (VMStateField[]) {
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| 37 | b5ad0ae7 | Peter Maydell | VMSTATE_UINT32(leds, arm_sysctl_state), |
| 38 | b5ad0ae7 | Peter Maydell | VMSTATE_UINT16(lockval, arm_sysctl_state), |
| 39 | b5ad0ae7 | Peter Maydell | VMSTATE_UINT32(cfgdata1, arm_sysctl_state), |
| 40 | b5ad0ae7 | Peter Maydell | VMSTATE_UINT32(cfgdata2, arm_sysctl_state), |
| 41 | b5ad0ae7 | Peter Maydell | VMSTATE_UINT32(flags, arm_sysctl_state), |
| 42 | b5ad0ae7 | Peter Maydell | VMSTATE_UINT32(nvflags, arm_sysctl_state), |
| 43 | b5ad0ae7 | Peter Maydell | VMSTATE_UINT32(resetlevel, arm_sysctl_state), |
| 44 | b5ad0ae7 | Peter Maydell | VMSTATE_END_OF_LIST() |
| 45 | b5ad0ae7 | Peter Maydell | } |
| 46 | b5ad0ae7 | Peter Maydell | }; |
| 47 | b5ad0ae7 | Peter Maydell | |
| 48 | b50ff6f5 | Peter Maydell | /* The PB926 actually uses a different format for
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| 49 | b50ff6f5 | Peter Maydell | * its SYS_ID register. Fortunately the bits which are
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| 50 | b50ff6f5 | Peter Maydell | * board type on later boards are distinct.
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| 51 | b50ff6f5 | Peter Maydell | */
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| 52 | b50ff6f5 | Peter Maydell | #define BOARD_ID_PB926 0x100 |
| 53 | b50ff6f5 | Peter Maydell | #define BOARD_ID_EB 0x140 |
| 54 | b50ff6f5 | Peter Maydell | #define BOARD_ID_PBA8 0x178 |
| 55 | b50ff6f5 | Peter Maydell | #define BOARD_ID_PBX 0x182 |
| 56 | b50ff6f5 | Peter Maydell | |
| 57 | b50ff6f5 | Peter Maydell | static int board_id(arm_sysctl_state *s) |
| 58 | b50ff6f5 | Peter Maydell | {
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| 59 | b50ff6f5 | Peter Maydell | /* Extract the board ID field from the SYS_ID register value */
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| 60 | b50ff6f5 | Peter Maydell | return (s->sys_id >> 16) & 0xfff; |
| 61 | b50ff6f5 | Peter Maydell | } |
| 62 | b50ff6f5 | Peter Maydell | |
| 63 | be0f204a | Paul Brook | static void arm_sysctl_reset(DeviceState *d) |
| 64 | be0f204a | Paul Brook | {
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| 65 | be0f204a | Paul Brook | arm_sysctl_state *s = FROM_SYSBUS(arm_sysctl_state, sysbus_from_qdev(d)); |
| 66 | be0f204a | Paul Brook | |
| 67 | be0f204a | Paul Brook | s->leds = 0;
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| 68 | be0f204a | Paul Brook | s->lockval = 0;
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| 69 | be0f204a | Paul Brook | s->cfgdata1 = 0;
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| 70 | be0f204a | Paul Brook | s->cfgdata2 = 0;
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| 71 | be0f204a | Paul Brook | s->flags = 0;
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| 72 | be0f204a | Paul Brook | s->resetlevel = 0;
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| 73 | be0f204a | Paul Brook | } |
| 74 | be0f204a | Paul Brook | |
| 75 | c227f099 | Anthony Liguori | static uint32_t arm_sysctl_read(void *opaque, target_phys_addr_t offset) |
| 76 | e69954b9 | pbrook | {
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| 77 | e69954b9 | pbrook | arm_sysctl_state *s = (arm_sysctl_state *)opaque; |
| 78 | e69954b9 | pbrook | |
| 79 | e69954b9 | pbrook | switch (offset) {
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| 80 | e69954b9 | pbrook | case 0x00: /* ID */ |
| 81 | e69954b9 | pbrook | return s->sys_id;
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| 82 | e69954b9 | pbrook | case 0x04: /* SW */ |
| 83 | e69954b9 | pbrook | /* General purpose hardware switches.
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| 84 | e69954b9 | pbrook | We don't have a useful way of exposing these to the user. */
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| 85 | e69954b9 | pbrook | return 0; |
| 86 | e69954b9 | pbrook | case 0x08: /* LED */ |
| 87 | e69954b9 | pbrook | return s->leds;
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| 88 | e69954b9 | pbrook | case 0x20: /* LOCK */ |
| 89 | e69954b9 | pbrook | return s->lockval;
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| 90 | e69954b9 | pbrook | case 0x0c: /* OSC0 */ |
| 91 | e69954b9 | pbrook | case 0x10: /* OSC1 */ |
| 92 | e69954b9 | pbrook | case 0x14: /* OSC2 */ |
| 93 | e69954b9 | pbrook | case 0x18: /* OSC3 */ |
| 94 | e69954b9 | pbrook | case 0x1c: /* OSC4 */ |
| 95 | e69954b9 | pbrook | case 0x24: /* 100HZ */ |
| 96 | e69954b9 | pbrook | /* ??? Implement these. */
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| 97 | e69954b9 | pbrook | return 0; |
| 98 | e69954b9 | pbrook | case 0x28: /* CFGDATA1 */ |
| 99 | e69954b9 | pbrook | return s->cfgdata1;
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| 100 | e69954b9 | pbrook | case 0x2c: /* CFGDATA2 */ |
| 101 | e69954b9 | pbrook | return s->cfgdata2;
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| 102 | e69954b9 | pbrook | case 0x30: /* FLAGS */ |
| 103 | e69954b9 | pbrook | return s->flags;
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| 104 | e69954b9 | pbrook | case 0x38: /* NVFLAGS */ |
| 105 | e69954b9 | pbrook | return s->nvflags;
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| 106 | e69954b9 | pbrook | case 0x40: /* RESETCTL */ |
| 107 | e69954b9 | pbrook | return s->resetlevel;
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| 108 | e69954b9 | pbrook | case 0x44: /* PCICTL */ |
| 109 | e69954b9 | pbrook | return 1; |
| 110 | e69954b9 | pbrook | case 0x48: /* MCI */ |
| 111 | b50ff6f5 | Peter Maydell | return s->sys_mci;
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| 112 | e69954b9 | pbrook | case 0x4c: /* FLASH */ |
| 113 | e69954b9 | pbrook | return 0; |
| 114 | e69954b9 | pbrook | case 0x50: /* CLCD */ |
| 115 | e69954b9 | pbrook | return 0x1000; |
| 116 | e69954b9 | pbrook | case 0x54: /* CLCDSER */ |
| 117 | e69954b9 | pbrook | return 0; |
| 118 | e69954b9 | pbrook | case 0x58: /* BOOTCS */ |
| 119 | e69954b9 | pbrook | return 0; |
| 120 | e69954b9 | pbrook | case 0x5c: /* 24MHz */ |
| 121 | 042eb37a | Daniel Jacobowitz | return muldiv64(qemu_get_clock(vm_clock), 24000000, get_ticks_per_sec()); |
| 122 | e69954b9 | pbrook | case 0x60: /* MISC */ |
| 123 | e69954b9 | pbrook | return 0; |
| 124 | e69954b9 | pbrook | case 0x84: /* PROCID0 */ |
| 125 | 26e92f65 | Paul Brook | return s->proc_id;
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| 126 | e69954b9 | pbrook | case 0x88: /* PROCID1 */ |
| 127 | e69954b9 | pbrook | return 0xff000000; |
| 128 | e69954b9 | pbrook | case 0x64: /* DMAPSR0 */ |
| 129 | e69954b9 | pbrook | case 0x68: /* DMAPSR1 */ |
| 130 | e69954b9 | pbrook | case 0x6c: /* DMAPSR2 */ |
| 131 | e69954b9 | pbrook | case 0x70: /* IOSEL */ |
| 132 | e69954b9 | pbrook | case 0x74: /* PLDCTL */ |
| 133 | e69954b9 | pbrook | case 0x80: /* BUSID */ |
| 134 | e69954b9 | pbrook | case 0x8c: /* OSCRESET0 */ |
| 135 | e69954b9 | pbrook | case 0x90: /* OSCRESET1 */ |
| 136 | e69954b9 | pbrook | case 0x94: /* OSCRESET2 */ |
| 137 | e69954b9 | pbrook | case 0x98: /* OSCRESET3 */ |
| 138 | e69954b9 | pbrook | case 0x9c: /* OSCRESET4 */ |
| 139 | e69954b9 | pbrook | case 0xc0: /* SYS_TEST_OSC0 */ |
| 140 | e69954b9 | pbrook | case 0xc4: /* SYS_TEST_OSC1 */ |
| 141 | e69954b9 | pbrook | case 0xc8: /* SYS_TEST_OSC2 */ |
| 142 | e69954b9 | pbrook | case 0xcc: /* SYS_TEST_OSC3 */ |
| 143 | e69954b9 | pbrook | case 0xd0: /* SYS_TEST_OSC4 */ |
| 144 | e69954b9 | pbrook | return 0; |
| 145 | e69954b9 | pbrook | default:
|
| 146 | e69954b9 | pbrook | printf ("arm_sysctl_read: Bad register offset 0x%x\n", (int)offset); |
| 147 | e69954b9 | pbrook | return 0; |
| 148 | e69954b9 | pbrook | } |
| 149 | e69954b9 | pbrook | } |
| 150 | e69954b9 | pbrook | |
| 151 | c227f099 | Anthony Liguori | static void arm_sysctl_write(void *opaque, target_phys_addr_t offset, |
| 152 | e69954b9 | pbrook | uint32_t val) |
| 153 | e69954b9 | pbrook | {
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| 154 | e69954b9 | pbrook | arm_sysctl_state *s = (arm_sysctl_state *)opaque; |
| 155 | e69954b9 | pbrook | |
| 156 | e69954b9 | pbrook | switch (offset) {
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| 157 | e69954b9 | pbrook | case 0x08: /* LED */ |
| 158 | e69954b9 | pbrook | s->leds = val; |
| 159 | e69954b9 | pbrook | case 0x0c: /* OSC0 */ |
| 160 | e69954b9 | pbrook | case 0x10: /* OSC1 */ |
| 161 | e69954b9 | pbrook | case 0x14: /* OSC2 */ |
| 162 | e69954b9 | pbrook | case 0x18: /* OSC3 */ |
| 163 | e69954b9 | pbrook | case 0x1c: /* OSC4 */ |
| 164 | e69954b9 | pbrook | /* ??? */
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| 165 | e69954b9 | pbrook | break;
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| 166 | e69954b9 | pbrook | case 0x20: /* LOCK */ |
| 167 | e69954b9 | pbrook | if (val == LOCK_VALUE)
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| 168 | e69954b9 | pbrook | s->lockval = val; |
| 169 | e69954b9 | pbrook | else
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| 170 | e69954b9 | pbrook | s->lockval = val & 0x7fff;
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| 171 | e69954b9 | pbrook | break;
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| 172 | e69954b9 | pbrook | case 0x28: /* CFGDATA1 */ |
| 173 | e69954b9 | pbrook | /* ??? Need to implement this. */
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| 174 | e69954b9 | pbrook | s->cfgdata1 = val; |
| 175 | e69954b9 | pbrook | break;
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| 176 | e69954b9 | pbrook | case 0x2c: /* CFGDATA2 */ |
| 177 | e69954b9 | pbrook | /* ??? Need to implement this. */
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| 178 | e69954b9 | pbrook | s->cfgdata2 = val; |
| 179 | e69954b9 | pbrook | break;
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| 180 | e69954b9 | pbrook | case 0x30: /* FLAGSSET */ |
| 181 | e69954b9 | pbrook | s->flags |= val; |
| 182 | e69954b9 | pbrook | break;
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| 183 | e69954b9 | pbrook | case 0x34: /* FLAGSCLR */ |
| 184 | e69954b9 | pbrook | s->flags &= ~val; |
| 185 | e69954b9 | pbrook | break;
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| 186 | e69954b9 | pbrook | case 0x38: /* NVFLAGSSET */ |
| 187 | e69954b9 | pbrook | s->nvflags |= val; |
| 188 | e69954b9 | pbrook | break;
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| 189 | e69954b9 | pbrook | case 0x3c: /* NVFLAGSCLR */ |
| 190 | e69954b9 | pbrook | s->nvflags &= ~val; |
| 191 | e69954b9 | pbrook | break;
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| 192 | e69954b9 | pbrook | case 0x40: /* RESETCTL */ |
| 193 | e69954b9 | pbrook | if (s->lockval == LOCK_VALUE) {
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| 194 | e69954b9 | pbrook | s->resetlevel = val; |
| 195 | e69954b9 | pbrook | if (val & 0x100) |
| 196 | f3d6b95e | pbrook | qemu_system_reset_request (); |
| 197 | e69954b9 | pbrook | } |
| 198 | e69954b9 | pbrook | break;
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| 199 | e69954b9 | pbrook | case 0x44: /* PCICTL */ |
| 200 | e69954b9 | pbrook | /* nothing to do. */
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| 201 | e69954b9 | pbrook | break;
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| 202 | e69954b9 | pbrook | case 0x4c: /* FLASH */ |
| 203 | e69954b9 | pbrook | case 0x50: /* CLCD */ |
| 204 | e69954b9 | pbrook | case 0x54: /* CLCDSER */ |
| 205 | e69954b9 | pbrook | case 0x64: /* DMAPSR0 */ |
| 206 | e69954b9 | pbrook | case 0x68: /* DMAPSR1 */ |
| 207 | e69954b9 | pbrook | case 0x6c: /* DMAPSR2 */ |
| 208 | e69954b9 | pbrook | case 0x70: /* IOSEL */ |
| 209 | e69954b9 | pbrook | case 0x74: /* PLDCTL */ |
| 210 | e69954b9 | pbrook | case 0x80: /* BUSID */ |
| 211 | e69954b9 | pbrook | case 0x84: /* PROCID0 */ |
| 212 | e69954b9 | pbrook | case 0x88: /* PROCID1 */ |
| 213 | e69954b9 | pbrook | case 0x8c: /* OSCRESET0 */ |
| 214 | e69954b9 | pbrook | case 0x90: /* OSCRESET1 */ |
| 215 | e69954b9 | pbrook | case 0x94: /* OSCRESET2 */ |
| 216 | e69954b9 | pbrook | case 0x98: /* OSCRESET3 */ |
| 217 | e69954b9 | pbrook | case 0x9c: /* OSCRESET4 */ |
| 218 | e69954b9 | pbrook | break;
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| 219 | e69954b9 | pbrook | default:
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| 220 | e69954b9 | pbrook | printf ("arm_sysctl_write: Bad register offset 0x%x\n", (int)offset); |
| 221 | e69954b9 | pbrook | return;
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| 222 | e69954b9 | pbrook | } |
| 223 | e69954b9 | pbrook | } |
| 224 | e69954b9 | pbrook | |
| 225 | d60efc6b | Blue Swirl | static CPUReadMemoryFunc * const arm_sysctl_readfn[] = { |
| 226 | e69954b9 | pbrook | arm_sysctl_read, |
| 227 | e69954b9 | pbrook | arm_sysctl_read, |
| 228 | e69954b9 | pbrook | arm_sysctl_read |
| 229 | e69954b9 | pbrook | }; |
| 230 | e69954b9 | pbrook | |
| 231 | d60efc6b | Blue Swirl | static CPUWriteMemoryFunc * const arm_sysctl_writefn[] = { |
| 232 | e69954b9 | pbrook | arm_sysctl_write, |
| 233 | e69954b9 | pbrook | arm_sysctl_write, |
| 234 | e69954b9 | pbrook | arm_sysctl_write |
| 235 | e69954b9 | pbrook | }; |
| 236 | e69954b9 | pbrook | |
| 237 | b50ff6f5 | Peter Maydell | static void arm_sysctl_gpio_set(void *opaque, int line, int level) |
| 238 | b50ff6f5 | Peter Maydell | {
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| 239 | b50ff6f5 | Peter Maydell | arm_sysctl_state *s = (arm_sysctl_state *)opaque; |
| 240 | b50ff6f5 | Peter Maydell | switch (line) {
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| 241 | b50ff6f5 | Peter Maydell | case ARM_SYSCTL_GPIO_MMC_WPROT:
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| 242 | b50ff6f5 | Peter Maydell | {
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| 243 | b50ff6f5 | Peter Maydell | /* For PB926 and EB write-protect is bit 2 of SYS_MCI;
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| 244 | b50ff6f5 | Peter Maydell | * for all later boards it is bit 1.
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| 245 | b50ff6f5 | Peter Maydell | */
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| 246 | b50ff6f5 | Peter Maydell | int bit = 2; |
| 247 | b50ff6f5 | Peter Maydell | if ((board_id(s) == BOARD_ID_PB926) || (board_id(s) == BOARD_ID_EB)) {
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| 248 | b50ff6f5 | Peter Maydell | bit = 4;
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| 249 | b50ff6f5 | Peter Maydell | } |
| 250 | b50ff6f5 | Peter Maydell | s->sys_mci &= ~bit; |
| 251 | b50ff6f5 | Peter Maydell | if (level) {
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| 252 | b50ff6f5 | Peter Maydell | s->sys_mci |= bit; |
| 253 | b50ff6f5 | Peter Maydell | } |
| 254 | b50ff6f5 | Peter Maydell | break;
|
| 255 | b50ff6f5 | Peter Maydell | } |
| 256 | b50ff6f5 | Peter Maydell | case ARM_SYSCTL_GPIO_MMC_CARDIN:
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| 257 | b50ff6f5 | Peter Maydell | s->sys_mci &= ~1;
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| 258 | b50ff6f5 | Peter Maydell | if (level) {
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| 259 | b50ff6f5 | Peter Maydell | s->sys_mci |= 1;
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| 260 | b50ff6f5 | Peter Maydell | } |
| 261 | b50ff6f5 | Peter Maydell | break;
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| 262 | b50ff6f5 | Peter Maydell | } |
| 263 | b50ff6f5 | Peter Maydell | } |
| 264 | b50ff6f5 | Peter Maydell | |
| 265 | 81a322d4 | Gerd Hoffmann | static int arm_sysctl_init1(SysBusDevice *dev) |
| 266 | e69954b9 | pbrook | {
|
| 267 | 82634c2d | Paul Brook | arm_sysctl_state *s = FROM_SYSBUS(arm_sysctl_state, dev); |
| 268 | e69954b9 | pbrook | int iomemtype;
|
| 269 | e69954b9 | pbrook | |
| 270 | 1eed09cb | Avi Kivity | iomemtype = cpu_register_io_memory(arm_sysctl_readfn, |
| 271 | 2507c12a | Alexander Graf | arm_sysctl_writefn, s, |
| 272 | 2507c12a | Alexander Graf | DEVICE_NATIVE_ENDIAN); |
| 273 | 82634c2d | Paul Brook | sysbus_init_mmio(dev, 0x1000, iomemtype);
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| 274 | b50ff6f5 | Peter Maydell | qdev_init_gpio_in(&s->busdev.qdev, arm_sysctl_gpio_set, 2);
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| 275 | e69954b9 | pbrook | /* ??? Save/restore. */
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| 276 | 81a322d4 | Gerd Hoffmann | return 0; |
| 277 | e69954b9 | pbrook | } |
| 278 | 82634c2d | Paul Brook | |
| 279 | 82634c2d | Paul Brook | /* Legacy helper function. */
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| 280 | 26e92f65 | Paul Brook | void arm_sysctl_init(uint32_t base, uint32_t sys_id, uint32_t proc_id)
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| 281 | 82634c2d | Paul Brook | {
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| 282 | 82634c2d | Paul Brook | DeviceState *dev; |
| 283 | 82634c2d | Paul Brook | |
| 284 | 82634c2d | Paul Brook | dev = qdev_create(NULL, "realview_sysctl"); |
| 285 | ee6847d1 | Gerd Hoffmann | qdev_prop_set_uint32(dev, "sys_id", sys_id);
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| 286 | e23a1b33 | Markus Armbruster | qdev_init_nofail(dev); |
| 287 | 26e92f65 | Paul Brook | qdev_prop_set_uint32(dev, "proc_id", proc_id);
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| 288 | 82634c2d | Paul Brook | sysbus_mmio_map(sysbus_from_qdev(dev), 0, base);
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| 289 | 82634c2d | Paul Brook | } |
| 290 | 82634c2d | Paul Brook | |
| 291 | ee6847d1 | Gerd Hoffmann | static SysBusDeviceInfo arm_sysctl_info = {
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| 292 | ee6847d1 | Gerd Hoffmann | .init = arm_sysctl_init1, |
| 293 | ee6847d1 | Gerd Hoffmann | .qdev.name = "realview_sysctl",
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| 294 | ee6847d1 | Gerd Hoffmann | .qdev.size = sizeof(arm_sysctl_state),
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| 295 | b5ad0ae7 | Peter Maydell | .qdev.vmsd = &vmstate_arm_sysctl, |
| 296 | be0f204a | Paul Brook | .qdev.reset = arm_sysctl_reset, |
| 297 | ee6847d1 | Gerd Hoffmann | .qdev.props = (Property[]) {
|
| 298 | e325775b | Gerd Hoffmann | DEFINE_PROP_UINT32("sys_id", arm_sysctl_state, sys_id, 0), |
| 299 | 26e92f65 | Paul Brook | DEFINE_PROP_UINT32("proc_id", arm_sysctl_state, proc_id, 0), |
| 300 | e325775b | Gerd Hoffmann | DEFINE_PROP_END_OF_LIST(), |
| 301 | ee6847d1 | Gerd Hoffmann | } |
| 302 | ee6847d1 | Gerd Hoffmann | }; |
| 303 | ee6847d1 | Gerd Hoffmann | |
| 304 | 82634c2d | Paul Brook | static void arm_sysctl_register_devices(void) |
| 305 | 82634c2d | Paul Brook | {
|
| 306 | ee6847d1 | Gerd Hoffmann | sysbus_register_withprop(&arm_sysctl_info); |
| 307 | 82634c2d | Paul Brook | } |
| 308 | 82634c2d | Paul Brook | |
| 309 | 82634c2d | Paul Brook | device_init(arm_sysctl_register_devices) |