Revision 61999750
| b/hw/sun4m.c | ||
|---|---|---|
| 97 | 97 |
target_phys_addr_t reg_base, vram_base; |
| 98 | 98 |
} vsimm[MAX_VSIMMS]; |
| 99 | 99 |
target_phys_addr_t ecc_base; |
| 100 |
uint32_t ecc_version; |
|
| 101 |
uint8_t nvram_machine_id; |
|
| 102 |
uint16_t machine_id; |
|
| 103 |
uint32_t iommu_version; |
|
| 104 | 100 |
uint64_t max_mem; |
| 105 | 101 |
const char * const default_cpu_model; |
| 102 |
uint32_t ecc_version; |
|
| 103 |
uint32_t iommu_version; |
|
| 104 |
uint16_t machine_id; |
|
| 105 |
uint8_t nvram_machine_id; |
|
| 106 | 106 |
}; |
| 107 | 107 |
|
| 108 | 108 |
#define MAX_IOUNITS 5 |
| ... | ... | |
| 115 | 115 |
target_phys_addr_t ledma_base, le_base; |
| 116 | 116 |
target_phys_addr_t tcx_base; |
| 117 | 117 |
target_phys_addr_t sbi_base; |
| 118 |
uint8_t nvram_machine_id; |
|
| 119 |
uint16_t machine_id; |
|
| 120 |
uint32_t iounit_version; |
|
| 121 | 118 |
uint64_t max_mem; |
| 122 | 119 |
const char * const default_cpu_model; |
| 120 |
uint32_t iounit_version; |
|
| 121 |
uint16_t machine_id; |
|
| 122 |
uint8_t nvram_machine_id; |
|
| 123 | 123 |
}; |
| 124 | 124 |
|
| 125 | 125 |
struct sun4c_hwdef {
|
| ... | ... | |
| 128 | 128 |
target_phys_addr_t serial_base, fd_base; |
| 129 | 129 |
target_phys_addr_t idreg_base, dma_base, esp_base, le_base; |
| 130 | 130 |
target_phys_addr_t tcx_base, aux1_base; |
| 131 |
uint8_t nvram_machine_id; |
|
| 132 |
uint16_t machine_id; |
|
| 133 |
uint32_t iommu_version; |
|
| 134 | 131 |
uint64_t max_mem; |
| 135 | 132 |
const char * const default_cpu_model; |
| 133 |
uint32_t iommu_version; |
|
| 134 |
uint16_t machine_id; |
|
| 135 |
uint8_t nvram_machine_id; |
|
| 136 | 136 |
}; |
| 137 | 137 |
|
| 138 | 138 |
int DMA_get_channel_mode (int nchan) |
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