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/*
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 *  i386 execution defines 
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 *
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 *  Copyright (c) 2003 Fabrice Bellard
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 *
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 * This library is free software; you can redistribute it and/or
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 * modify it under the terms of the GNU Lesser General Public
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 * License as published by the Free Software Foundation; either
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 * version 2 of the License, or (at your option) any later version.
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 *
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 * This library is distributed in the hope that it will be useful,
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 * but WITHOUT ANY WARRANTY; without even the implied warranty of
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 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
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 * Lesser General Public License for more details.
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 *
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 * You should have received a copy of the GNU Lesser General Public
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 * License along with this library; if not, write to the Free Software
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 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA  02111-1307  USA
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 */
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#include "config.h"
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#include "dyngen-exec.h"
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/* at least 4 register variables are defined */
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register struct CPUX86State *env asm(AREG0);
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register uint32_t T0 asm(AREG1);
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register uint32_t T1 asm(AREG2);
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register uint32_t T2 asm(AREG3);
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#define A0 T2
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/* if more registers are available, we define some registers too */
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#ifdef AREG4
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register uint32_t EAX asm(AREG4);
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#define reg_EAX
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#endif
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#ifdef AREG5
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register uint32_t ESP asm(AREG5);
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#define reg_ESP
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#endif
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#ifdef AREG6
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register uint32_t EBP asm(AREG6);
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#define reg_EBP
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#endif
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#ifdef AREG7
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register uint32_t ECX asm(AREG7);
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#define reg_ECX
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#endif
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#ifdef AREG8
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register uint32_t EDX asm(AREG8);
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#define reg_EDX
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#endif
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#ifdef AREG9
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register uint32_t EBX asm(AREG9);
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#define reg_EBX
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#endif
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#ifdef AREG10
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register uint32_t ESI asm(AREG10);
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#define reg_ESI
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#endif
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#ifdef AREG11
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register uint32_t EDI asm(AREG11);
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#define reg_EDI
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#endif
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extern FILE *logfile;
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extern int loglevel;
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#ifndef reg_EAX
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#define EAX (env->regs[R_EAX])
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#endif
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#ifndef reg_ECX
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#define ECX (env->regs[R_ECX])
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#endif
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#ifndef reg_EDX
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#define EDX (env->regs[R_EDX])
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#endif
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#ifndef reg_EBX
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#define EBX (env->regs[R_EBX])
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#endif
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#ifndef reg_ESP
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#define ESP (env->regs[R_ESP])
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#endif
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#ifndef reg_EBP
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#define EBP (env->regs[R_EBP])
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#endif
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#ifndef reg_ESI
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#define ESI (env->regs[R_ESI])
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#endif
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#ifndef reg_EDI
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#define EDI (env->regs[R_EDI])
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#endif
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#define EIP  (env->eip)
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#define DF  (env->df)
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#define CC_SRC (env->cc_src)
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#define CC_DST (env->cc_dst)
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#define CC_OP  (env->cc_op)
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/* float macros */
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#define FT0    (env->ft0)
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#define ST0    (env->fpregs[env->fpstt])
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#define ST(n)  (env->fpregs[(env->fpstt + (n)) & 7])
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#define ST1    ST(1)
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#ifdef USE_FP_CONVERT
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#define FP_CONVERT  (env->fp_convert)
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#endif
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#include "cpu.h"
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#include "exec-all.h"
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typedef struct CCTable {
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    int (*compute_all)(void); /* return all the flags */
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    int (*compute_c)(void);  /* return the C flag */
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} CCTable;
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extern CCTable cc_table[];
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void load_seg(int seg_reg, int selector);
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void helper_ljmp_protected_T0_T1(int next_eip);
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void helper_lcall_real_T0_T1(int shift, int next_eip);
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void helper_lcall_protected_T0_T1(int shift, int next_eip);
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void helper_iret_real(int shift);
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void helper_iret_protected(int shift, int next_eip);
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void helper_lret_protected(int shift, int addend);
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void helper_lldt_T0(void);
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void helper_ltr_T0(void);
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void helper_movl_crN_T0(int reg);
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void helper_movl_drN_T0(int reg);
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void helper_invlpg(unsigned int addr);
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void cpu_x86_update_cr0(CPUX86State *env, uint32_t new_cr0);
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void cpu_x86_update_cr3(CPUX86State *env, uint32_t new_cr3);
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void cpu_x86_update_cr4(CPUX86State *env, uint32_t new_cr4);
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void cpu_x86_flush_tlb(CPUX86State *env, uint32_t addr);
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int cpu_x86_handle_mmu_fault(CPUX86State *env, uint32_t addr, 
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                             int is_write, int is_user, int is_softmmu);
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void tlb_fill(unsigned long addr, int is_write, int is_user, 
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              void *retaddr);
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void __hidden cpu_lock(void);
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void __hidden cpu_unlock(void);
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void do_interrupt(int intno, int is_int, int error_code, 
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                  unsigned int next_eip, int is_hw);
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void do_interrupt_user(int intno, int is_int, int error_code, 
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                       unsigned int next_eip);
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void raise_interrupt(int intno, int is_int, int error_code, 
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                     unsigned int next_eip);
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void raise_exception_err(int exception_index, int error_code);
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void raise_exception(int exception_index);
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void __hidden cpu_loop_exit(void);
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void helper_fsave(uint8_t *ptr, int data32);
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void helper_frstor(uint8_t *ptr, int data32);
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void OPPROTO op_movl_eflags_T0(void);
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void OPPROTO op_movl_T0_eflags(void);
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void raise_interrupt(int intno, int is_int, int error_code, 
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                     unsigned int next_eip);
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void raise_exception_err(int exception_index, int error_code);
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void raise_exception(int exception_index);
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void helper_divl_EAX_T0(uint32_t eip);
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void helper_idivl_EAX_T0(uint32_t eip);
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void helper_cmpxchg8b(void);
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void helper_cpuid(void);
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void helper_enter_level(int level, int data32);
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void helper_sysenter(void);
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void helper_sysexit(void);
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void helper_rdtsc(void);
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void helper_rdmsr(void);
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void helper_wrmsr(void);
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void helper_lsl(void);
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void helper_lar(void);
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void helper_verr(void);
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void helper_verw(void);
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void check_iob_T0(void);
182
void check_iow_T0(void);
183
void check_iol_T0(void);
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void check_iob_DX(void);
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void check_iow_DX(void);
186
void check_iol_DX(void);
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/* XXX: move that to a generic header */
189
#if !defined(CONFIG_USER_ONLY)
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#define ldul_user ldl_user
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#define ldul_kernel ldl_kernel
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#define ACCESS_TYPE 0
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#define MEMSUFFIX _kernel
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#define DATA_SIZE 1
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#include "softmmu_header.h"
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#define DATA_SIZE 2
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#include "softmmu_header.h"
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#define DATA_SIZE 4
203
#include "softmmu_header.h"
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#define DATA_SIZE 8
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#include "softmmu_header.h"
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#undef ACCESS_TYPE
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#undef MEMSUFFIX
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#define ACCESS_TYPE 1
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#define MEMSUFFIX _user
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#define DATA_SIZE 1
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#include "softmmu_header.h"
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#define DATA_SIZE 2
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#include "softmmu_header.h"
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#define DATA_SIZE 4
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#include "softmmu_header.h"
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#define DATA_SIZE 8
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#include "softmmu_header.h"
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#undef ACCESS_TYPE
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#undef MEMSUFFIX
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/* these access are slower, they must be as rare as possible */
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#define ACCESS_TYPE 2
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#define MEMSUFFIX _data
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#define DATA_SIZE 1
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#include "softmmu_header.h"
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#define DATA_SIZE 2
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#include "softmmu_header.h"
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#define DATA_SIZE 4
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#include "softmmu_header.h"
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#define DATA_SIZE 8
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#include "softmmu_header.h"
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#undef ACCESS_TYPE
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#undef MEMSUFFIX
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#define ldub(p) ldub_data(p)
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#define ldsb(p) ldsb_data(p)
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#define lduw(p) lduw_data(p)
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#define ldsw(p) ldsw_data(p)
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#define ldl(p) ldl_data(p)
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#define ldq(p) ldq_data(p)
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#define stb(p, v) stb_data(p, v)
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#define stw(p, v) stw_data(p, v)
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#define stl(p, v) stl_data(p, v)
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#define stq(p, v) stq_data(p, v)
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static inline double ldfq(void *ptr)
256
{
257
    union {
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        double d;
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        uint64_t i;
260
    } u;
261
    u.i = ldq(ptr);
262
    return u.d;
263
}
264

    
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static inline void stfq(void *ptr, double v)
266
{
267
    union {
268
        double d;
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        uint64_t i;
270
    } u;
271
    u.d = v;
272
    stq(ptr, u.i);
273
}
274

    
275
static inline float ldfl(void *ptr)
276
{
277
    union {
278
        float f;
279
        uint32_t i;
280
    } u;
281
    u.i = ldl(ptr);
282
    return u.f;
283
}
284

    
285
static inline void stfl(void *ptr, float v)
286
{
287
    union {
288
        float f;
289
        uint32_t i;
290
    } u;
291
    u.f = v;
292
    stl(ptr, u.i);
293
}
294

    
295
#endif /* !defined(CONFIG_USER_ONLY) */
296

    
297
#ifdef USE_X86LDOUBLE
298
/* use long double functions */
299
#define lrint lrintl
300
#define llrint llrintl
301
#define fabs fabsl
302
#define sin sinl
303
#define cos cosl
304
#define sqrt sqrtl
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#define pow powl
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#define log logl
307
#define tan tanl
308
#define atan2 atan2l
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#define floor floorl
310
#define ceil ceill
311
#define rint rintl
312
#endif
313

    
314
#if !defined(_BSD)
315
extern int lrint(CPU86_LDouble x);
316
extern int64_t llrint(CPU86_LDouble x);
317
#else
318
#define lrint(d)                ((int)rint(d))
319
#define llrint(d)                ((int)rint(d))
320
#endif
321
extern CPU86_LDouble fabs(CPU86_LDouble x);
322
extern CPU86_LDouble sin(CPU86_LDouble x);
323
extern CPU86_LDouble cos(CPU86_LDouble x);
324
extern CPU86_LDouble sqrt(CPU86_LDouble x);
325
extern CPU86_LDouble pow(CPU86_LDouble, CPU86_LDouble);
326
extern CPU86_LDouble log(CPU86_LDouble x);
327
extern CPU86_LDouble tan(CPU86_LDouble x);
328
extern CPU86_LDouble atan2(CPU86_LDouble, CPU86_LDouble);
329
extern CPU86_LDouble floor(CPU86_LDouble x);
330
extern CPU86_LDouble ceil(CPU86_LDouble x);
331
extern CPU86_LDouble rint(CPU86_LDouble x);
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333
#define RC_MASK         0xc00
334
#define RC_NEAR                0x000
335
#define RC_DOWN                0x400
336
#define RC_UP                0x800
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#define RC_CHOP                0xc00
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339
#define MAXTAN 9223372036854775808.0
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341
#ifdef __arm__
342
/* we have no way to do correct rounding - a FPU emulator is needed */
343
#define FE_DOWNWARD   FE_TONEAREST
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#define FE_UPWARD     FE_TONEAREST
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#define FE_TOWARDZERO FE_TONEAREST
346
#endif
347

    
348
#ifdef USE_X86LDOUBLE
349

    
350
/* only for x86 */
351
typedef union {
352
    long double d;
353
    struct {
354
        unsigned long long lower;
355
        unsigned short upper;
356
    } l;
357
} CPU86_LDoubleU;
358

    
359
/* the following deal with x86 long double-precision numbers */
360
#define MAXEXPD 0x7fff
361
#define EXPBIAS 16383
362
#define EXPD(fp)        (fp.l.upper & 0x7fff)
363
#define SIGND(fp)        ((fp.l.upper) & 0x8000)
364
#define MANTD(fp)       (fp.l.lower)
365
#define BIASEXPONENT(fp) fp.l.upper = (fp.l.upper & ~(0x7fff)) | EXPBIAS
366

    
367
#else
368

    
369
/* NOTE: arm is horrible as double 32 bit words are stored in big endian ! */
370
typedef union {
371
    double d;
372
#if !defined(WORDS_BIGENDIAN) && !defined(__arm__)
373
    struct {
374
        uint32_t lower;
375
        int32_t upper;
376
    } l;
377
#else
378
    struct {
379
        int32_t upper;
380
        uint32_t lower;
381
    } l;
382
#endif
383
#ifndef __arm__
384
    int64_t ll;
385
#endif
386
} CPU86_LDoubleU;
387

    
388
/* the following deal with IEEE double-precision numbers */
389
#define MAXEXPD 0x7ff
390
#define EXPBIAS 1023
391
#define EXPD(fp)        (((fp.l.upper) >> 20) & 0x7FF)
392
#define SIGND(fp)        ((fp.l.upper) & 0x80000000)
393
#ifdef __arm__
394
#define MANTD(fp)        (fp.l.lower | ((uint64_t)(fp.l.upper & ((1 << 20) - 1)) << 32))
395
#else
396
#define MANTD(fp)        (fp.ll & ((1LL << 52) - 1))
397
#endif
398
#define BIASEXPONENT(fp) fp.l.upper = (fp.l.upper & ~(0x7ff << 20)) | (EXPBIAS << 20)
399
#endif
400

    
401
static inline void fpush(void)
402
{
403
    env->fpstt = (env->fpstt - 1) & 7;
404
    env->fptags[env->fpstt] = 0; /* validate stack entry */
405
}
406

    
407
static inline void fpop(void)
408
{
409
    env->fptags[env->fpstt] = 1; /* invvalidate stack entry */
410
    env->fpstt = (env->fpstt + 1) & 7;
411
}
412

    
413
#ifndef USE_X86LDOUBLE
414
static inline CPU86_LDouble helper_fldt(uint8_t *ptr)
415
{
416
    CPU86_LDoubleU temp;
417
    int upper, e;
418
    uint64_t ll;
419

    
420
    /* mantissa */
421
    upper = lduw(ptr + 8);
422
    /* XXX: handle overflow ? */
423
    e = (upper & 0x7fff) - 16383 + EXPBIAS; /* exponent */
424
    e |= (upper >> 4) & 0x800; /* sign */
425
    ll = (ldq(ptr) >> 11) & ((1LL << 52) - 1);
426
#ifdef __arm__
427
    temp.l.upper = (e << 20) | (ll >> 32);
428
    temp.l.lower = ll;
429
#else
430
    temp.ll = ll | ((uint64_t)e << 52);
431
#endif
432
    return temp.d;
433
}
434

    
435
static inline void helper_fstt(CPU86_LDouble f, uint8_t *ptr)
436
{
437
    CPU86_LDoubleU temp;
438
    int e;
439

    
440
    temp.d = f;
441
    /* mantissa */
442
    stq(ptr, (MANTD(temp) << 11) | (1LL << 63));
443
    /* exponent + sign */
444
    e = EXPD(temp) - EXPBIAS + 16383;
445
    e |= SIGND(temp) >> 16;
446
    stw(ptr + 8, e);
447
}
448
#else
449

    
450
/* XXX: same endianness assumed */
451

    
452
#ifdef CONFIG_USER_ONLY
453

    
454
static inline CPU86_LDouble helper_fldt(uint8_t *ptr)
455
{
456
    return *(CPU86_LDouble *)ptr;
457
}
458

    
459
static inline void helper_fstt(CPU86_LDouble f, uint8_t *ptr)
460
{
461
    *(CPU86_LDouble *)ptr = f;
462
}
463

    
464
#else
465

    
466
/* we use memory access macros */
467

    
468
static inline CPU86_LDouble helper_fldt(uint8_t *ptr)
469
{
470
    CPU86_LDoubleU temp;
471

    
472
    temp.l.lower = ldq(ptr);
473
    temp.l.upper = lduw(ptr + 8);
474
    return temp.d;
475
}
476

    
477
static inline void helper_fstt(CPU86_LDouble f, uint8_t *ptr)
478
{
479
    CPU86_LDoubleU temp;
480
    
481
    temp.d = f;
482
    stq(ptr, temp.l.lower);
483
    stw(ptr + 8, temp.l.upper);
484
}
485

    
486
#endif /* !CONFIG_USER_ONLY */
487

    
488
#endif /* USE_X86LDOUBLE */
489

    
490
#define FPUS_IE (1 << 0)
491
#define FPUS_DE (1 << 1)
492
#define FPUS_ZE (1 << 2)
493
#define FPUS_OE (1 << 3)
494
#define FPUS_UE (1 << 4)
495
#define FPUS_PE (1 << 5)
496
#define FPUS_SF (1 << 6)
497
#define FPUS_SE (1 << 7)
498
#define FPUS_B  (1 << 15)
499

    
500
#define FPUC_EM 0x3f
501

    
502
extern const CPU86_LDouble f15rk[7];
503

    
504
void helper_fldt_ST0_A0(void);
505
void helper_fstt_ST0_A0(void);
506
void fpu_raise_exception(void);
507
CPU86_LDouble helper_fdiv(CPU86_LDouble a, CPU86_LDouble b);
508
void helper_fbld_ST0_A0(void);
509
void helper_fbst_ST0_A0(void);
510
void helper_f2xm1(void);
511
void helper_fyl2x(void);
512
void helper_fptan(void);
513
void helper_fpatan(void);
514
void helper_fxtract(void);
515
void helper_fprem1(void);
516
void helper_fprem(void);
517
void helper_fyl2xp1(void);
518
void helper_fsqrt(void);
519
void helper_fsincos(void);
520
void helper_frndint(void);
521
void helper_fscale(void);
522
void helper_fsin(void);
523
void helper_fcos(void);
524
void helper_fxam_ST0(void);
525
void helper_fstenv(uint8_t *ptr, int data32);
526
void helper_fldenv(uint8_t *ptr, int data32);
527
void helper_fsave(uint8_t *ptr, int data32);
528
void helper_frstor(uint8_t *ptr, int data32);
529
void restore_native_fp_state(CPUState *env);
530
void save_native_fp_state(CPUState *env);
531

    
532
extern const uint8_t parity_table[256];
533
extern const uint8_t rclw_table[32];
534
extern const uint8_t rclb_table[32];
535

    
536
static inline uint32_t compute_eflags(void)
537
{
538
    return env->eflags | cc_table[CC_OP].compute_all() | (DF & DF_MASK);
539
}
540

    
541
/* NOTE: CC_OP must be modified manually to CC_OP_EFLAGS */
542
static inline void load_eflags(int eflags, int update_mask)
543
{
544
    CC_SRC = eflags & (CC_O | CC_S | CC_Z | CC_A | CC_P | CC_C);
545
    DF = 1 - (2 * ((eflags >> 10) & 1));
546
    env->eflags = (env->eflags & ~update_mask) | 
547
        (eflags & update_mask);
548
}
549

    
550
static inline void env_to_regs(void)
551
{
552
#ifdef reg_EAX
553
    EAX = env->regs[R_EAX];
554
#endif
555
#ifdef reg_ECX
556
    ECX = env->regs[R_ECX];
557
#endif
558
#ifdef reg_EDX
559
    EDX = env->regs[R_EDX];
560
#endif
561
#ifdef reg_EBX
562
    EBX = env->regs[R_EBX];
563
#endif
564
#ifdef reg_ESP
565
    ESP = env->regs[R_ESP];
566
#endif
567
#ifdef reg_EBP
568
    EBP = env->regs[R_EBP];
569
#endif
570
#ifdef reg_ESI
571
    ESI = env->regs[R_ESI];
572
#endif
573
#ifdef reg_EDI
574
    EDI = env->regs[R_EDI];
575
#endif
576
}
577

    
578
static inline void regs_to_env(void)
579
{
580
#ifdef reg_EAX
581
    env->regs[R_EAX] = EAX;
582
#endif
583
#ifdef reg_ECX
584
    env->regs[R_ECX] = ECX;
585
#endif
586
#ifdef reg_EDX
587
    env->regs[R_EDX] = EDX;
588
#endif
589
#ifdef reg_EBX
590
    env->regs[R_EBX] = EBX;
591
#endif
592
#ifdef reg_ESP
593
    env->regs[R_ESP] = ESP;
594
#endif
595
#ifdef reg_EBP
596
    env->regs[R_EBP] = EBP;
597
#endif
598
#ifdef reg_ESI
599
    env->regs[R_ESI] = ESI;
600
#endif
601
#ifdef reg_EDI
602
    env->regs[R_EDI] = EDI;
603
#endif
604
}