Revision 61c04807 target-ppc/translate.c

b/target-ppc/translate.c
26 26
#include "cpu.h"
27 27
#include "exec-all.h"
28 28
#include "disas.h"
29
#include "helper.h"
29 30
#include "tcg-op.h"
30 31
#include "qemu-common.h"
31 32

  
......
65 66
    cpu_T[1] = tcg_global_reg_new(TCG_TYPE_TL, TCG_AREG2, "T1");
66 67
    cpu_T[2] = tcg_global_reg_new(TCG_TYPE_TL, TCG_AREG3, "T2");
67 68
#endif
69

  
70
    /* register helpers */
71
#undef DEF_HELPER
72
#define DEF_HELPER(ret, name, params) tcg_register_helper(name, #name);
73
#include "helper.h"
74

  
68 75
    done_init = 1;
69 76
}
70 77

  
78
static inline void tcg_gen_helper_0_i(void *func, TCGv arg)
79
{
80
    TCGv tmp = tcg_const_i32(arg);
81

  
82
    tcg_gen_helper_0_1(func, tmp);
83
    tcg_temp_free(tmp);
84
}
85

  
86

  
71 87
#if defined(OPTIMIZE_FPRF_UPDATE)
72 88
static uint16_t *gen_fprf_buf[OPC_BUF_SIZE];
73 89
static uint16_t **gen_fprf_ptr;
......
249 265

  
250 266
static always_inline void gen_update_nip (DisasContext *ctx, target_ulong nip)
251 267
{
268
    TCGv tmp;
252 269
#if defined(TARGET_PPC64)
253 270
    if (ctx->sf_mode)
254
        gen_op_update_nip_64(nip >> 32, nip);
271
        tmp = tcg_const_i64(nip);
255 272
    else
256 273
#endif
257
        gen_op_update_nip(nip);
274
        tmp = tcg_const_i32((uint32_t)nip);
275

  
276
    tcg_gen_st_tl(tmp, cpu_env, offsetof(CPUState, nip));
277
    tcg_temp_free(tmp);
258 278
}
259 279

  
260 280
#define GEN_EXCP(ctx, excp, error)                                            \
......
1305 1325
        gen_op_load_gpr_T1(rB(ctx->opcode));
1306 1326
        gen_op_xor();
1307 1327
    } else {
1308
        gen_op_reset_T0();
1328
        tcg_gen_movi_tl(cpu_T[0], 0);
1309 1329
    }
1310 1330
    gen_op_store_T0_gpr(rA(ctx->opcode));
1311 1331
    if (unlikely(Rc(ctx->opcode) != 0))
......
1376 1396
    gen_op_load_gpr_T0(rS(ctx->opcode));
1377 1397
#if defined(TARGET_PPC64)
1378 1398
    if (ctx->sf_mode)
1379
        gen_op_popcntb_64();
1399
        tcg_gen_helper_1_1(do_popcntb_64, cpu_T[0], cpu_T[0]);
1380 1400
    else
1381 1401
#endif
1382
        gen_op_popcntb();
1402
        tcg_gen_helper_1_1(do_popcntb, cpu_T[0], cpu_T[0]);
1383 1403
    gen_op_store_T0_gpr(rA(ctx->opcode));
1384 1404
}
1385 1405

  
......
2100 2120
            gen_op_addi(simm);
2101 2121
    }
2102 2122
#ifdef DEBUG_MEMORY_ACCESSES
2103
    gen_op_print_mem_EA();
2123
    tcg_gen_helper_0_0(do_print_mem_EA);
2104 2124
#endif
2105 2125
}
2106 2126

  
......
2114 2134
        gen_op_add();
2115 2135
    }
2116 2136
#ifdef DEBUG_MEMORY_ACCESSES
2117
    gen_op_print_mem_EA();
2137
    tcg_gen_helper_0_0(do_print_mem_EA);
2118 2138
#endif
2119 2139
}
2120 2140

  
2121 2141
static always_inline void gen_addr_register (DisasContext *ctx)
2122 2142
{
2123 2143
    if (rA(ctx->opcode) == 0) {
2124
        gen_op_reset_T0();
2144
        tcg_gen_movi_tl(cpu_T[0], 0);
2125 2145
    } else {
2126 2146
        gen_op_load_gpr_T0(rA(ctx->opcode));
2127 2147
    }
2128 2148
#ifdef DEBUG_MEMORY_ACCESSES
2129
    gen_op_print_mem_EA();
2149
    tcg_gen_helper_0_0(do_print_mem_EA);
2130 2150
#endif
2131 2151
}
2132 2152

  
......
3225 3245
        crm = CRM(ctx->opcode);
3226 3246
        if (likely((crm ^ (crm - 1)) == 0)) {
3227 3247
            crn = ffs(crm);
3228
            gen_op_load_cro(7 - crn);
3248
            tcg_gen_ld8u_tl(cpu_T[0], cpu_env, offsetof(CPUState, crf[7 - crn]));
3229 3249
        }
3230 3250
    } else {
3231
        gen_op_load_cr();
3251
        tcg_gen_helper_1_0(do_load_cr, cpu_T[0]);
3232 3252
    }
3233 3253
    gen_op_store_T0_gpr(rD(ctx->opcode));
3234 3254
}
......
3243 3263
        GEN_EXCP_PRIVREG(ctx);
3244 3264
        return;
3245 3265
    }
3246
    gen_op_load_msr();
3266
    tcg_gen_ld_tl(cpu_T[0], cpu_env, offsetof(CPUState, msr));
3247 3267
    gen_op_store_T0_gpr(rD(ctx->opcode));
3248 3268
#endif
3249 3269
}
......
3327 3347
    if (likely((ctx->opcode & 0x00100000) || (crm ^ (crm - 1)) == 0)) {
3328 3348
        crn = ffs(crm);
3329 3349
        gen_op_srli_T0(crn * 4);
3330
        gen_op_andi_T0(0xF);
3331
        gen_op_store_cro(7 - crn);
3350
        tcg_gen_andi_tl(cpu_T[0], cpu_T[0], 0xF);
3351
        tcg_gen_st8_tl(cpu_T[0], cpu_env, offsetof(CPUState, crf[7 - crn]));
3332 3352
    } else {
3333
        gen_op_store_cr(crm);
3353
        tcg_gen_helper_0_i(do_store_cr, crm);
3334 3354
    }
3335 3355
}
3336 3356

  
......
3355 3375
         *      directly from ppc_store_msr
3356 3376
         */
3357 3377
        gen_update_nip(ctx, ctx->nip);
3358
        gen_op_store_msr();
3378
        tcg_gen_helper_0_1(do_store_msr, cpu_T[0]);
3359 3379
        /* Must stop the translation as machine state (may have) changed */
3360 3380
        /* Note that mtmsr is not always defined as context-synchronizing */
3361 3381
        ctx->exception = POWERPC_EXCP_STOP;
......
3385 3405
        gen_update_nip(ctx, ctx->nip);
3386 3406
#if defined(TARGET_PPC64)
3387 3407
        if (!ctx->sf_mode)
3388
            gen_op_store_msr_32();
3408
            tcg_gen_helper_0_1(do_store_msr_32, cpu_T[0]);
3389 3409
        else
3390 3410
#endif
3391
            gen_op_store_msr();
3411
            tcg_gen_helper_0_1(do_store_msr, cpu_T[0]);
3392 3412
        /* Must stop the translation as machine state (may have) changed */
3393 3413
        /* Note that mtmsrd is not always defined as context-synchronizing */
3394 3414
        ctx->exception = POWERPC_EXCP_STOP;

Also available in: Unified diff