Revision 62a46c61
| b/hw/fdc.c | ||
|---|---|---|
| 95 | 95 |
} fdrive_t; |
| 96 | 96 |
|
| 97 | 97 |
#ifdef TARGET_SPARC |
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/* XXX: suppress those hacks */ |
|
| 98 | 99 |
#define DMA_read_memory(a,b,c,d) |
| 99 | 100 |
#define DMA_write_memory(a,b,c,d) |
| 100 |
#define DMA_register_channel(a,b,c) |
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void DMA_register_channel (int nchan, |
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DMA_transfer_handler transfer_handler, |
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void *opaque) |
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{
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} |
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| 101 | 106 |
#define DMA_hold_DREQ(a) |
| 102 | 107 |
#define DMA_release_DREQ(a) |
| 103 | 108 |
#define DMA_get_channel_mode(a) (0) |
| ... | ... | |
| 469 | 474 |
} |
| 470 | 475 |
} |
| 471 | 476 |
|
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static uint32_t fdctrl_read_mem (void *opaque, target_phys_addr_t reg) |
|
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{
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return fdctrl_read(opaque, reg); |
|
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} |
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static void fdctrl_write_mem (void *opaque, |
|
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target_phys_addr_t reg, uint32_t value) |
|
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{
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fdctrl_write(opaque, reg, value); |
|
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} |
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| 472 | 488 |
static CPUReadMemoryFunc *fdctrl_mem_read[3] = {
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fdctrl_read, |
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fdctrl_read, |
|
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fdctrl_read, |
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fdctrl_read_mem,
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fdctrl_read_mem,
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fdctrl_read_mem,
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}; |
| 477 | 493 |
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| 478 | 494 |
static CPUWriteMemoryFunc *fdctrl_mem_write[3] = {
|
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fdctrl_write, |
|
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fdctrl_write, |
|
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fdctrl_write, |
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fdctrl_write_mem,
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fdctrl_write_mem,
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fdctrl_write_mem,
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| 482 | 498 |
}; |
| 483 | 499 |
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| 484 | 500 |
static void fd_change_cb (void *opaque) |
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