Revision 62a6a1fb
| ID | 62a6a1fb895b881a938426fadb808f78a86ee222 |
Merge remote-tracking branch 'pmaydell/tags/pull-target-arm-20140107' into staging
target-arm queue:
* further A64 decoder patches, including enabling the aarch64-linux-user
target; this includes full floating point support. Neon is not yet
supported.
* cadence UART model fixes.
* some minor bug fixes and cleanups.
* all the softfloat fixes required by the new A64 instructions;
several of these will also be used by PPC.
- pmaydell/tags/pull-target-arm-20140107: (61 commits)
target-arm: A64: Add support for FCVT between half, single and double
target-arm: A64: Add 1-source 32-to-32 and 64-to-64 FP instructions
target-arm: A64: Add floating-point<->integer conversion instructions
target-arm: A64: Add floating-point<->fixed-point instructions
target-arm: A64: Add extra VFP fixed point conversion helpers
target-arm: Ignore most exceptions from scalbn when doing fixpoint conversion
target-arm: Rename A32 VFP conversion helpers
target-arm: Prepare VFP_CONV_FIX helpers for A64 uses
softfloat: Add support for ties-away rounding
softfloat: Refactor code handling various rounding modes
softfloat: Add float16 <=> float64 conversion functions
softfloat: Factor out RoundAndPackFloat16 and NormalizeFloat16Subnormal
softfloat: Provide complete set of accessors for fp state
softfloat: Fix float64_to_uint32_round_to_zero
softfloat: Fix float64_to_uint32
softfloat: Fix float64_to_uint64_round_to_zero
softfloat: Add float32_to_uint64()
softfloat: Fix factor 2 error for scalbn on denormal inputs
softfloat: Only raise Invalid when conversions to int are out of range
softfloat: Fix float64_to_uint64
...
Conflicts:
target-arm/cpu.h
aliguori: resolved trivial conflict
Signed-off-by: Anthony Liguori <aliguori@amazon.com>
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