Revision 64584218

b/tcg/x86_64/tcg-target.c
1181 1181
    case INDEX_op_ext32s_i64:
1182 1182
        tcg_out_modrm(s, 0x63 | P_REXW, args[0], args[1]);
1183 1183
        break;
1184
    case INDEX_op_ext8u_i32:
1185
        tcg_out_modrm(s, 0xb6 | P_EXT | P_REXB, args[0], args[1]);
1186
        break;
1187
    case INDEX_op_ext16u_i32:
1188
        tcg_out_modrm(s, 0xb7 | P_EXT, args[0], args[1]);
1189
        break;
1190
    case INDEX_op_ext8u_i64:
1191
        tcg_out_modrm(s, 0xb6 | P_EXT | P_REXW, args[0], args[1]);
1192
        break;
1193
    case INDEX_op_ext16u_i64:
1194
        tcg_out_modrm(s, 0xb7 | P_EXT | P_REXW, args[0], args[1]);
1195
        break;
1196
    case INDEX_op_ext32u_i64:
1197
        tcg_out_modrm(s, 0x8b, args[0], args[1]);
1198
        break;
1184 1199

  
1185 1200
    case INDEX_op_qemu_ld8u:
1186 1201
        tcg_out_qemu_ld(s, args, 0);
......
1355 1370
    { INDEX_op_ext8s_i64, { "r", "r"} },
1356 1371
    { INDEX_op_ext16s_i64, { "r", "r"} },
1357 1372
    { INDEX_op_ext32s_i64, { "r", "r"} },
1373
    { INDEX_op_ext8u_i32, { "r", "r"} },
1374
    { INDEX_op_ext16u_i32, { "r", "r"} },
1375
    { INDEX_op_ext8u_i64, { "r", "r"} },
1376
    { INDEX_op_ext16u_i64, { "r", "r"} },
1377
    { INDEX_op_ext32u_i64, { "r", "r"} },
1358 1378

  
1359 1379
    { INDEX_op_qemu_ld8u, { "r", "L" } },
1360 1380
    { INDEX_op_qemu_ld8s, { "r", "L" } },
b/tcg/x86_64/tcg-target.h
70 70
#define TCG_TARGET_HAS_ext8s_i64
71 71
#define TCG_TARGET_HAS_ext16s_i64
72 72
#define TCG_TARGET_HAS_ext32s_i64
73
#define TCG_TARGET_HAS_ext8u_i32
74
#define TCG_TARGET_HAS_ext16u_i32
75
#define TCG_TARGET_HAS_ext8u_i64
76
#define TCG_TARGET_HAS_ext16u_i64
77
#define TCG_TARGET_HAS_ext32u_i64
78

  
73 79
#define TCG_TARGET_HAS_rot_i32
74 80
#define TCG_TARGET_HAS_rot_i64
75 81

  

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