Revision 664e0f19
| b/Changelog | ||
|---|---|---|
| 11 | 11 |
- added generic 64 bit target support |
| 12 | 12 |
- initial x86_64 target support |
| 13 | 13 |
- initial APIC support |
| 14 |
- MMX/SSE/SSE2/PNI support |
|
| 14 | 15 |
|
| 15 | 16 |
version 0.6.1: |
| 16 | 17 |
|
| b/Makefile.target | ||
|---|---|---|
| 392 | 392 |
$(CC) $(HELPER_CFLAGS) $(DEFINES) -c -o $@ $< |
| 393 | 393 |
|
| 394 | 394 |
ifeq ($(TARGET_BASE_ARCH), i386) |
| 395 |
op.o: op.c opreg_template.h ops_template.h ops_template_mem.h ops_mem.h |
|
| 395 |
op.o: op.c opreg_template.h ops_template.h ops_template_mem.h ops_mem.h ops_sse.h
|
|
| 396 | 396 |
endif |
| 397 | 397 |
|
| 398 | 398 |
ifeq ($(TARGET_ARCH), arm) |
| b/linux-user/main.c | ||
|---|---|---|
| 1052 | 1052 |
cpu_x86_set_cpl(env, 3); |
| 1053 | 1053 |
|
| 1054 | 1054 |
env->cr[0] = CR0_PG_MASK | CR0_WP_MASK | CR0_PE_MASK; |
| 1055 |
env->hflags |= HF_PE_MASK; |
|
| 1056 |
|
|
| 1055 |
env->hflags |= HF_PE_MASK | HF_OSFXSR_MASK;
|
|
| 1056 |
|
|
| 1057 | 1057 |
/* flags setup : we activate the IRQs by default as in user mode */ |
| 1058 | 1058 |
env->eflags |= IF_MASK; |
| 1059 | 1059 |
|
| b/target-i386/cpu.h | ||
|---|---|---|
| 135 | 135 |
#define HF_IOPL_SHIFT 12 /* must be same as eflags */ |
| 136 | 136 |
#define HF_LMA_SHIFT 14 /* only used on x86_64: long mode active */ |
| 137 | 137 |
#define HF_CS64_SHIFT 15 /* only used on x86_64: 64 bit code segment */ |
| 138 |
#define HF_OSFXSR_SHIFT 16 /* CR4.OSFXSR */ |
|
| 138 | 139 |
#define HF_VM_SHIFT 17 /* must be same as eflags */ |
| 139 | 140 |
|
| 140 | 141 |
#define HF_CPL_MASK (3 << HF_CPL_SHIFT) |
| ... | ... | |
| 150 | 151 |
#define HF_TS_MASK (1 << HF_TS_SHIFT) |
| 151 | 152 |
#define HF_LMA_MASK (1 << HF_LMA_SHIFT) |
| 152 | 153 |
#define HF_CS64_MASK (1 << HF_CS64_SHIFT) |
| 154 |
#define HF_OSFXSR_MASK (1 << HF_OSFXSR_SHIFT) |
|
| 153 | 155 |
|
| 154 | 156 |
#define CR0_PE_MASK (1 << 0) |
| 155 | 157 |
#define CR0_MP_MASK (1 << 1) |
| ... | ... | |
| 340 | 342 |
} SegmentCache; |
| 341 | 343 |
|
| 342 | 344 |
typedef union {
|
| 343 |
uint8_t _b[16]; |
|
| 344 |
uint16_t _w[8]; |
|
| 345 |
uint32_t _l[4]; |
|
| 346 |
uint64_t _q[2]; |
|
| 345 |
uint8_t _b[16]; |
|
| 346 |
uint16_t _w[8]; |
|
| 347 |
uint32_t _l[4]; |
|
| 348 |
uint64_t _q[2]; |
|
| 349 |
float _s[4]; |
|
| 350 |
double _d[2]; |
|
| 347 | 351 |
} XMMReg; |
| 348 | 352 |
|
| 349 | 353 |
typedef union {
|
| ... | ... | |
| 357 | 361 |
#define XMM_B(n) _b[15 - (n)] |
| 358 | 362 |
#define XMM_W(n) _w[7 - (n)] |
| 359 | 363 |
#define XMM_L(n) _l[3 - (n)] |
| 364 |
#define XMM_S(n) _s[3 - (n)] |
|
| 360 | 365 |
#define XMM_Q(n) _q[1 - (n)] |
| 366 |
#define XMM_D(n) _d[1 - (n)] |
|
| 361 | 367 |
|
| 362 | 368 |
#define MMX_B(n) _b[7 - (n)] |
| 363 | 369 |
#define MMX_W(n) _w[3 - (n)] |
| ... | ... | |
| 366 | 372 |
#define XMM_B(n) _b[n] |
| 367 | 373 |
#define XMM_W(n) _w[n] |
| 368 | 374 |
#define XMM_L(n) _l[n] |
| 375 |
#define XMM_S(n) _s[n] |
|
| 369 | 376 |
#define XMM_Q(n) _q[n] |
| 377 |
#define XMM_D(n) _d[n] |
|
| 370 | 378 |
|
| 371 | 379 |
#define MMX_B(n) _b[n] |
| 372 | 380 |
#define MMX_W(n) _w[n] |
| 373 | 381 |
#define MMX_L(n) _l[n] |
| 374 | 382 |
#endif |
| 383 |
#define MMX_Q(n) q |
|
| 375 | 384 |
|
| 376 | 385 |
#ifdef TARGET_X86_64 |
| 377 | 386 |
#define CPU_NB_REGS 16 |
| ... | ... | |
| 404 | 413 |
unsigned int fpus; |
| 405 | 414 |
unsigned int fpuc; |
| 406 | 415 |
uint8_t fptags[8]; /* 0 = valid, 1 = empty */ |
| 407 |
CPU86_LDouble fpregs[8]; |
|
| 416 |
union {
|
|
| 417 |
#ifdef USE_X86LDOUBLE |
|
| 418 |
CPU86_LDouble d __attribute__((aligned(16))); |
|
| 419 |
#else |
|
| 420 |
CPU86_LDouble d; |
|
| 421 |
#endif |
|
| 422 |
MMXReg mmx; |
|
| 423 |
} fpregs[8]; |
|
| 408 | 424 |
|
| 409 | 425 |
/* emulator internal variables */ |
| 410 | 426 |
CPU86_LDouble ft0; |
| ... | ... | |
| 421 | 437 |
SegmentCache tr; |
| 422 | 438 |
SegmentCache gdt; /* only base and limit are used */ |
| 423 | 439 |
SegmentCache idt; /* only base and limit are used */ |
| 424 |
|
|
| 440 |
|
|
| 441 |
uint32_t mxcsr; |
|
| 425 | 442 |
XMMReg xmm_regs[CPU_NB_REGS]; |
| 426 | 443 |
XMMReg xmm_t0; |
| 444 |
MMXReg mmx_t0; |
|
| 427 | 445 |
|
| 428 | 446 |
/* sysenter registers */ |
| 429 | 447 |
uint32_t sysenter_cs; |
| b/target-i386/exec.h | ||
|---|---|---|
| 131 | 131 |
|
| 132 | 132 |
/* float macros */ |
| 133 | 133 |
#define FT0 (env->ft0) |
| 134 |
#define ST0 (env->fpregs[env->fpstt]) |
|
| 135 |
#define ST(n) (env->fpregs[(env->fpstt + (n)) & 7]) |
|
| 134 |
#define ST0 (env->fpregs[env->fpstt].d)
|
|
| 135 |
#define ST(n) (env->fpregs[(env->fpstt + (n)) & 7].d)
|
|
| 136 | 136 |
#define ST1 ST(1) |
| 137 | 137 |
|
| 138 | 138 |
#ifdef USE_FP_CONVERT |
| ... | ... | |
| 459 | 459 |
return temp.d; |
| 460 | 460 |
} |
| 461 | 461 |
|
| 462 |
static inline void helper_fstt(CPU86_LDouble f, uint8_t *ptr)
|
|
| 462 |
static inline void helper_fstt(CPU86_LDouble f, target_ulong ptr)
|
|
| 463 | 463 |
{
|
| 464 | 464 |
CPU86_LDoubleU temp; |
| 465 | 465 |
int e; |
| ... | ... | |
| 557 | 557 |
void helper_fxrstor(target_ulong ptr, int data64); |
| 558 | 558 |
void restore_native_fp_state(CPUState *env); |
| 559 | 559 |
void save_native_fp_state(CPUState *env); |
| 560 |
float approx_rsqrt(float a); |
|
| 561 |
float approx_rcp(float a); |
|
| 562 |
int fpu_isnan(double a); |
|
| 560 | 563 |
|
| 561 | 564 |
extern const uint8_t parity_table[256]; |
| 562 | 565 |
extern const uint8_t rclw_table[32]; |
| b/target-i386/helper.c | ||
|---|---|---|
| 2444 | 2444 |
{
|
| 2445 | 2445 |
int new_fpstt; |
| 2446 | 2446 |
new_fpstt = (env->fpstt - 1) & 7; |
| 2447 |
env->fpregs[new_fpstt] = helper_fldt(A0); |
|
| 2447 |
env->fpregs[new_fpstt].d = helper_fldt(A0);
|
|
| 2448 | 2448 |
env->fpstt = new_fpstt; |
| 2449 | 2449 |
env->fptags[new_fpstt] = 0; /* validate stack entry */ |
| 2450 | 2450 |
} |
| ... | ... | |
| 2804 | 2804 |
if (env->fptags[i]) {
|
| 2805 | 2805 |
fptag |= 3; |
| 2806 | 2806 |
} else {
|
| 2807 |
tmp.d = env->fpregs[i]; |
|
| 2807 |
tmp.d = env->fpregs[i].d;
|
|
| 2808 | 2808 |
exp = EXPD(tmp); |
| 2809 | 2809 |
mant = MANTD(tmp); |
| 2810 |
printf("mant=%llx exp=%x\n", mant, exp);
|
|
| 2810 | 2811 |
if (exp == 0 && mant == 0) {
|
| 2811 | 2812 |
/* zero */ |
| 2812 | 2813 |
fptag |= 1; |
| ... | ... | |
| 2930 | 2931 |
|
| 2931 | 2932 |
if (env->cr[4] & CR4_OSFXSR_MASK) {
|
| 2932 | 2933 |
/* XXX: finish it */ |
| 2933 |
stl(ptr + 0x18, 0); /* mxcsr */
|
|
| 2934 |
stl(ptr + 0x18, env->mxcsr); /* mxcsr */
|
|
| 2934 | 2935 |
stl(ptr + 0x1c, 0); /* mxcsr_mask */ |
| 2935 | 2936 |
nb_xmm_regs = 8 << data64; |
| 2936 | 2937 |
addr = ptr + 0xa0; |
| ... | ... | |
| 2967 | 2968 |
|
| 2968 | 2969 |
if (env->cr[4] & CR4_OSFXSR_MASK) {
|
| 2969 | 2970 |
/* XXX: finish it, endianness */ |
| 2970 |
//ldl(ptr + 0x18);
|
|
| 2971 |
env->mxcsr = ldl(ptr + 0x18);
|
|
| 2971 | 2972 |
//ldl(ptr + 0x1c); |
| 2972 | 2973 |
nb_xmm_regs = 8 << data64; |
| 2973 | 2974 |
addr = ptr + 0xa0; |
| ... | ... | |
| 3209 | 3210 |
|
| 3210 | 3211 |
#endif |
| 3211 | 3212 |
|
| 3213 |
/* XXX: do it */ |
|
| 3214 |
int fpu_isnan(double a) |
|
| 3215 |
{
|
|
| 3216 |
return 0; |
|
| 3217 |
} |
|
| 3218 |
|
|
| 3219 |
float approx_rsqrt(float a) |
|
| 3220 |
{
|
|
| 3221 |
return 1.0 / sqrt(a); |
|
| 3222 |
} |
|
| 3223 |
|
|
| 3224 |
float approx_rcp(float a) |
|
| 3225 |
{
|
|
| 3226 |
return 1.0 / a; |
|
| 3227 |
} |
|
| 3228 |
|
|
| 3229 |
|
|
| 3212 | 3230 |
#if !defined(CONFIG_USER_ONLY) |
| 3213 | 3231 |
|
| 3214 | 3232 |
#define MMUSUFFIX _mmu |
| b/target-i386/helper2.c | ||
|---|---|---|
| 158 | 158 |
for(i = 0;i < 8; i++) |
| 159 | 159 |
env->fptags[i] = 1; |
| 160 | 160 |
env->fpuc = 0x37f; |
| 161 |
|
|
| 162 |
env->mxcsr = 0x1f80; |
|
| 161 | 163 |
} |
| 162 | 164 |
|
| 163 | 165 |
void cpu_x86_close(CPUX86State *env) |
| ... | ... | |
| 376 | 378 |
} |
| 377 | 379 |
if (flags & X86_DUMP_FPU) {
|
| 378 | 380 |
cpu_fprintf(f, "ST0=%f ST1=%f ST2=%f ST3=%f\n", |
| 379 |
(double)env->fpregs[0], |
|
| 380 |
(double)env->fpregs[1], |
|
| 381 |
(double)env->fpregs[2], |
|
| 382 |
(double)env->fpregs[3]); |
|
| 381 |
(double)env->fpregs[0].d,
|
|
| 382 |
(double)env->fpregs[1].d,
|
|
| 383 |
(double)env->fpregs[2].d,
|
|
| 384 |
(double)env->fpregs[3].d);
|
|
| 383 | 385 |
cpu_fprintf(f, "ST4=%f ST5=%f ST6=%f ST7=%f\n", |
| 384 |
(double)env->fpregs[4], |
|
| 385 |
(double)env->fpregs[5], |
|
| 386 |
(double)env->fpregs[7], |
|
| 387 |
(double)env->fpregs[8]); |
|
| 386 |
(double)env->fpregs[4].d,
|
|
| 387 |
(double)env->fpregs[5].d,
|
|
| 388 |
(double)env->fpregs[7].d,
|
|
| 389 |
(double)env->fpregs[8].d);
|
|
| 388 | 390 |
} |
| 389 | 391 |
} |
| 390 | 392 |
|
| ... | ... | |
| 471 | 473 |
(env->cr[4] & (CR4_PGE_MASK | CR4_PAE_MASK | CR4_PSE_MASK))) {
|
| 472 | 474 |
tlb_flush(env, 1); |
| 473 | 475 |
} |
| 476 |
/* SSE handling */ |
|
| 477 |
if (!(env->cpuid_features & CPUID_SSE)) |
|
| 478 |
new_cr4 &= ~CR4_OSFXSR_MASK; |
|
| 479 |
if (new_cr4 & CR4_OSFXSR_MASK) |
|
| 480 |
env->hflags |= HF_OSFXSR_MASK; |
|
| 481 |
else |
|
| 482 |
env->hflags &= ~HF_OSFXSR_MASK; |
|
| 483 |
|
|
| 474 | 484 |
env->cr[4] = new_cr4; |
| 475 | 485 |
} |
| 476 | 486 |
|
| ... | ... | |
| 800 | 810 |
fp->fptag = fptag; |
| 801 | 811 |
j = env->fpstt; |
| 802 | 812 |
for(i = 0;i < 8; i++) {
|
| 803 |
memcpy(&fp->fpregs1[i * 10], &env->fpregs[j], 10); |
|
| 813 |
memcpy(&fp->fpregs1[i * 10], &env->fpregs[j].d, 10);
|
|
| 804 | 814 |
j = (j + 1) & 7; |
| 805 | 815 |
} |
| 806 | 816 |
asm volatile ("frstor %0" : "=m" (*fp));
|
| ... | ... | |
| 824 | 834 |
} |
| 825 | 835 |
j = env->fpstt; |
| 826 | 836 |
for(i = 0;i < 8; i++) {
|
| 827 |
memcpy(&env->fpregs[j], &fp->fpregs1[i * 10], 10); |
|
| 837 |
memcpy(&env->fpregs[j].d, &fp->fpregs1[i * 10], 10);
|
|
| 828 | 838 |
j = (j + 1) & 7; |
| 829 | 839 |
} |
| 830 | 840 |
/* we must restore the default rounding state */ |
| b/target-i386/op.c | ||
|---|---|---|
| 752 | 752 |
T0 = (int16_t)T0; |
| 753 | 753 |
} |
| 754 | 754 |
|
| 755 |
void OPPROTO op_movslq_T0_T0(void) |
|
| 756 |
{
|
|
| 757 |
T0 = (int32_t)T0; |
|
| 758 |
} |
|
| 759 |
|
|
| 760 | 755 |
void OPPROTO op_movzwl_T0_T0(void) |
| 761 | 756 |
{
|
| 762 | 757 |
T0 = (uint16_t)T0; |
| ... | ... | |
| 768 | 763 |
} |
| 769 | 764 |
|
| 770 | 765 |
#ifdef TARGET_X86_64 |
| 766 |
void OPPROTO op_movslq_T0_T0(void) |
|
| 767 |
{
|
|
| 768 |
T0 = (int32_t)T0; |
|
| 769 |
} |
|
| 770 |
|
|
| 771 | 771 |
void OPPROTO op_movslq_RAX_EAX(void) |
| 772 | 772 |
{
|
| 773 | 773 |
EAX = (int32_t)EAX; |
| ... | ... | |
| 1695 | 1695 |
new_fpstt = (env->fpstt - 1) & 7; |
| 1696 | 1696 |
#ifdef USE_FP_CONVERT |
| 1697 | 1697 |
FP_CONVERT.i32 = ldl(A0); |
| 1698 |
env->fpregs[new_fpstt] = FP_CONVERT.f; |
|
| 1698 |
env->fpregs[new_fpstt].d = FP_CONVERT.f;
|
|
| 1699 | 1699 |
#else |
| 1700 |
env->fpregs[new_fpstt] = ldfl(A0); |
|
| 1700 |
env->fpregs[new_fpstt].d = ldfl(A0);
|
|
| 1701 | 1701 |
#endif |
| 1702 | 1702 |
env->fpstt = new_fpstt; |
| 1703 | 1703 |
env->fptags[new_fpstt] = 0; /* validate stack entry */ |
| ... | ... | |
| 1709 | 1709 |
new_fpstt = (env->fpstt - 1) & 7; |
| 1710 | 1710 |
#ifdef USE_FP_CONVERT |
| 1711 | 1711 |
FP_CONVERT.i64 = ldq(A0); |
| 1712 |
env->fpregs[new_fpstt] = FP_CONVERT.d; |
|
| 1712 |
env->fpregs[new_fpstt].d = FP_CONVERT.d;
|
|
| 1713 | 1713 |
#else |
| 1714 |
env->fpregs[new_fpstt] = ldfq(A0); |
|
| 1714 |
env->fpregs[new_fpstt].d = ldfq(A0);
|
|
| 1715 | 1715 |
#endif |
| 1716 | 1716 |
env->fpstt = new_fpstt; |
| 1717 | 1717 |
env->fptags[new_fpstt] = 0; /* validate stack entry */ |
| ... | ... | |
| 1729 | 1729 |
{
|
| 1730 | 1730 |
int new_fpstt; |
| 1731 | 1731 |
new_fpstt = (env->fpstt - 1) & 7; |
| 1732 |
env->fpregs[new_fpstt] = (CPU86_LDouble)ldsw(A0); |
|
| 1732 |
env->fpregs[new_fpstt].d = (CPU86_LDouble)ldsw(A0);
|
|
| 1733 | 1733 |
env->fpstt = new_fpstt; |
| 1734 | 1734 |
env->fptags[new_fpstt] = 0; /* validate stack entry */ |
| 1735 | 1735 |
} |
| ... | ... | |
| 1738 | 1738 |
{
|
| 1739 | 1739 |
int new_fpstt; |
| 1740 | 1740 |
new_fpstt = (env->fpstt - 1) & 7; |
| 1741 |
env->fpregs[new_fpstt] = (CPU86_LDouble)((int32_t)ldl(A0)); |
|
| 1741 |
env->fpregs[new_fpstt].d = (CPU86_LDouble)((int32_t)ldl(A0));
|
|
| 1742 | 1742 |
env->fpstt = new_fpstt; |
| 1743 | 1743 |
env->fptags[new_fpstt] = 0; /* validate stack entry */ |
| 1744 | 1744 |
} |
| ... | ... | |
| 1747 | 1747 |
{
|
| 1748 | 1748 |
int new_fpstt; |
| 1749 | 1749 |
new_fpstt = (env->fpstt - 1) & 7; |
| 1750 |
env->fpregs[new_fpstt] = (CPU86_LDouble)((int64_t)ldq(A0)); |
|
| 1750 |
env->fpregs[new_fpstt].d = (CPU86_LDouble)((int64_t)ldq(A0));
|
|
| 1751 | 1751 |
env->fpstt = new_fpstt; |
| 1752 | 1752 |
env->fptags[new_fpstt] = 0; /* validate stack entry */ |
| 1753 | 1753 |
} |
| ... | ... | |
| 1775 | 1775 |
new_fpstt = (env->fpstt - 1) & 7; |
| 1776 | 1776 |
#ifdef USE_FP_CONVERT |
| 1777 | 1777 |
FP_CONVERT.i32 = ldsw(A0); |
| 1778 |
env->fpregs[new_fpstt] = (CPU86_LDouble)FP_CONVERT.i32; |
|
| 1778 |
env->fpregs[new_fpstt].d = (CPU86_LDouble)FP_CONVERT.i32;
|
|
| 1779 | 1779 |
#else |
| 1780 |
env->fpregs[new_fpstt] = (CPU86_LDouble)ldsw(A0); |
|
| 1780 |
env->fpregs[new_fpstt].d = (CPU86_LDouble)ldsw(A0);
|
|
| 1781 | 1781 |
#endif |
| 1782 | 1782 |
env->fpstt = new_fpstt; |
| 1783 | 1783 |
env->fptags[new_fpstt] = 0; /* validate stack entry */ |
| ... | ... | |
| 1789 | 1789 |
new_fpstt = (env->fpstt - 1) & 7; |
| 1790 | 1790 |
#ifdef USE_FP_CONVERT |
| 1791 | 1791 |
FP_CONVERT.i32 = (int32_t) ldl(A0); |
| 1792 |
env->fpregs[new_fpstt] = (CPU86_LDouble)FP_CONVERT.i32; |
|
| 1792 |
env->fpregs[new_fpstt].d = (CPU86_LDouble)FP_CONVERT.i32;
|
|
| 1793 | 1793 |
#else |
| 1794 |
env->fpregs[new_fpstt] = (CPU86_LDouble)((int32_t)ldl(A0)); |
|
| 1794 |
env->fpregs[new_fpstt].d = (CPU86_LDouble)((int32_t)ldl(A0));
|
|
| 1795 | 1795 |
#endif |
| 1796 | 1796 |
env->fpstt = new_fpstt; |
| 1797 | 1797 |
env->fptags[new_fpstt] = 0; /* validate stack entry */ |
| ... | ... | |
| 1803 | 1803 |
new_fpstt = (env->fpstt - 1) & 7; |
| 1804 | 1804 |
#ifdef USE_FP_CONVERT |
| 1805 | 1805 |
FP_CONVERT.i64 = (int64_t) ldq(A0); |
| 1806 |
env->fpregs[new_fpstt] = (CPU86_LDouble)FP_CONVERT.i64; |
|
| 1806 |
env->fpregs[new_fpstt].d = (CPU86_LDouble)FP_CONVERT.i64;
|
|
| 1807 | 1807 |
#else |
| 1808 |
env->fpregs[new_fpstt] = (CPU86_LDouble)((int64_t)ldq(A0)); |
|
| 1808 |
env->fpregs[new_fpstt].d = (CPU86_LDouble)((int64_t)ldq(A0));
|
|
| 1809 | 1809 |
#endif |
| 1810 | 1810 |
env->fpstt = new_fpstt; |
| 1811 | 1811 |
env->fptags[new_fpstt] = 0; /* validate stack entry */ |
| ... | ... | |
| 2322 | 2322 |
memcpy16(d, s); |
| 2323 | 2323 |
} |
| 2324 | 2324 |
|
| 2325 |
void OPPROTO op_movq(void) |
|
| 2326 |
{
|
|
| 2327 |
uint64_t *d, *s; |
|
| 2328 |
d = (uint64_t *)((char *)env + PARAM1); |
|
| 2329 |
s = (uint64_t *)((char *)env + PARAM2); |
|
| 2330 |
*d = *s; |
|
| 2331 |
} |
|
| 2332 |
|
|
| 2333 |
void OPPROTO op_movl(void) |
|
| 2334 |
{
|
|
| 2335 |
uint32_t *d, *s; |
|
| 2336 |
d = (uint32_t *)((char *)env + PARAM1); |
|
| 2337 |
s = (uint32_t *)((char *)env + PARAM2); |
|
| 2338 |
*d = *s; |
|
| 2339 |
} |
|
| 2340 |
|
|
| 2341 |
void OPPROTO op_movq_env_0(void) |
|
| 2342 |
{
|
|
| 2343 |
uint64_t *d; |
|
| 2344 |
d = (uint64_t *)((char *)env + PARAM1); |
|
| 2345 |
*d = 0; |
|
| 2346 |
} |
|
| 2347 |
|
|
| 2325 | 2348 |
void OPPROTO op_fxsave_A0(void) |
| 2326 | 2349 |
{
|
| 2327 | 2350 |
helper_fxsave(A0, PARAM1); |
| ... | ... | |
| 2331 | 2354 |
{
|
| 2332 | 2355 |
helper_fxrstor(A0, PARAM1); |
| 2333 | 2356 |
} |
| 2357 |
|
|
| 2358 |
/* XXX: optimize by storing fptt and fptags in the static cpu state */ |
|
| 2359 |
void OPPROTO op_enter_mmx(void) |
|
| 2360 |
{
|
|
| 2361 |
env->fpstt = 0; |
|
| 2362 |
*(uint32_t *)(env->fptags) = 0; |
|
| 2363 |
*(uint32_t *)(env->fptags + 4) = 0; |
|
| 2364 |
} |
|
| 2365 |
|
|
| 2366 |
void OPPROTO op_emms(void) |
|
| 2367 |
{
|
|
| 2368 |
/* set to empty state */ |
|
| 2369 |
*(uint32_t *)(env->fptags) = 0x01010101; |
|
| 2370 |
*(uint32_t *)(env->fptags + 4) = 0x01010101; |
|
| 2371 |
} |
|
| 2372 |
|
|
| 2373 |
#define SHIFT 0 |
|
| 2374 |
#include "ops_sse.h" |
|
| 2375 |
|
|
| 2376 |
#define SHIFT 1 |
|
| 2377 |
#include "ops_sse.h" |
|
| b/target-i386/ops_mem.h | ||
|---|---|---|
| 80 | 80 |
glue(stl, MEMSUFFIX)(A0, T1); |
| 81 | 81 |
} |
| 82 | 82 |
|
| 83 |
/* SSE support */ |
|
| 83 |
/* SSE/MMX support */ |
|
| 84 |
void OPPROTO glue(glue(op_ldq, MEMSUFFIX), _env_A0)(void) |
|
| 85 |
{
|
|
| 86 |
uint64_t *p; |
|
| 87 |
p = (uint64_t *)((char *)env + PARAM1); |
|
| 88 |
*p = glue(ldq, MEMSUFFIX)(A0); |
|
| 89 |
} |
|
| 90 |
|
|
| 91 |
void OPPROTO glue(glue(op_stq, MEMSUFFIX), _env_A0)(void) |
|
| 92 |
{
|
|
| 93 |
uint64_t *p; |
|
| 94 |
p = (uint64_t *)((char *)env + PARAM1); |
|
| 95 |
glue(stq, MEMSUFFIX)(A0, *p); |
|
| 96 |
} |
|
| 97 |
|
|
| 84 | 98 |
void OPPROTO glue(glue(op_ldo, MEMSUFFIX), _env_A0)(void) |
| 85 | 99 |
{
|
| 86 | 100 |
XMMReg *p; |
| b/target-i386/ops_sse.h | ||
|---|---|---|
| 1 |
/* |
|
| 2 |
* MMX/SSE/SSE2/PNI support |
|
| 3 |
* |
|
| 4 |
* Copyright (c) 2005 Fabrice Bellard |
|
| 5 |
* |
|
| 6 |
* This library is free software; you can redistribute it and/or |
|
| 7 |
* modify it under the terms of the GNU Lesser General Public |
|
| 8 |
* License as published by the Free Software Foundation; either |
|
| 9 |
* version 2 of the License, or (at your option) any later version. |
|
| 10 |
* |
|
| 11 |
* This library is distributed in the hope that it will be useful, |
|
| 12 |
* but WITHOUT ANY WARRANTY; without even the implied warranty of |
|
| 13 |
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU |
|
| 14 |
* Lesser General Public License for more details. |
|
| 15 |
* |
|
| 16 |
* You should have received a copy of the GNU Lesser General Public |
|
| 17 |
* License along with this library; if not, write to the Free Software |
|
| 18 |
* Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA |
|
| 19 |
*/ |
|
| 20 |
#if SHIFT == 0 |
|
| 21 |
#define Reg MMXReg |
|
| 22 |
#define XMM_ONLY(x...) |
|
| 23 |
#define B(n) MMX_B(n) |
|
| 24 |
#define W(n) MMX_W(n) |
|
| 25 |
#define L(n) MMX_L(n) |
|
| 26 |
#define Q(n) q |
|
| 27 |
#define SUFFIX _mmx |
|
| 28 |
#else |
|
| 29 |
#define Reg XMMReg |
|
| 30 |
#define XMM_ONLY(x...) x |
|
| 31 |
#define B(n) XMM_B(n) |
|
| 32 |
#define W(n) XMM_W(n) |
|
| 33 |
#define L(n) XMM_L(n) |
|
| 34 |
#define Q(n) XMM_Q(n) |
|
| 35 |
#define SUFFIX _xmm |
|
| 36 |
#endif |
|
| 37 |
|
|
| 38 |
void OPPROTO glue(op_psrlw, SUFFIX)(void) |
|
| 39 |
{
|
|
| 40 |
Reg *d, *s; |
|
| 41 |
int shift; |
|
| 42 |
|
|
| 43 |
d = (Reg *)((char *)env + PARAM1); |
|
| 44 |
s = (Reg *)((char *)env + PARAM2); |
|
| 45 |
|
|
| 46 |
if (s->Q(0) > 15) {
|
|
| 47 |
d->Q(0) = 0; |
|
| 48 |
#if SHIFT == 1 |
|
| 49 |
d->Q(1) = 0; |
|
| 50 |
#endif |
|
| 51 |
} else {
|
|
| 52 |
shift = s->B(0); |
|
| 53 |
d->W(0) >>= shift; |
|
| 54 |
d->W(1) >>= shift; |
|
| 55 |
d->W(2) >>= shift; |
|
| 56 |
d->W(3) >>= shift; |
|
| 57 |
#if SHIFT == 1 |
|
| 58 |
d->W(4) >>= shift; |
|
| 59 |
d->W(5) >>= shift; |
|
| 60 |
d->W(6) >>= shift; |
|
| 61 |
d->W(7) >>= shift; |
|
| 62 |
#endif |
|
| 63 |
} |
|
| 64 |
} |
|
| 65 |
|
|
| 66 |
void OPPROTO glue(op_psraw, SUFFIX)(void) |
|
| 67 |
{
|
|
| 68 |
Reg *d, *s; |
|
| 69 |
int shift; |
|
| 70 |
|
|
| 71 |
d = (Reg *)((char *)env + PARAM1); |
|
| 72 |
s = (Reg *)((char *)env + PARAM2); |
|
| 73 |
|
|
| 74 |
if (s->Q(0) > 15) {
|
|
| 75 |
shift = 15; |
|
| 76 |
} else {
|
|
| 77 |
shift = s->B(0); |
|
| 78 |
} |
|
| 79 |
d->W(0) = (int16_t)d->W(0) >> shift; |
|
| 80 |
d->W(1) = (int16_t)d->W(1) >> shift; |
|
| 81 |
d->W(2) = (int16_t)d->W(2) >> shift; |
|
| 82 |
d->W(3) = (int16_t)d->W(3) >> shift; |
|
| 83 |
#if SHIFT == 1 |
|
| 84 |
d->W(4) = (int16_t)d->W(4) >> shift; |
|
| 85 |
d->W(5) = (int16_t)d->W(5) >> shift; |
|
| 86 |
d->W(6) = (int16_t)d->W(6) >> shift; |
|
| 87 |
d->W(7) = (int16_t)d->W(7) >> shift; |
|
| 88 |
#endif |
|
| 89 |
} |
|
| 90 |
|
|
| 91 |
void OPPROTO glue(op_psllw, SUFFIX)(void) |
|
| 92 |
{
|
|
| 93 |
Reg *d, *s; |
|
| 94 |
int shift; |
|
| 95 |
|
|
| 96 |
d = (Reg *)((char *)env + PARAM1); |
|
| 97 |
s = (Reg *)((char *)env + PARAM2); |
|
| 98 |
|
|
| 99 |
if (s->Q(0) > 15) {
|
|
| 100 |
d->Q(0) = 0; |
|
| 101 |
#if SHIFT == 1 |
|
| 102 |
d->Q(1) = 0; |
|
| 103 |
#endif |
|
| 104 |
} else {
|
|
| 105 |
shift = s->B(0); |
|
| 106 |
d->W(0) <<= shift; |
|
| 107 |
d->W(1) <<= shift; |
|
| 108 |
d->W(2) <<= shift; |
|
| 109 |
d->W(3) <<= shift; |
|
| 110 |
#if SHIFT == 1 |
|
| 111 |
d->W(4) <<= shift; |
|
| 112 |
d->W(5) <<= shift; |
|
| 113 |
d->W(6) <<= shift; |
|
| 114 |
d->W(7) <<= shift; |
|
| 115 |
#endif |
|
| 116 |
} |
|
| 117 |
} |
|
| 118 |
|
|
| 119 |
void OPPROTO glue(op_psrld, SUFFIX)(void) |
|
| 120 |
{
|
|
| 121 |
Reg *d, *s; |
|
| 122 |
int shift; |
|
| 123 |
|
|
| 124 |
d = (Reg *)((char *)env + PARAM1); |
|
| 125 |
s = (Reg *)((char *)env + PARAM2); |
|
| 126 |
|
|
| 127 |
if (s->Q(0) > 31) {
|
|
| 128 |
d->Q(0) = 0; |
|
| 129 |
#if SHIFT == 1 |
|
| 130 |
d->Q(1) = 0; |
|
| 131 |
#endif |
|
| 132 |
} else {
|
|
| 133 |
shift = s->B(0); |
|
| 134 |
d->L(0) >>= shift; |
|
| 135 |
d->L(1) >>= shift; |
|
| 136 |
#if SHIFT == 1 |
|
| 137 |
d->L(2) >>= shift; |
|
| 138 |
d->L(3) >>= shift; |
|
| 139 |
#endif |
|
| 140 |
} |
|
| 141 |
} |
|
| 142 |
|
|
| 143 |
void OPPROTO glue(op_psrad, SUFFIX)(void) |
|
| 144 |
{
|
|
| 145 |
Reg *d, *s; |
|
| 146 |
int shift; |
|
| 147 |
|
|
| 148 |
d = (Reg *)((char *)env + PARAM1); |
|
| 149 |
s = (Reg *)((char *)env + PARAM2); |
|
| 150 |
|
|
| 151 |
if (s->Q(0) > 31) {
|
|
| 152 |
shift = 31; |
|
| 153 |
} else {
|
|
| 154 |
shift = s->B(0); |
|
| 155 |
} |
|
| 156 |
d->L(0) = (int32_t)d->L(0) >> shift; |
|
| 157 |
d->L(1) = (int32_t)d->L(1) >> shift; |
|
| 158 |
#if SHIFT == 1 |
|
| 159 |
d->L(2) = (int32_t)d->L(2) >> shift; |
|
| 160 |
d->L(3) = (int32_t)d->L(3) >> shift; |
|
| 161 |
#endif |
|
| 162 |
} |
|
| 163 |
|
|
| 164 |
void OPPROTO glue(op_pslld, SUFFIX)(void) |
|
| 165 |
{
|
|
| 166 |
Reg *d, *s; |
|
| 167 |
int shift; |
|
| 168 |
|
|
| 169 |
d = (Reg *)((char *)env + PARAM1); |
|
| 170 |
s = (Reg *)((char *)env + PARAM2); |
|
| 171 |
|
|
| 172 |
if (s->Q(0) > 31) {
|
|
| 173 |
d->Q(0) = 0; |
|
| 174 |
#if SHIFT == 1 |
|
| 175 |
d->Q(1) = 0; |
|
| 176 |
#endif |
|
| 177 |
} else {
|
|
| 178 |
shift = s->B(0); |
|
| 179 |
d->L(0) <<= shift; |
|
| 180 |
d->L(1) <<= shift; |
|
| 181 |
#if SHIFT == 1 |
|
| 182 |
d->L(2) <<= shift; |
|
| 183 |
d->L(3) <<= shift; |
|
| 184 |
#endif |
|
| 185 |
} |
|
| 186 |
} |
|
| 187 |
|
|
| 188 |
void OPPROTO glue(op_psrlq, SUFFIX)(void) |
|
| 189 |
{
|
|
| 190 |
Reg *d, *s; |
|
| 191 |
int shift; |
|
| 192 |
|
|
| 193 |
d = (Reg *)((char *)env + PARAM1); |
|
| 194 |
s = (Reg *)((char *)env + PARAM2); |
|
| 195 |
|
|
| 196 |
if (s->Q(0) > 63) {
|
|
| 197 |
d->Q(0) = 0; |
|
| 198 |
#if SHIFT == 1 |
|
| 199 |
d->Q(1) = 0; |
|
| 200 |
#endif |
|
| 201 |
} else {
|
|
| 202 |
shift = s->B(0); |
|
| 203 |
d->Q(0) >>= shift; |
|
| 204 |
#if SHIFT == 1 |
|
| 205 |
d->Q(1) >>= shift; |
|
| 206 |
#endif |
|
| 207 |
} |
|
| 208 |
} |
|
| 209 |
|
|
| 210 |
void OPPROTO glue(op_psllq, SUFFIX)(void) |
|
| 211 |
{
|
|
| 212 |
Reg *d, *s; |
|
| 213 |
int shift; |
|
| 214 |
|
|
| 215 |
d = (Reg *)((char *)env + PARAM1); |
|
| 216 |
s = (Reg *)((char *)env + PARAM2); |
|
| 217 |
|
|
| 218 |
if (s->Q(0) > 63) {
|
|
| 219 |
d->Q(0) = 0; |
|
| 220 |
#if SHIFT == 1 |
|
| 221 |
d->Q(1) = 0; |
|
| 222 |
#endif |
|
| 223 |
} else {
|
|
| 224 |
shift = s->B(0); |
|
| 225 |
d->Q(0) <<= shift; |
|
| 226 |
#if SHIFT == 1 |
|
| 227 |
d->Q(1) <<= shift; |
|
| 228 |
#endif |
|
| 229 |
} |
|
| 230 |
} |
|
| 231 |
|
|
| 232 |
#if SHIFT == 1 |
|
| 233 |
void OPPROTO glue(op_psrldq, SUFFIX)(void) |
|
| 234 |
{
|
|
| 235 |
Reg *d, *s; |
|
| 236 |
int shift, i; |
|
| 237 |
|
|
| 238 |
d = (Reg *)((char *)env + PARAM1); |
|
| 239 |
s = (Reg *)((char *)env + PARAM2); |
|
| 240 |
shift = s->L(0); |
|
| 241 |
if (shift > 16) |
|
| 242 |
shift = 16; |
|
| 243 |
for(i = 0; i < 16 - shift; i++) |
|
| 244 |
d->B(i) = d->B(i + shift); |
|
| 245 |
for(i = 16 - shift; i < 16; i++) |
|
| 246 |
d->B(i) = 0; |
|
| 247 |
FORCE_RET(); |
|
| 248 |
} |
|
| 249 |
|
|
| 250 |
void OPPROTO glue(op_pslldq, SUFFIX)(void) |
|
| 251 |
{
|
|
| 252 |
Reg *d, *s; |
|
| 253 |
int shift, i; |
|
| 254 |
|
|
| 255 |
d = (Reg *)((char *)env + PARAM1); |
|
| 256 |
s = (Reg *)((char *)env + PARAM2); |
|
| 257 |
shift = s->L(0); |
|
| 258 |
if (shift > 16) |
|
| 259 |
shift = 16; |
|
| 260 |
for(i = 15; i >= shift; i--) |
|
| 261 |
d->B(i) = d->B(i - shift); |
|
| 262 |
for(i = 0; i < shift; i++) |
|
| 263 |
d->B(i) = 0; |
|
| 264 |
FORCE_RET(); |
|
| 265 |
} |
|
| 266 |
#endif |
|
| 267 |
|
|
| 268 |
#define SSE_OP_B(name, F)\ |
|
| 269 |
void OPPROTO glue(name, SUFFIX) (void)\ |
|
| 270 |
{\
|
|
| 271 |
Reg *d, *s;\ |
|
| 272 |
d = (Reg *)((char *)env + PARAM1);\ |
|
| 273 |
s = (Reg *)((char *)env + PARAM2);\ |
|
| 274 |
d->B(0) = F(d->B(0), s->B(0));\ |
|
| 275 |
d->B(1) = F(d->B(1), s->B(1));\ |
|
| 276 |
d->B(2) = F(d->B(2), s->B(2));\ |
|
| 277 |
d->B(3) = F(d->B(3), s->B(3));\ |
|
| 278 |
d->B(4) = F(d->B(4), s->B(4));\ |
|
| 279 |
d->B(5) = F(d->B(5), s->B(5));\ |
|
| 280 |
d->B(6) = F(d->B(6), s->B(6));\ |
|
| 281 |
d->B(7) = F(d->B(7), s->B(7));\ |
|
| 282 |
XMM_ONLY(\ |
|
| 283 |
d->B(8) = F(d->B(8), s->B(8));\ |
|
| 284 |
d->B(9) = F(d->B(9), s->B(9));\ |
|
| 285 |
d->B(10) = F(d->B(10), s->B(10));\ |
|
| 286 |
d->B(11) = F(d->B(11), s->B(11));\ |
|
| 287 |
d->B(12) = F(d->B(12), s->B(12));\ |
|
| 288 |
d->B(13) = F(d->B(13), s->B(13));\ |
|
| 289 |
d->B(14) = F(d->B(14), s->B(14));\ |
|
| 290 |
d->B(15) = F(d->B(15), s->B(15));\ |
|
| 291 |
)\ |
|
| 292 |
} |
|
| 293 |
|
|
| 294 |
#define SSE_OP_W(name, F)\ |
|
| 295 |
void OPPROTO glue(name, SUFFIX) (void)\ |
|
| 296 |
{\
|
|
| 297 |
Reg *d, *s;\ |
|
| 298 |
d = (Reg *)((char *)env + PARAM1);\ |
|
| 299 |
s = (Reg *)((char *)env + PARAM2);\ |
|
| 300 |
d->W(0) = F(d->W(0), s->W(0));\ |
|
| 301 |
d->W(1) = F(d->W(1), s->W(1));\ |
|
| 302 |
d->W(2) = F(d->W(2), s->W(2));\ |
|
| 303 |
d->W(3) = F(d->W(3), s->W(3));\ |
|
| 304 |
XMM_ONLY(\ |
|
| 305 |
d->W(4) = F(d->W(4), s->W(4));\ |
|
| 306 |
d->W(5) = F(d->W(5), s->W(5));\ |
|
| 307 |
d->W(6) = F(d->W(6), s->W(6));\ |
|
| 308 |
d->W(7) = F(d->W(7), s->W(7));\ |
|
| 309 |
)\ |
|
| 310 |
} |
|
| 311 |
|
|
| 312 |
#define SSE_OP_L(name, F)\ |
|
| 313 |
void OPPROTO glue(name, SUFFIX) (void)\ |
|
| 314 |
{\
|
|
| 315 |
Reg *d, *s;\ |
|
| 316 |
d = (Reg *)((char *)env + PARAM1);\ |
|
| 317 |
s = (Reg *)((char *)env + PARAM2);\ |
|
| 318 |
d->L(0) = F(d->L(0), s->L(0));\ |
|
| 319 |
d->L(1) = F(d->L(1), s->L(1));\ |
|
| 320 |
XMM_ONLY(\ |
|
| 321 |
d->L(2) = F(d->L(2), s->L(2));\ |
|
| 322 |
d->L(3) = F(d->L(3), s->L(3));\ |
|
| 323 |
)\ |
|
| 324 |
} |
|
| 325 |
|
|
| 326 |
#define SSE_OP_Q(name, F)\ |
|
| 327 |
void OPPROTO glue(name, SUFFIX) (void)\ |
|
| 328 |
{\
|
|
| 329 |
Reg *d, *s;\ |
|
| 330 |
d = (Reg *)((char *)env + PARAM1);\ |
|
| 331 |
s = (Reg *)((char *)env + PARAM2);\ |
|
| 332 |
d->Q(0) = F(d->Q(0), s->Q(0));\ |
|
| 333 |
XMM_ONLY(\ |
|
| 334 |
d->Q(1) = F(d->Q(1), s->Q(1));\ |
|
| 335 |
)\ |
|
| 336 |
} |
|
| 337 |
|
|
| 338 |
#if SHIFT == 0 |
|
| 339 |
static inline int satub(int x) |
|
| 340 |
{
|
|
| 341 |
if (x < 0) |
|
| 342 |
return 0; |
|
| 343 |
else if (x > 255) |
|
| 344 |
return 255; |
|
| 345 |
else |
|
| 346 |
return x; |
|
| 347 |
} |
|
| 348 |
|
|
| 349 |
static inline int satuw(int x) |
|
| 350 |
{
|
|
| 351 |
if (x < 0) |
|
| 352 |
return 0; |
|
| 353 |
else if (x > 65535) |
|
| 354 |
return 65535; |
|
| 355 |
else |
|
| 356 |
return x; |
|
| 357 |
} |
|
| 358 |
|
|
| 359 |
static inline int satsb(int x) |
|
| 360 |
{
|
|
| 361 |
if (x < -128) |
|
| 362 |
return -128; |
|
| 363 |
else if (x > 127) |
|
| 364 |
return 127; |
|
| 365 |
else |
|
| 366 |
return x; |
|
| 367 |
} |
|
| 368 |
|
|
| 369 |
static inline int satsw(int x) |
|
| 370 |
{
|
|
| 371 |
if (x < -32768) |
|
| 372 |
return -32768; |
|
| 373 |
else if (x > 32767) |
|
| 374 |
return 32767; |
|
| 375 |
else |
|
| 376 |
return x; |
|
| 377 |
} |
|
| 378 |
|
|
| 379 |
#define FADD(a, b) ((a) + (b)) |
|
| 380 |
#define FADDUB(a, b) satub((a) + (b)) |
|
| 381 |
#define FADDUW(a, b) satuw((a) + (b)) |
|
| 382 |
#define FADDSB(a, b) satsb((int8_t)(a) + (int8_t)(b)) |
|
| 383 |
#define FADDSW(a, b) satsw((int16_t)(a) + (int16_t)(b)) |
|
| 384 |
|
|
| 385 |
#define FSUB(a, b) ((a) - (b)) |
|
| 386 |
#define FSUBUB(a, b) satub((a) - (b)) |
|
| 387 |
#define FSUBUW(a, b) satuw((a) - (b)) |
|
| 388 |
#define FSUBSB(a, b) satsb((int8_t)(a) - (int8_t)(b)) |
|
| 389 |
#define FSUBSW(a, b) satsw((int16_t)(a) - (int16_t)(b)) |
|
| 390 |
#define FMINUB(a, b) ((a) < (b)) ? (a) : (b) |
|
| 391 |
#define FMINSW(a, b) ((int16_t)(a) < (int16_t)(b)) ? (a) : (b) |
|
| 392 |
#define FMAXUB(a, b) ((a) > (b)) ? (a) : (b) |
|
| 393 |
#define FMAXSW(a, b) ((int16_t)(a) > (int16_t)(b)) ? (a) : (b) |
|
| 394 |
|
|
| 395 |
#define FAND(a, b) (a) & (b) |
|
| 396 |
#define FANDN(a, b) ((~(a)) & (b)) |
|
| 397 |
#define FOR(a, b) (a) | (b) |
|
| 398 |
#define FXOR(a, b) (a) ^ (b) |
|
| 399 |
|
|
| 400 |
#define FCMPGTB(a, b) (int8_t)(a) > (int8_t)(b) ? -1 : 0 |
|
| 401 |
#define FCMPGTW(a, b) (int16_t)(a) > (int16_t)(b) ? -1 : 0 |
|
| 402 |
#define FCMPGTL(a, b) (int32_t)(a) > (int32_t)(b) ? -1 : 0 |
|
| 403 |
#define FCMPEQ(a, b) (a) == (b) ? -1 : 0 |
|
| 404 |
|
|
| 405 |
#define FMULLW(a, b) (a) * (b) |
|
| 406 |
#define FMULHUW(a, b) (a) * (b) >> 16 |
|
| 407 |
#define FMULHW(a, b) (int16_t)(a) * (int16_t)(b) >> 16 |
|
| 408 |
|
|
| 409 |
#define FAVG(a, b) ((a) + (b) + 1) >> 1 |
|
| 410 |
#endif |
|
| 411 |
|
|
| 412 |
SSE_OP_B(op_paddb, FADD) |
|
| 413 |
SSE_OP_W(op_paddw, FADD) |
|
| 414 |
SSE_OP_L(op_paddl, FADD) |
|
| 415 |
SSE_OP_Q(op_paddq, FADD) |
|
| 416 |
|
|
| 417 |
SSE_OP_B(op_psubb, FSUB) |
|
| 418 |
SSE_OP_W(op_psubw, FSUB) |
|
| 419 |
SSE_OP_L(op_psubl, FSUB) |
|
| 420 |
SSE_OP_Q(op_psubq, FSUB) |
|
| 421 |
|
|
| 422 |
SSE_OP_B(op_paddusb, FADDUB) |
|
| 423 |
SSE_OP_B(op_paddsb, FADDSB) |
|
| 424 |
SSE_OP_B(op_psubusb, FSUBUB) |
|
| 425 |
SSE_OP_B(op_psubsb, FSUBSB) |
|
| 426 |
|
|
| 427 |
SSE_OP_W(op_paddusw, FADDUW) |
|
| 428 |
SSE_OP_W(op_paddsw, FADDSW) |
|
| 429 |
SSE_OP_W(op_psubusw, FSUBUW) |
|
| 430 |
SSE_OP_W(op_psubsw, FSUBSW) |
|
| 431 |
|
|
| 432 |
SSE_OP_B(op_pminub, FMINUB) |
|
| 433 |
SSE_OP_B(op_pmaxub, FMAXUB) |
|
| 434 |
|
|
| 435 |
SSE_OP_W(op_pminsw, FMINSW) |
|
| 436 |
SSE_OP_W(op_pmaxsw, FMAXSW) |
|
| 437 |
|
|
| 438 |
SSE_OP_Q(op_pand, FAND) |
|
| 439 |
SSE_OP_Q(op_pandn, FANDN) |
|
| 440 |
SSE_OP_Q(op_por, FOR) |
|
| 441 |
SSE_OP_Q(op_pxor, FXOR) |
|
| 442 |
|
|
| 443 |
SSE_OP_B(op_pcmpgtb, FCMPGTB) |
|
| 444 |
SSE_OP_W(op_pcmpgtw, FCMPGTW) |
|
| 445 |
SSE_OP_L(op_pcmpgtl, FCMPGTL) |
|
| 446 |
|
|
| 447 |
SSE_OP_B(op_pcmpeqb, FCMPEQ) |
|
| 448 |
SSE_OP_W(op_pcmpeqw, FCMPEQ) |
|
| 449 |
SSE_OP_L(op_pcmpeql, FCMPEQ) |
|
| 450 |
|
|
| 451 |
SSE_OP_W(op_pmullw, FMULLW) |
|
| 452 |
SSE_OP_W(op_pmulhuw, FMULHUW) |
|
| 453 |
SSE_OP_W(op_pmulhw, FMULHW) |
|
| 454 |
|
|
| 455 |
SSE_OP_B(op_pavgb, FAVG) |
|
| 456 |
SSE_OP_W(op_pavgw, FAVG) |
|
| 457 |
|
|
| 458 |
void OPPROTO glue(op_pmuludq, SUFFIX) (void) |
|
| 459 |
{
|
|
| 460 |
Reg *d, *s; |
|
| 461 |
d = (Reg *)((char *)env + PARAM1); |
|
| 462 |
s = (Reg *)((char *)env + PARAM2); |
|
| 463 |
|
|
| 464 |
d->Q(0) = (uint64_t)s->L(0) * (uint64_t)d->L(0); |
|
| 465 |
#if SHIFT == 1 |
|
| 466 |
d->Q(1) = (uint64_t)s->L(2) * (uint64_t)d->L(2); |
|
| 467 |
#endif |
|
| 468 |
} |
|
| 469 |
|
|
| 470 |
void OPPROTO glue(op_pmaddwd, SUFFIX) (void) |
|
| 471 |
{
|
|
| 472 |
int i; |
|
| 473 |
Reg *d, *s; |
|
| 474 |
d = (Reg *)((char *)env + PARAM1); |
|
| 475 |
s = (Reg *)((char *)env + PARAM2); |
|
| 476 |
|
|
| 477 |
for(i = 0; i < (2 << SHIFT); i++) {
|
|
| 478 |
d->L(i) = (int16_t)s->W(2*i) * (int16_t)d->W(2*i) + |
|
| 479 |
(int16_t)s->W(2*i+1) * (int16_t)d->W(2*i+1); |
|
| 480 |
} |
|
| 481 |
} |
|
| 482 |
|
|
| 483 |
#if SHIFT == 0 |
|
| 484 |
static inline int abs1(int a) |
|
| 485 |
{
|
|
| 486 |
if (a < 0) |
|
| 487 |
return -a; |
|
| 488 |
else |
|
| 489 |
return a; |
|
| 490 |
} |
|
| 491 |
#endif |
|
| 492 |
void OPPROTO glue(op_psadbw, SUFFIX) (void) |
|
| 493 |
{
|
|
| 494 |
unsigned int val; |
|
| 495 |
Reg *d, *s; |
|
| 496 |
d = (Reg *)((char *)env + PARAM1); |
|
| 497 |
s = (Reg *)((char *)env + PARAM2); |
|
| 498 |
|
|
| 499 |
val = 0; |
|
| 500 |
val += abs1(d->B(0) - s->B(0)); |
|
| 501 |
val += abs1(d->B(1) - s->B(1)); |
|
| 502 |
val += abs1(d->B(2) - s->B(2)); |
|
| 503 |
val += abs1(d->B(3) - s->B(3)); |
|
| 504 |
val += abs1(d->B(4) - s->B(4)); |
|
| 505 |
val += abs1(d->B(5) - s->B(5)); |
|
| 506 |
val += abs1(d->B(6) - s->B(6)); |
|
| 507 |
val += abs1(d->B(7) - s->B(7)); |
|
| 508 |
d->Q(0) = val; |
|
| 509 |
#if SHIFT == 1 |
|
| 510 |
val = 0; |
|
| 511 |
val += abs1(d->B(8) - s->B(8)); |
|
| 512 |
val += abs1(d->B(9) - s->B(9)); |
|
| 513 |
val += abs1(d->B(10) - s->B(10)); |
|
| 514 |
val += abs1(d->B(11) - s->B(11)); |
|
| 515 |
val += abs1(d->B(12) - s->B(12)); |
|
| 516 |
val += abs1(d->B(13) - s->B(13)); |
|
| 517 |
val += abs1(d->B(14) - s->B(14)); |
|
| 518 |
val += abs1(d->B(15) - s->B(15)); |
|
| 519 |
d->Q(1) = val; |
|
| 520 |
#endif |
|
| 521 |
} |
|
| 522 |
|
|
| 523 |
void OPPROTO glue(op_maskmov, SUFFIX) (void) |
|
| 524 |
{
|
|
| 525 |
int i; |
|
| 526 |
Reg *d, *s; |
|
| 527 |
d = (Reg *)((char *)env + PARAM1); |
|
| 528 |
s = (Reg *)((char *)env + PARAM2); |
|
| 529 |
for(i = 0; i < (8 << SHIFT); i++) {
|
|
| 530 |
if (s->B(i) & 0x80) |
|
| 531 |
stb(A0, d->B(i)); |
|
| 532 |
} |
|
| 533 |
} |
|
| 534 |
|
|
| 535 |
void OPPROTO glue(op_movl_mm_T0, SUFFIX) (void) |
|
| 536 |
{
|
|
| 537 |
Reg *d; |
|
| 538 |
d = (Reg *)((char *)env + PARAM1); |
|
| 539 |
d->L(0) = T0; |
|
| 540 |
d->L(1) = 0; |
|
| 541 |
#if SHIFT == 1 |
|
| 542 |
d->Q(1) = 0; |
|
| 543 |
#endif |
|
| 544 |
} |
|
| 545 |
|
|
| 546 |
void OPPROTO glue(op_movl_T0_mm, SUFFIX) (void) |
|
| 547 |
{
|
|
| 548 |
Reg *s; |
|
| 549 |
s = (Reg *)((char *)env + PARAM1); |
|
| 550 |
T0 = s->L(0); |
|
| 551 |
} |
|
| 552 |
|
|
| 553 |
#if SHIFT == 0 |
|
| 554 |
void OPPROTO glue(op_pshufw, SUFFIX) (void) |
|
| 555 |
{
|
|
| 556 |
Reg r, *d, *s; |
|
| 557 |
int order; |
|
| 558 |
d = (Reg *)((char *)env + PARAM1); |
|
| 559 |
s = (Reg *)((char *)env + PARAM2); |
|
| 560 |
order = PARAM3; |
|
| 561 |
r.W(0) = s->W(order & 3); |
|
| 562 |
r.W(1) = s->W((order >> 2) & 3); |
|
| 563 |
r.W(2) = s->W((order >> 4) & 3); |
|
| 564 |
r.W(3) = s->W((order >> 6) & 3); |
|
| 565 |
*d = r; |
|
| 566 |
} |
|
| 567 |
#else |
|
| 568 |
void OPPROTO op_shufpd(void) |
|
| 569 |
{
|
|
| 570 |
Reg r, *d, *s; |
|
| 571 |
int order; |
|
| 572 |
d = (Reg *)((char *)env + PARAM1); |
|
| 573 |
s = (Reg *)((char *)env + PARAM2); |
|
| 574 |
order = PARAM3; |
|
| 575 |
r.Q(0) = s->Q(order & 1); |
|
| 576 |
r.Q(1) = s->Q((order >> 1) & 1); |
|
| 577 |
*d = r; |
|
| 578 |
} |
|
| 579 |
|
|
| 580 |
void OPPROTO glue(op_pshufd, SUFFIX) (void) |
|
| 581 |
{
|
|
| 582 |
Reg r, *d, *s; |
|
| 583 |
int order; |
|
| 584 |
d = (Reg *)((char *)env + PARAM1); |
|
| 585 |
s = (Reg *)((char *)env + PARAM2); |
|
| 586 |
order = PARAM3; |
|
| 587 |
r.L(0) = s->L(order & 3); |
|
| 588 |
r.L(1) = s->L((order >> 2) & 3); |
|
| 589 |
r.L(2) = s->L((order >> 4) & 3); |
|
| 590 |
r.L(3) = s->L((order >> 6) & 3); |
|
| 591 |
*d = r; |
|
| 592 |
} |
|
| 593 |
|
|
| 594 |
void OPPROTO glue(op_pshuflw, SUFFIX) (void) |
|
| 595 |
{
|
|
| 596 |
Reg r, *d, *s; |
|
| 597 |
int order; |
|
| 598 |
d = (Reg *)((char *)env + PARAM1); |
|
| 599 |
s = (Reg *)((char *)env + PARAM2); |
|
| 600 |
order = PARAM3; |
|
| 601 |
r.W(0) = s->W(order & 3); |
|
| 602 |
r.W(1) = s->W((order >> 2) & 3); |
|
| 603 |
r.W(2) = s->W((order >> 4) & 3); |
|
| 604 |
r.W(3) = s->W((order >> 6) & 3); |
|
| 605 |
r.Q(1) = s->Q(1); |
|
| 606 |
*d = r; |
|
| 607 |
} |
|
| 608 |
|
|
| 609 |
void OPPROTO glue(op_pshufhw, SUFFIX) (void) |
|
| 610 |
{
|
|
| 611 |
Reg r, *d, *s; |
|
| 612 |
int order; |
|
| 613 |
d = (Reg *)((char *)env + PARAM1); |
|
| 614 |
s = (Reg *)((char *)env + PARAM2); |
|
| 615 |
order = PARAM3; |
|
| 616 |
r.Q(0) = s->Q(0); |
|
| 617 |
r.W(4) = s->W(4 + (order & 3)); |
|
| 618 |
r.W(5) = s->W(4 + ((order >> 2) & 3)); |
|
| 619 |
r.W(6) = s->W(4 + ((order >> 4) & 3)); |
|
| 620 |
r.W(7) = s->W(4 + ((order >> 6) & 3)); |
|
| 621 |
*d = r; |
|
| 622 |
} |
|
| 623 |
#endif |
|
| 624 |
|
|
| 625 |
#if SHIFT == 1 |
|
| 626 |
/* FPU ops */ |
|
| 627 |
/* XXX: not accurate */ |
|
| 628 |
|
|
| 629 |
#define SSE_OP_S(name, F)\ |
|
| 630 |
void OPPROTO op_ ## name ## ps (void)\ |
|
| 631 |
{\
|
|
| 632 |
Reg *d, *s;\ |
|
| 633 |
d = (Reg *)((char *)env + PARAM1);\ |
|
| 634 |
s = (Reg *)((char *)env + PARAM2);\ |
|
| 635 |
d->XMM_S(0) = F(d->XMM_S(0), s->XMM_S(0));\ |
|
| 636 |
d->XMM_S(1) = F(d->XMM_S(1), s->XMM_S(1));\ |
|
| 637 |
d->XMM_S(2) = F(d->XMM_S(2), s->XMM_S(2));\ |
|
| 638 |
d->XMM_S(3) = F(d->XMM_S(3), s->XMM_S(3));\ |
|
| 639 |
}\ |
|
| 640 |
\ |
|
| 641 |
void OPPROTO op_ ## name ## ss (void)\ |
|
| 642 |
{\
|
|
| 643 |
Reg *d, *s;\ |
|
| 644 |
d = (Reg *)((char *)env + PARAM1);\ |
|
| 645 |
s = (Reg *)((char *)env + PARAM2);\ |
|
| 646 |
d->XMM_S(0) = F(d->XMM_S(0), s->XMM_S(0));\ |
|
| 647 |
}\ |
|
| 648 |
void OPPROTO op_ ## name ## pd (void)\ |
|
| 649 |
{\
|
|
| 650 |
Reg *d, *s;\ |
|
| 651 |
d = (Reg *)((char *)env + PARAM1);\ |
|
| 652 |
s = (Reg *)((char *)env + PARAM2);\ |
|
| 653 |
d->XMM_D(0) = F(d->XMM_D(0), s->XMM_D(0));\ |
|
| 654 |
d->XMM_D(1) = F(d->XMM_D(1), s->XMM_D(1));\ |
|
| 655 |
}\ |
|
| 656 |
\ |
|
| 657 |
void OPPROTO op_ ## name ## sd (void)\ |
|
| 658 |
{\
|
|
| 659 |
Reg *d, *s;\ |
|
| 660 |
d = (Reg *)((char *)env + PARAM1);\ |
|
| 661 |
s = (Reg *)((char *)env + PARAM2);\ |
|
| 662 |
d->XMM_D(0) = F(d->XMM_D(0), s->XMM_D(0));\ |
|
| 663 |
} |
|
| 664 |
|
|
| 665 |
#define FPU_ADD(a, b) (a) + (b) |
|
| 666 |
#define FPU_SUB(a, b) (a) - (b) |
|
| 667 |
#define FPU_MUL(a, b) (a) * (b) |
|
| 668 |
#define FPU_DIV(a, b) (a) / (b) |
|
| 669 |
#define FPU_MIN(a, b) (a) < (b) ? (a) : (b) |
|
| 670 |
#define FPU_MAX(a, b) (a) > (b) ? (a) : (b) |
|
| 671 |
#define FPU_SQRT(a, b) sqrt(b) |
|
| 672 |
|
|
| 673 |
SSE_OP_S(add, FPU_ADD) |
|
| 674 |
SSE_OP_S(sub, FPU_SUB) |
|
| 675 |
SSE_OP_S(mul, FPU_MUL) |
|
| 676 |
SSE_OP_S(div, FPU_DIV) |
|
| 677 |
SSE_OP_S(min, FPU_MIN) |
|
| 678 |
SSE_OP_S(max, FPU_MAX) |
|
| 679 |
SSE_OP_S(sqrt, FPU_SQRT) |
|
| 680 |
|
|
| 681 |
|
|
| 682 |
/* float to float conversions */ |
|
| 683 |
void OPPROTO op_cvtps2pd(void) |
|
| 684 |
{
|
|
| 685 |
float s0, s1; |
|
| 686 |
Reg *d, *s; |
|
| 687 |
d = (Reg *)((char *)env + PARAM1); |
|
| 688 |
s = (Reg *)((char *)env + PARAM2); |
|
| 689 |
s0 = s->XMM_S(0); |
|
| 690 |
s1 = s->XMM_S(1); |
|
| 691 |
d->XMM_D(0) = s0; |
|
| 692 |
d->XMM_D(1) = s1; |
|
| 693 |
} |
|
| 694 |
|
|
| 695 |
void OPPROTO op_cvtpd2ps(void) |
|
| 696 |
{
|
|
| 697 |
Reg *d, *s; |
|
| 698 |
d = (Reg *)((char *)env + PARAM1); |
|
| 699 |
s = (Reg *)((char *)env + PARAM2); |
|
| 700 |
d->XMM_S(0) = s->XMM_D(0); |
|
| 701 |
d->XMM_S(1) = s->XMM_D(1); |
|
| 702 |
d->Q(1) = 0; |
|
| 703 |
} |
|
| 704 |
|
|
| 705 |
void OPPROTO op_cvtss2sd(void) |
|
| 706 |
{
|
|
| 707 |
Reg *d, *s; |
|
| 708 |
d = (Reg *)((char *)env + PARAM1); |
|
| 709 |
s = (Reg *)((char *)env + PARAM2); |
|
| 710 |
d->XMM_D(0) = s->XMM_S(0); |
|
| 711 |
} |
|
| 712 |
|
|
| 713 |
void OPPROTO op_cvtsd2ss(void) |
|
| 714 |
{
|
|
| 715 |
Reg *d, *s; |
|
| 716 |
d = (Reg *)((char *)env + PARAM1); |
|
| 717 |
s = (Reg *)((char *)env + PARAM2); |
|
| 718 |
d->XMM_S(0) = s->XMM_D(0); |
|
| 719 |
} |
|
| 720 |
|
|
| 721 |
/* integer to float */ |
|
| 722 |
void OPPROTO op_cvtdq2ps(void) |
|
| 723 |
{
|
|
| 724 |
XMMReg *d = (XMMReg *)((char *)env + PARAM1); |
|
| 725 |
XMMReg *s = (XMMReg *)((char *)env + PARAM2); |
|
| 726 |
d->XMM_S(0) = (int32_t)s->XMM_L(0); |
|
| 727 |
d->XMM_S(1) = (int32_t)s->XMM_L(1); |
|
| 728 |
d->XMM_S(2) = (int32_t)s->XMM_L(2); |
|
| 729 |
d->XMM_S(3) = (int32_t)s->XMM_L(3); |
|
| 730 |
} |
|
| 731 |
|
|
| 732 |
void OPPROTO op_cvtdq2pd(void) |
|
| 733 |
{
|
|
| 734 |
XMMReg *d = (XMMReg *)((char *)env + PARAM1); |
|
| 735 |
XMMReg *s = (XMMReg *)((char *)env + PARAM2); |
|
| 736 |
int32_t l0, l1; |
|
| 737 |
l0 = (int32_t)s->XMM_L(0); |
|
| 738 |
l1 = (int32_t)s->XMM_L(1); |
|
| 739 |
d->XMM_D(0) = l0; |
|
| 740 |
d->XMM_D(1) = l1; |
|
| 741 |
} |
|
| 742 |
|
|
| 743 |
void OPPROTO op_cvtpi2ps(void) |
|
| 744 |
{
|
|
| 745 |
XMMReg *d = (Reg *)((char *)env + PARAM1); |
|
| 746 |
MMXReg *s = (MMXReg *)((char *)env + PARAM2); |
|
| 747 |
d->XMM_S(0) = (int32_t)s->MMX_L(0); |
|
| 748 |
d->XMM_S(1) = (int32_t)s->MMX_L(1); |
|
| 749 |
} |
|
| 750 |
|
|
| 751 |
void OPPROTO op_cvtpi2pd(void) |
|
| 752 |
{
|
|
| 753 |
XMMReg *d = (Reg *)((char *)env + PARAM1); |
|
| 754 |
MMXReg *s = (MMXReg *)((char *)env + PARAM2); |
|
| 755 |
d->XMM_D(0) = (int32_t)s->MMX_L(0); |
|
| 756 |
d->XMM_D(1) = (int32_t)s->MMX_L(1); |
|
| 757 |
} |
|
| 758 |
|
|
| 759 |
void OPPROTO op_cvtsi2ss(void) |
|
| 760 |
{
|
|
| 761 |
XMMReg *d = (Reg *)((char *)env + PARAM1); |
|
| 762 |
d->XMM_S(0) = (int32_t)T0; |
|
| 763 |
} |
|
| 764 |
|
|
| 765 |
void OPPROTO op_cvtsi2sd(void) |
|
| 766 |
{
|
|
| 767 |
XMMReg *d = (Reg *)((char *)env + PARAM1); |
|
| 768 |
d->XMM_D(0) = (int32_t)T0; |
|
| 769 |
} |
|
| 770 |
|
|
| 771 |
#ifdef TARGET_X86_64 |
|
| 772 |
void OPPROTO op_cvtsq2ss(void) |
|
| 773 |
{
|
|
| 774 |
XMMReg *d = (Reg *)((char *)env + PARAM1); |
|
| 775 |
d->XMM_S(0) = (int64_t)T0; |
|
| 776 |
} |
|
| 777 |
|
|
| 778 |
void OPPROTO op_cvtsq2sd(void) |
|
| 779 |
{
|
|
| 780 |
XMMReg *d = (Reg *)((char *)env + PARAM1); |
|
| 781 |
d->XMM_D(0) = (int64_t)T0; |
|
| 782 |
} |
|
| 783 |
#endif |
|
| 784 |
|
|
| 785 |
/* float to integer */ |
|
| 786 |
void OPPROTO op_cvtps2dq(void) |
|
| 787 |
{
|
|
| 788 |
XMMReg *d = (XMMReg *)((char *)env + PARAM1); |
|
| 789 |
XMMReg *s = (XMMReg *)((char *)env + PARAM2); |
|
| 790 |
d->XMM_L(0) = lrint(s->XMM_S(0)); |
|
| 791 |
d->XMM_L(1) = lrint(s->XMM_S(1)); |
|
| 792 |
d->XMM_L(2) = lrint(s->XMM_S(2)); |
|
| 793 |
d->XMM_L(3) = lrint(s->XMM_S(3)); |
|
| 794 |
} |
|
| 795 |
|
|
| 796 |
void OPPROTO op_cvtpd2dq(void) |
|
| 797 |
{
|
|
| 798 |
XMMReg *d = (XMMReg *)((char *)env + PARAM1); |
|
| 799 |
XMMReg *s = (XMMReg *)((char *)env + PARAM2); |
|
| 800 |
d->XMM_L(0) = lrint(s->XMM_D(0)); |
|
| 801 |
d->XMM_L(1) = lrint(s->XMM_D(1)); |
|
| 802 |
d->XMM_Q(1) = 0; |
|
| 803 |
} |
|
| 804 |
|
|
| 805 |
void OPPROTO op_cvtps2pi(void) |
|
| 806 |
{
|
|
| 807 |
MMXReg *d = (MMXReg *)((char *)env + PARAM1); |
|
| 808 |
XMMReg *s = (XMMReg *)((char *)env + PARAM2); |
|
| 809 |
d->MMX_L(0) = lrint(s->XMM_S(0)); |
|
| 810 |
d->MMX_L(1) = lrint(s->XMM_S(1)); |
|
| 811 |
} |
|
| 812 |
|
|
| 813 |
void OPPROTO op_cvtpd2pi(void) |
|
| 814 |
{
|
|
| 815 |
MMXReg *d = (MMXReg *)((char *)env + PARAM1); |
|
| 816 |
XMMReg *s = (XMMReg *)((char *)env + PARAM2); |
|
| 817 |
d->MMX_L(0) = lrint(s->XMM_D(0)); |
|
| 818 |
d->MMX_L(1) = lrint(s->XMM_D(1)); |
|
| 819 |
} |
|
| 820 |
|
|
| 821 |
void OPPROTO op_cvtss2si(void) |
|
| 822 |
{
|
|
| 823 |
XMMReg *s = (XMMReg *)((char *)env + PARAM1); |
|
| 824 |
T0 = (int32_t)lrint(s->XMM_S(0)); |
|
| 825 |
} |
|
| 826 |
|
|
| 827 |
void OPPROTO op_cvtsd2si(void) |
|
| 828 |
{
|
|
| 829 |
XMMReg *s = (XMMReg *)((char *)env + PARAM1); |
|
| 830 |
T0 = (int32_t)lrint(s->XMM_D(0)); |
|
| 831 |
} |
|
| 832 |
|
|
| 833 |
#ifdef TARGET_X86_64 |
|
| 834 |
void OPPROTO op_cvtss2sq(void) |
|
| 835 |
{
|
|
| 836 |
XMMReg *s = (XMMReg *)((char *)env + PARAM1); |
|
| 837 |
T0 = llrint(s->XMM_S(0)); |
|
| 838 |
} |
|
| 839 |
|
|
| 840 |
void OPPROTO op_cvtsd2sq(void) |
|
| 841 |
{
|
|
| 842 |
XMMReg *s = (XMMReg *)((char *)env + PARAM1); |
|
| 843 |
T0 = llrint(s->XMM_D(0)); |
|
| 844 |
} |
|
| 845 |
#endif |
|
| 846 |
|
|
| 847 |
/* float to integer truncated */ |
|
| 848 |
void OPPROTO op_cvttps2dq(void) |
|
| 849 |
{
|
|
| 850 |
XMMReg *d = (XMMReg *)((char *)env + PARAM1); |
|
| 851 |
XMMReg *s = (XMMReg *)((char *)env + PARAM2); |
|
| 852 |
d->XMM_L(0) = (int32_t)s->XMM_S(0); |
|
| 853 |
d->XMM_L(1) = (int32_t)s->XMM_S(1); |
|
| 854 |
d->XMM_L(2) = (int32_t)s->XMM_S(2); |
|
| 855 |
d->XMM_L(3) = (int32_t)s->XMM_S(3); |
|
| 856 |
} |
|
| 857 |
|
|
| 858 |
void OPPROTO op_cvttpd2dq(void) |
|
| 859 |
{
|
|
| 860 |
XMMReg *d = (XMMReg *)((char *)env + PARAM1); |
|
| 861 |
XMMReg *s = (XMMReg *)((char *)env + PARAM2); |
|
| 862 |
d->XMM_L(0) = (int32_t)s->XMM_D(0); |
|
| 863 |
d->XMM_L(1) = (int32_t)s->XMM_D(1); |
|
| 864 |
d->XMM_Q(1) = 0; |
|
| 865 |
} |
|
| 866 |
|
|
| 867 |
void OPPROTO op_cvttps2pi(void) |
|
| 868 |
{
|
|
| 869 |
MMXReg *d = (MMXReg *)((char *)env + PARAM1); |
|
| 870 |
XMMReg *s = (XMMReg *)((char *)env + PARAM2); |
|
| 871 |
d->MMX_L(0) = (int32_t)(s->XMM_S(0)); |
|
| 872 |
d->MMX_L(1) = (int32_t)(s->XMM_S(1)); |
|
| 873 |
} |
|
| 874 |
|
|
| 875 |
void OPPROTO op_cvttpd2pi(void) |
|
| 876 |
{
|
|
| 877 |
MMXReg *d = (MMXReg *)((char *)env + PARAM1); |
|
| 878 |
XMMReg *s = (XMMReg *)((char *)env + PARAM2); |
|
| 879 |
d->MMX_L(0) = (int32_t)(s->XMM_D(0)); |
|
| 880 |
d->MMX_L(1) = (int32_t)(s->XMM_D(1)); |
|
| 881 |
} |
|
| 882 |
|
|
| 883 |
void OPPROTO op_cvttss2si(void) |
|
| 884 |
{
|
|
| 885 |
XMMReg *s = (XMMReg *)((char *)env + PARAM1); |
|
| 886 |
T0 = (int32_t)(s->XMM_S(0)); |
|
| 887 |
} |
|
| 888 |
|
|
| 889 |
void OPPROTO op_cvttsd2si(void) |
|
| 890 |
{
|
|
| 891 |
XMMReg *s = (XMMReg *)((char *)env + PARAM1); |
|
| 892 |
T0 = (int32_t)(s->XMM_D(0)); |
|
| 893 |
} |
|
| 894 |
|
|
| 895 |
#ifdef TARGET_X86_64 |
|
| 896 |
void OPPROTO op_cvttss2sq(void) |
|
| 897 |
{
|
|
| 898 |
XMMReg *s = (XMMReg *)((char *)env + PARAM1); |
|
| 899 |
T0 = (int64_t)(s->XMM_S(0)); |
|
| 900 |
} |
|
| 901 |
|
|
| 902 |
void OPPROTO op_cvttsd2sq(void) |
|
| 903 |
{
|
|
| 904 |
XMMReg *s = (XMMReg *)((char *)env + PARAM1); |
|
| 905 |
T0 = (int64_t)(s->XMM_D(0)); |
|
| 906 |
} |
|
| 907 |
#endif |
|
| 908 |
|
|
| 909 |
void OPPROTO op_rsqrtps(void) |
|
| 910 |
{
|
|
| 911 |
XMMReg *d = (XMMReg *)((char *)env + PARAM1); |
|
| 912 |
XMMReg *s = (XMMReg *)((char *)env + PARAM2); |
|
| 913 |
d->XMM_S(0) = approx_rsqrt(s->XMM_S(0)); |
|
| 914 |
d->XMM_S(1) = approx_rsqrt(s->XMM_S(1)); |
|
| 915 |
d->XMM_S(2) = approx_rsqrt(s->XMM_S(2)); |
|
| 916 |
d->XMM_S(3) = approx_rsqrt(s->XMM_S(3)); |
|
| 917 |
} |
|
| 918 |
|
|
| 919 |
void OPPROTO op_rsqrtss(void) |
|
| 920 |
{
|
|
| 921 |
XMMReg *d = (XMMReg *)((char *)env + PARAM1); |
|
| 922 |
XMMReg *s = (XMMReg *)((char *)env + PARAM2); |
|
| 923 |
d->XMM_S(0) = approx_rsqrt(s->XMM_S(0)); |
|
| 924 |
} |
|
| 925 |
|
|
| 926 |
void OPPROTO op_rcpps(void) |
|
| 927 |
{
|
|
| 928 |
XMMReg *d = (XMMReg *)((char *)env + PARAM1); |
|
| 929 |
XMMReg *s = (XMMReg *)((char *)env + PARAM2); |
|
| 930 |
d->XMM_S(0) = approx_rcp(s->XMM_S(0)); |
|
| 931 |
d->XMM_S(1) = approx_rcp(s->XMM_S(1)); |
|
| 932 |
d->XMM_S(2) = approx_rcp(s->XMM_S(2)); |
|
| 933 |
d->XMM_S(3) = approx_rcp(s->XMM_S(3)); |
|
| 934 |
} |
|
| 935 |
|
|
| 936 |
void OPPROTO op_rcpss(void) |
|
| 937 |
{
|
|
| 938 |
XMMReg *d = (XMMReg *)((char *)env + PARAM1); |
|
| 939 |
XMMReg *s = (XMMReg *)((char *)env + PARAM2); |
|
| 940 |
d->XMM_S(0) = approx_rcp(s->XMM_S(0)); |
|
| 941 |
} |
|
| 942 |
|
|
| 943 |
void OPPROTO op_haddps(void) |
|
| 944 |
{
|
|
| 945 |
XMMReg *d = (XMMReg *)((char *)env + PARAM1); |
|
| 946 |
XMMReg *s = (XMMReg *)((char *)env + PARAM2); |
|
| 947 |
XMMReg r; |
|
| 948 |
r.XMM_S(0) = d->XMM_S(0) + d->XMM_S(1); |
|
| 949 |
r.XMM_S(1) = d->XMM_S(2) + d->XMM_S(3); |
|
| 950 |
r.XMM_S(2) = s->XMM_S(0) + s->XMM_S(1); |
|
| 951 |
r.XMM_S(3) = s->XMM_S(2) + s->XMM_S(3); |
|
| 952 |
*d = r; |
|
| 953 |
} |
|
| 954 |
|
|
| 955 |
void OPPROTO op_haddpd(void) |
|
| 956 |
{
|
|
| 957 |
XMMReg *d = (XMMReg *)((char *)env + PARAM1); |
|
| 958 |
XMMReg *s = (XMMReg *)((char *)env + PARAM2); |
|
| 959 |
XMMReg r; |
|
| 960 |
r.XMM_D(0) = d->XMM_D(0) + d->XMM_D(1); |
|
| 961 |
r.XMM_D(1) = s->XMM_D(0) + s->XMM_D(1); |
|
| 962 |
*d = r; |
|
| 963 |
} |
|
| 964 |
|
|
| 965 |
void OPPROTO op_hsubps(void) |
|
| 966 |
{
|
|
| 967 |
XMMReg *d = (XMMReg *)((char *)env + PARAM1); |
|
| 968 |
XMMReg *s = (XMMReg *)((char *)env + PARAM2); |
|
| 969 |
XMMReg r; |
|
| 970 |
r.XMM_S(0) = d->XMM_S(0) - d->XMM_S(1); |
|
| 971 |
r.XMM_S(1) = d->XMM_S(2) - d->XMM_S(3); |
|
| 972 |
r.XMM_S(2) = s->XMM_S(0) - s->XMM_S(1); |
|
| 973 |
r.XMM_S(3) = s->XMM_S(2) - s->XMM_S(3); |
|
| 974 |
*d = r; |
|
| 975 |
} |
|
| 976 |
|
|
| 977 |
void OPPROTO op_hsubpd(void) |
|
| 978 |
{
|
|
| 979 |
XMMReg *d = (XMMReg *)((char *)env + PARAM1); |
|
| 980 |
XMMReg *s = (XMMReg *)((char *)env + PARAM2); |
|
| 981 |
XMMReg r; |
|
| 982 |
r.XMM_D(0) = d->XMM_D(0) - d->XMM_D(1); |
|
| 983 |
r.XMM_D(1) = s->XMM_D(0) - s->XMM_D(1); |
|
| 984 |
*d = r; |
|
| 985 |
} |
|
| 986 |
|
|
Also available in: Unified diff