root / tcg / tcg-op.h @ 678803ab
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/*
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* Tiny Code Generator for QEMU
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*
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* Copyright (c) 2008 Fabrice Bellard
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*
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* Permission is hereby granted, free of charge, to any person obtaining a copy
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* of this software and associated documentation files (the "Software"), to deal
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* in the Software without restriction, including without limitation the rights
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* to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
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* copies of the Software, and to permit persons to whom the Software is
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* furnished to do so, subject to the following conditions:
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*
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* The above copyright notice and this permission notice shall be included in
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* all copies or substantial portions of the Software.
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*
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* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
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* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
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* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
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* THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
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* LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
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* OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
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* THE SOFTWARE.
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*/
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#include "tcg.h" |
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#ifndef CONFIG_NO_DYNGEN_OP
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/* legacy dyngen operations */
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#include "gen-op.h" |
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#endif
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int gen_new_label(void); |
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static inline void tcg_gen_op1(int opc, TCGv arg1) |
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{ |
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*gen_opc_ptr++ = opc; |
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*gen_opparam_ptr++ = GET_TCGV(arg1); |
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} |
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static inline void tcg_gen_op1i(int opc, TCGArg arg1) |
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{ |
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*gen_opc_ptr++ = opc; |
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*gen_opparam_ptr++ = arg1; |
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} |
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static inline void tcg_gen_op2(int opc, TCGv arg1, TCGv arg2) |
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{ |
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*gen_opc_ptr++ = opc; |
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*gen_opparam_ptr++ = GET_TCGV(arg1); |
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*gen_opparam_ptr++ = GET_TCGV(arg2); |
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} |
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static inline void tcg_gen_op2i(int opc, TCGv arg1, TCGArg arg2) |
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{ |
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*gen_opc_ptr++ = opc; |
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*gen_opparam_ptr++ = GET_TCGV(arg1); |
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*gen_opparam_ptr++ = arg2; |
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} |
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static inline void tcg_gen_op3(int opc, TCGv arg1, TCGv arg2, TCGv arg3) |
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{ |
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*gen_opc_ptr++ = opc; |
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*gen_opparam_ptr++ = GET_TCGV(arg1); |
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*gen_opparam_ptr++ = GET_TCGV(arg2); |
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*gen_opparam_ptr++ = GET_TCGV(arg3); |
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} |
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static inline void tcg_gen_op3i(int opc, TCGv arg1, TCGv arg2, TCGArg arg3) |
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{ |
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*gen_opc_ptr++ = opc; |
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*gen_opparam_ptr++ = GET_TCGV(arg1); |
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*gen_opparam_ptr++ = GET_TCGV(arg2); |
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*gen_opparam_ptr++ = arg3; |
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} |
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static inline void tcg_gen_op4(int opc, TCGv arg1, TCGv arg2, TCGv arg3, |
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TCGv arg4) |
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{ |
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*gen_opc_ptr++ = opc; |
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*gen_opparam_ptr++ = GET_TCGV(arg1); |
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*gen_opparam_ptr++ = GET_TCGV(arg2); |
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*gen_opparam_ptr++ = GET_TCGV(arg3); |
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*gen_opparam_ptr++ = GET_TCGV(arg4); |
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} |
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static inline void tcg_gen_op4i(int opc, TCGv arg1, TCGv arg2, TCGv arg3, |
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TCGArg arg4) |
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{ |
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*gen_opc_ptr++ = opc; |
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*gen_opparam_ptr++ = GET_TCGV(arg1); |
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*gen_opparam_ptr++ = GET_TCGV(arg2); |
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*gen_opparam_ptr++ = GET_TCGV(arg3); |
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*gen_opparam_ptr++ = arg4; |
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} |
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static inline void tcg_gen_op4ii(int opc, TCGv arg1, TCGv arg2, TCGArg arg3, |
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TCGArg arg4) |
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{ |
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*gen_opc_ptr++ = opc; |
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*gen_opparam_ptr++ = GET_TCGV(arg1); |
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*gen_opparam_ptr++ = GET_TCGV(arg2); |
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*gen_opparam_ptr++ = arg3; |
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*gen_opparam_ptr++ = arg4; |
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} |
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static inline void tcg_gen_op5(int opc, TCGv arg1, TCGv arg2, |
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TCGv arg3, TCGv arg4, |
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TCGv arg5) |
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{ |
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*gen_opc_ptr++ = opc; |
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*gen_opparam_ptr++ = GET_TCGV(arg1); |
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*gen_opparam_ptr++ = GET_TCGV(arg2); |
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*gen_opparam_ptr++ = GET_TCGV(arg3); |
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*gen_opparam_ptr++ = GET_TCGV(arg4); |
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*gen_opparam_ptr++ = GET_TCGV(arg5); |
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} |
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static inline void tcg_gen_op5i(int opc, TCGv arg1, TCGv arg2, |
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TCGv arg3, TCGv arg4, |
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TCGArg arg5) |
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{ |
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*gen_opc_ptr++ = opc; |
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*gen_opparam_ptr++ = GET_TCGV(arg1); |
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*gen_opparam_ptr++ = GET_TCGV(arg2); |
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*gen_opparam_ptr++ = GET_TCGV(arg3); |
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*gen_opparam_ptr++ = GET_TCGV(arg4); |
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*gen_opparam_ptr++ = arg5; |
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} |
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static inline void tcg_gen_op6(int opc, TCGv arg1, TCGv arg2, |
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TCGv arg3, TCGv arg4, |
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TCGv arg5, TCGv arg6) |
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{ |
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*gen_opc_ptr++ = opc; |
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*gen_opparam_ptr++ = GET_TCGV(arg1); |
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*gen_opparam_ptr++ = GET_TCGV(arg2); |
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*gen_opparam_ptr++ = GET_TCGV(arg3); |
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*gen_opparam_ptr++ = GET_TCGV(arg4); |
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*gen_opparam_ptr++ = GET_TCGV(arg5); |
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*gen_opparam_ptr++ = GET_TCGV(arg6); |
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} |
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static inline void tcg_gen_op6ii(int opc, TCGv arg1, TCGv arg2, |
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TCGv arg3, TCGv arg4, |
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TCGArg arg5, TCGArg arg6) |
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{ |
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*gen_opc_ptr++ = opc; |
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*gen_opparam_ptr++ = GET_TCGV(arg1); |
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*gen_opparam_ptr++ = GET_TCGV(arg2); |
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*gen_opparam_ptr++ = GET_TCGV(arg3); |
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*gen_opparam_ptr++ = GET_TCGV(arg4); |
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*gen_opparam_ptr++ = arg5; |
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*gen_opparam_ptr++ = arg6; |
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} |
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static inline void gen_set_label(int n) |
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{ |
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tcg_gen_op1i(INDEX_op_set_label, n); |
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} |
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static inline void tcg_gen_br(int label) |
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{ |
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tcg_gen_op1i(INDEX_op_br, label); |
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} |
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static inline void tcg_gen_mov_i32(TCGv ret, TCGv arg) |
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{ |
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tcg_gen_op2(INDEX_op_mov_i32, ret, arg); |
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} |
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static inline void tcg_gen_movi_i32(TCGv ret, int32_t arg) |
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{ |
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tcg_gen_op2i(INDEX_op_movi_i32, ret, arg); |
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} |
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/* helper calls */
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#define TCG_HELPER_CALL_FLAGS 0 |
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static inline void tcg_gen_helper_0_0(void *func) |
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{ |
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tcg_gen_call(&tcg_ctx, |
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tcg_const_ptr((tcg_target_long)func), TCG_HELPER_CALL_FLAGS, |
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0, NULL, 0, NULL); |
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} |
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static inline void tcg_gen_helper_0_1(void *func, TCGv arg) |
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{ |
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tcg_gen_call(&tcg_ctx, |
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tcg_const_ptr((tcg_target_long)func), TCG_HELPER_CALL_FLAGS, |
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0, NULL, 1, &arg); |
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} |
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static inline void tcg_gen_helper_0_2(void *func, TCGv arg1, TCGv arg2) |
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{ |
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TCGv args[2];
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args[0] = arg1;
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args[1] = arg2;
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tcg_gen_call(&tcg_ctx, |
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tcg_const_ptr((tcg_target_long)func), TCG_HELPER_CALL_FLAGS, |
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0, NULL, 2, args); |
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} |
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static inline void tcg_gen_helper_0_3(void *func, |
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TCGv arg1, TCGv arg2, TCGv arg3) |
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{ |
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TCGv args[3];
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args[0] = arg1;
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args[1] = arg2;
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args[2] = arg3;
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tcg_gen_call(&tcg_ctx, |
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tcg_const_ptr((tcg_target_long)func), TCG_HELPER_CALL_FLAGS, |
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0, NULL, 3, args); |
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} |
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static inline void tcg_gen_helper_0_4(void *func, TCGv arg1, TCGv arg2, |
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TCGv arg3, TCGv arg4) |
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{ |
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TCGv args[4];
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args[0] = arg1;
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args[1] = arg2;
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args[2] = arg3;
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args[3] = arg4;
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tcg_gen_call(&tcg_ctx, |
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tcg_const_ptr((tcg_target_long)func), TCG_HELPER_CALL_FLAGS, |
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0, NULL, 4, args); |
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} |
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static inline void tcg_gen_helper_1_0(void *func, TCGv ret) |
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{ |
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tcg_gen_call(&tcg_ctx, |
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tcg_const_ptr((tcg_target_long)func), TCG_HELPER_CALL_FLAGS, |
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1, &ret, 0, NULL); |
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} |
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static inline void tcg_gen_helper_1_1(void *func, TCGv ret, TCGv arg1) |
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{ |
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tcg_gen_call(&tcg_ctx, |
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tcg_const_ptr((tcg_target_long)func), TCG_HELPER_CALL_FLAGS, |
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1, &ret, 1, &arg1); |
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} |
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static inline void tcg_gen_helper_1_2(void *func, TCGv ret, |
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TCGv arg1, TCGv arg2) |
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{ |
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TCGv args[2];
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args[0] = arg1;
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args[1] = arg2;
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tcg_gen_call(&tcg_ctx, |
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tcg_const_ptr((tcg_target_long)func), TCG_HELPER_CALL_FLAGS, |
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1, &ret, 2, args); |
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} |
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static inline void tcg_gen_helper_1_3(void *func, TCGv ret, |
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TCGv arg1, TCGv arg2, TCGv arg3) |
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{ |
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TCGv args[3];
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args[0] = arg1;
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args[1] = arg2;
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args[2] = arg3;
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tcg_gen_call(&tcg_ctx, |
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tcg_const_ptr((tcg_target_long)func), TCG_HELPER_CALL_FLAGS, |
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1, &ret, 3, args); |
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} |
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static inline void tcg_gen_helper_1_4(void *func, TCGv ret, |
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TCGv arg1, TCGv arg2, TCGv arg3, |
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TCGv arg4) |
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{ |
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TCGv args[4];
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args[0] = arg1;
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args[1] = arg2;
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args[2] = arg3;
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args[3] = arg4;
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tcg_gen_call(&tcg_ctx, |
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tcg_const_ptr((tcg_target_long)func), TCG_HELPER_CALL_FLAGS, |
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1, &ret, 4, args); |
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} |
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/* 32 bit ops */
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static inline void tcg_gen_ld8u_i32(TCGv ret, TCGv arg2, tcg_target_long offset) |
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{ |
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tcg_gen_op3i(INDEX_op_ld8u_i32, ret, arg2, offset); |
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} |
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static inline void tcg_gen_ld8s_i32(TCGv ret, TCGv arg2, tcg_target_long offset) |
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{ |
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tcg_gen_op3i(INDEX_op_ld8s_i32, ret, arg2, offset); |
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} |
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static inline void tcg_gen_ld16u_i32(TCGv ret, TCGv arg2, tcg_target_long offset) |
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{ |
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tcg_gen_op3i(INDEX_op_ld16u_i32, ret, arg2, offset); |
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} |
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static inline void tcg_gen_ld16s_i32(TCGv ret, TCGv arg2, tcg_target_long offset) |
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{ |
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tcg_gen_op3i(INDEX_op_ld16s_i32, ret, arg2, offset); |
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} |
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static inline void tcg_gen_ld_i32(TCGv ret, TCGv arg2, tcg_target_long offset) |
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{ |
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tcg_gen_op3i(INDEX_op_ld_i32, ret, arg2, offset); |
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} |
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static inline void tcg_gen_st8_i32(TCGv arg1, TCGv arg2, tcg_target_long offset) |
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{ |
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tcg_gen_op3i(INDEX_op_st8_i32, arg1, arg2, offset); |
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} |
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static inline void tcg_gen_st16_i32(TCGv arg1, TCGv arg2, tcg_target_long offset) |
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{ |
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tcg_gen_op3i(INDEX_op_st16_i32, arg1, arg2, offset); |
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} |
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static inline void tcg_gen_st_i32(TCGv arg1, TCGv arg2, tcg_target_long offset) |
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{ |
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tcg_gen_op3i(INDEX_op_st_i32, arg1, arg2, offset); |
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} |
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static inline void tcg_gen_add_i32(TCGv ret, TCGv arg1, TCGv arg2) |
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{ |
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tcg_gen_op3(INDEX_op_add_i32, ret, arg1, arg2); |
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} |
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static inline void tcg_gen_addi_i32(TCGv ret, TCGv arg1, int32_t arg2) |
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{ |
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/* some cases can be optimized here */
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if (arg2 == 0) { |
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tcg_gen_mov_i32(ret, arg1); |
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} else {
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tcg_gen_add_i32(ret, arg1, tcg_const_i32(arg2)); |
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} |
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} |
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static inline void tcg_gen_sub_i32(TCGv ret, TCGv arg1, TCGv arg2) |
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{ |
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tcg_gen_op3(INDEX_op_sub_i32, ret, arg1, arg2); |
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} |
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static inline void tcg_gen_subi_i32(TCGv ret, TCGv arg1, int32_t arg2) |
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{ |
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/* some cases can be optimized here */
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if (arg2 == 0) { |
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tcg_gen_mov_i32(ret, arg1); |
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} else {
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tcg_gen_sub_i32(ret, arg1, tcg_const_i32(arg2)); |
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} |
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} |
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static inline void tcg_gen_and_i32(TCGv ret, TCGv arg1, TCGv arg2) |
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{ |
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tcg_gen_op3(INDEX_op_and_i32, ret, arg1, arg2); |
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} |
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static inline void tcg_gen_andi_i32(TCGv ret, TCGv arg1, int32_t arg2) |
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{ |
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/* some cases can be optimized here */
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if (arg2 == 0) { |
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tcg_gen_movi_i32(ret, 0);
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} else if (arg2 == 0xffffffff) { |
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tcg_gen_mov_i32(ret, arg1); |
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} else {
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tcg_gen_and_i32(ret, arg1, tcg_const_i32(arg2)); |
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} |
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} |
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static inline void tcg_gen_or_i32(TCGv ret, TCGv arg1, TCGv arg2) |
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{ |
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tcg_gen_op3(INDEX_op_or_i32, ret, arg1, arg2); |
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} |
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static inline void tcg_gen_ori_i32(TCGv ret, TCGv arg1, int32_t arg2) |
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{ |
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/* some cases can be optimized here */
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if (arg2 == 0xffffffff) { |
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tcg_gen_movi_i32(ret, 0xffffffff);
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} else if (arg2 == 0) { |
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tcg_gen_mov_i32(ret, arg1); |
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} else {
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tcg_gen_or_i32(ret, arg1, tcg_const_i32(arg2)); |
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} |
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} |
383 |
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static inline void tcg_gen_xor_i32(TCGv ret, TCGv arg1, TCGv arg2) |
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{ |
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tcg_gen_op3(INDEX_op_xor_i32, ret, arg1, arg2); |
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} |
388 |
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static inline void tcg_gen_xori_i32(TCGv ret, TCGv arg1, int32_t arg2) |
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{ |
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/* some cases can be optimized here */
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if (arg2 == 0) { |
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tcg_gen_mov_i32(ret, arg1); |
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} else {
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tcg_gen_xor_i32(ret, arg1, tcg_const_i32(arg2)); |
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} |
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} |
398 |
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static inline void tcg_gen_shl_i32(TCGv ret, TCGv arg1, TCGv arg2) |
400 |
{ |
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tcg_gen_op3(INDEX_op_shl_i32, ret, arg1, arg2); |
402 |
} |
403 |
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static inline void tcg_gen_shli_i32(TCGv ret, TCGv arg1, int32_t arg2) |
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{ |
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tcg_gen_shl_i32(ret, arg1, tcg_const_i32(arg2)); |
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} |
408 |
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static inline void tcg_gen_shr_i32(TCGv ret, TCGv arg1, TCGv arg2) |
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{ |
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tcg_gen_op3(INDEX_op_shr_i32, ret, arg1, arg2); |
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} |
413 |
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static inline void tcg_gen_shri_i32(TCGv ret, TCGv arg1, int32_t arg2) |
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{ |
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tcg_gen_shr_i32(ret, arg1, tcg_const_i32(arg2)); |
417 |
} |
418 |
|
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static inline void tcg_gen_sar_i32(TCGv ret, TCGv arg1, TCGv arg2) |
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{ |
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tcg_gen_op3(INDEX_op_sar_i32, ret, arg1, arg2); |
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} |
423 |
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static inline void tcg_gen_sari_i32(TCGv ret, TCGv arg1, int32_t arg2) |
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{ |
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tcg_gen_sar_i32(ret, arg1, tcg_const_i32(arg2)); |
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} |
428 |
|
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static inline void tcg_gen_brcond_i32(int cond, TCGv arg1, TCGv arg2, |
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int label_index)
|
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{ |
432 |
tcg_gen_op4ii(INDEX_op_brcond_i32, arg1, arg2, cond, label_index); |
433 |
} |
434 |
|
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static inline void tcg_gen_mul_i32(TCGv ret, TCGv arg1, TCGv arg2) |
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{ |
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tcg_gen_op3(INDEX_op_mul_i32, ret, arg1, arg2); |
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} |
439 |
|
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#ifdef TCG_TARGET_HAS_div_i32
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static inline void tcg_gen_div_i32(TCGv ret, TCGv arg1, TCGv arg2) |
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{ |
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tcg_gen_op3(INDEX_op_div_i32, ret, arg1, arg2); |
444 |
} |
445 |
|
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static inline void tcg_gen_rem_i32(TCGv ret, TCGv arg1, TCGv arg2) |
447 |
{ |
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tcg_gen_op3(INDEX_op_rem_i32, ret, arg1, arg2); |
449 |
} |
450 |
|
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static inline void tcg_gen_divu_i32(TCGv ret, TCGv arg1, TCGv arg2) |
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{ |
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tcg_gen_op3(INDEX_op_divu_i32, ret, arg1, arg2); |
454 |
} |
455 |
|
456 |
static inline void tcg_gen_remu_i32(TCGv ret, TCGv arg1, TCGv arg2) |
457 |
{ |
458 |
tcg_gen_op3(INDEX_op_remu_i32, ret, arg1, arg2); |
459 |
} |
460 |
#else
|
461 |
static inline void tcg_gen_div_i32(TCGv ret, TCGv arg1, TCGv arg2) |
462 |
{ |
463 |
TCGv t0; |
464 |
t0 = tcg_temp_new(TCG_TYPE_I32); |
465 |
tcg_gen_sari_i32(t0, arg1, 31);
|
466 |
tcg_gen_op5(INDEX_op_div2_i32, ret, t0, arg1, t0, arg2); |
467 |
} |
468 |
|
469 |
static inline void tcg_gen_rem_i32(TCGv ret, TCGv arg1, TCGv arg2) |
470 |
{ |
471 |
TCGv t0; |
472 |
t0 = tcg_temp_new(TCG_TYPE_I32); |
473 |
tcg_gen_sari_i32(t0, arg1, 31);
|
474 |
tcg_gen_op5(INDEX_op_div2_i32, t0, ret, arg1, t0, arg2); |
475 |
} |
476 |
|
477 |
static inline void tcg_gen_divu_i32(TCGv ret, TCGv arg1, TCGv arg2) |
478 |
{ |
479 |
TCGv t0; |
480 |
t0 = tcg_temp_new(TCG_TYPE_I32); |
481 |
tcg_gen_movi_i32(t0, 0);
|
482 |
tcg_gen_op5(INDEX_op_divu2_i32, ret, t0, arg1, t0, arg2); |
483 |
} |
484 |
|
485 |
static inline void tcg_gen_remu_i32(TCGv ret, TCGv arg1, TCGv arg2) |
486 |
{ |
487 |
TCGv t0; |
488 |
t0 = tcg_temp_new(TCG_TYPE_I32); |
489 |
tcg_gen_movi_i32(t0, 0);
|
490 |
tcg_gen_op5(INDEX_op_divu2_i32, t0, ret, arg1, t0, arg2); |
491 |
} |
492 |
#endif
|
493 |
|
494 |
#if TCG_TARGET_REG_BITS == 32 |
495 |
|
496 |
static inline void tcg_gen_mov_i64(TCGv ret, TCGv arg) |
497 |
{ |
498 |
tcg_gen_mov_i32(ret, arg); |
499 |
tcg_gen_mov_i32(TCGV_HIGH(ret), TCGV_HIGH(arg)); |
500 |
} |
501 |
|
502 |
static inline void tcg_gen_movi_i64(TCGv ret, int64_t arg) |
503 |
{ |
504 |
tcg_gen_movi_i32(ret, arg); |
505 |
tcg_gen_movi_i32(TCGV_HIGH(ret), arg >> 32);
|
506 |
} |
507 |
|
508 |
static inline void tcg_gen_ld8u_i64(TCGv ret, TCGv arg2, tcg_target_long offset) |
509 |
{ |
510 |
tcg_gen_ld8u_i32(ret, arg2, offset); |
511 |
tcg_gen_movi_i32(TCGV_HIGH(ret), 0);
|
512 |
} |
513 |
|
514 |
static inline void tcg_gen_ld8s_i64(TCGv ret, TCGv arg2, tcg_target_long offset) |
515 |
{ |
516 |
tcg_gen_ld8s_i32(ret, arg2, offset); |
517 |
tcg_gen_sari_i32(TCGV_HIGH(ret), ret, 31);
|
518 |
} |
519 |
|
520 |
static inline void tcg_gen_ld16u_i64(TCGv ret, TCGv arg2, tcg_target_long offset) |
521 |
{ |
522 |
tcg_gen_ld16u_i32(ret, arg2, offset); |
523 |
tcg_gen_movi_i32(TCGV_HIGH(ret), 0);
|
524 |
} |
525 |
|
526 |
static inline void tcg_gen_ld16s_i64(TCGv ret, TCGv arg2, tcg_target_long offset) |
527 |
{ |
528 |
tcg_gen_ld16s_i32(ret, arg2, offset); |
529 |
tcg_gen_sari_i32(TCGV_HIGH(ret), ret, 31);
|
530 |
} |
531 |
|
532 |
static inline void tcg_gen_ld32u_i64(TCGv ret, TCGv arg2, tcg_target_long offset) |
533 |
{ |
534 |
tcg_gen_ld_i32(ret, arg2, offset); |
535 |
tcg_gen_movi_i32(TCGV_HIGH(ret), 0);
|
536 |
} |
537 |
|
538 |
static inline void tcg_gen_ld32s_i64(TCGv ret, TCGv arg2, tcg_target_long offset) |
539 |
{ |
540 |
tcg_gen_ld_i32(ret, arg2, offset); |
541 |
tcg_gen_sari_i32(TCGV_HIGH(ret), ret, 31);
|
542 |
} |
543 |
|
544 |
static inline void tcg_gen_ld_i64(TCGv ret, TCGv arg2, tcg_target_long offset) |
545 |
{ |
546 |
/* since arg2 and ret have different types, they cannot be the
|
547 |
same temporary */
|
548 |
#ifdef TCG_TARGET_WORDS_BIGENDIAN
|
549 |
tcg_gen_ld_i32(TCGV_HIGH(ret), arg2, offset); |
550 |
tcg_gen_ld_i32(ret, arg2, offset + 4);
|
551 |
#else
|
552 |
tcg_gen_ld_i32(ret, arg2, offset); |
553 |
tcg_gen_ld_i32(TCGV_HIGH(ret), arg2, offset + 4);
|
554 |
#endif
|
555 |
} |
556 |
|
557 |
static inline void tcg_gen_st8_i64(TCGv arg1, TCGv arg2, tcg_target_long offset) |
558 |
{ |
559 |
tcg_gen_st8_i32(arg1, arg2, offset); |
560 |
} |
561 |
|
562 |
static inline void tcg_gen_st16_i64(TCGv arg1, TCGv arg2, tcg_target_long offset) |
563 |
{ |
564 |
tcg_gen_st16_i32(arg1, arg2, offset); |
565 |
} |
566 |
|
567 |
static inline void tcg_gen_st32_i64(TCGv arg1, TCGv arg2, tcg_target_long offset) |
568 |
{ |
569 |
tcg_gen_st_i32(arg1, arg2, offset); |
570 |
} |
571 |
|
572 |
static inline void tcg_gen_st_i64(TCGv arg1, TCGv arg2, tcg_target_long offset) |
573 |
{ |
574 |
#ifdef TCG_TARGET_WORDS_BIGENDIAN
|
575 |
tcg_gen_st_i32(TCGV_HIGH(arg1), arg2, offset); |
576 |
tcg_gen_st_i32(arg1, arg2, offset + 4);
|
577 |
#else
|
578 |
tcg_gen_st_i32(arg1, arg2, offset); |
579 |
tcg_gen_st_i32(TCGV_HIGH(arg1), arg2, offset + 4);
|
580 |
#endif
|
581 |
} |
582 |
|
583 |
static inline void tcg_gen_add_i64(TCGv ret, TCGv arg1, TCGv arg2) |
584 |
{ |
585 |
tcg_gen_op6(INDEX_op_add2_i32, ret, TCGV_HIGH(ret), |
586 |
arg1, TCGV_HIGH(arg1), arg2, TCGV_HIGH(arg2)); |
587 |
} |
588 |
|
589 |
static inline void tcg_gen_addi_i64(TCGv ret, TCGv arg1, int64_t arg2) |
590 |
{ |
591 |
tcg_gen_add_i64(ret, arg1, tcg_const_i64(arg2)); |
592 |
} |
593 |
|
594 |
static inline void tcg_gen_sub_i64(TCGv ret, TCGv arg1, TCGv arg2) |
595 |
{ |
596 |
tcg_gen_op6(INDEX_op_sub2_i32, ret, TCGV_HIGH(ret), |
597 |
arg1, TCGV_HIGH(arg1), arg2, TCGV_HIGH(arg2)); |
598 |
} |
599 |
|
600 |
static inline void tcg_gen_subi_i64(TCGv ret, TCGv arg1, int64_t arg2) |
601 |
{ |
602 |
tcg_gen_sub_i64(ret, arg1, tcg_const_i64(arg2)); |
603 |
} |
604 |
|
605 |
static inline void tcg_gen_and_i64(TCGv ret, TCGv arg1, TCGv arg2) |
606 |
{ |
607 |
tcg_gen_and_i32(ret, arg1, arg2); |
608 |
tcg_gen_and_i32(TCGV_HIGH(ret), TCGV_HIGH(arg1), TCGV_HIGH(arg2)); |
609 |
} |
610 |
|
611 |
static inline void tcg_gen_andi_i64(TCGv ret, TCGv arg1, int64_t arg2) |
612 |
{ |
613 |
tcg_gen_andi_i32(ret, arg1, arg2); |
614 |
tcg_gen_andi_i32(TCGV_HIGH(ret), TCGV_HIGH(arg1), arg2 >> 32);
|
615 |
} |
616 |
|
617 |
static inline void tcg_gen_or_i64(TCGv ret, TCGv arg1, TCGv arg2) |
618 |
{ |
619 |
tcg_gen_or_i32(ret, arg1, arg2); |
620 |
tcg_gen_or_i32(TCGV_HIGH(ret), TCGV_HIGH(arg1), TCGV_HIGH(arg2)); |
621 |
} |
622 |
|
623 |
static inline void tcg_gen_ori_i64(TCGv ret, TCGv arg1, int64_t arg2) |
624 |
{ |
625 |
tcg_gen_ori_i32(ret, arg1, arg2); |
626 |
tcg_gen_ori_i32(TCGV_HIGH(ret), TCGV_HIGH(arg1), arg2 >> 32);
|
627 |
} |
628 |
|
629 |
static inline void tcg_gen_xor_i64(TCGv ret, TCGv arg1, TCGv arg2) |
630 |
{ |
631 |
tcg_gen_xor_i32(ret, arg1, arg2); |
632 |
tcg_gen_xor_i32(TCGV_HIGH(ret), TCGV_HIGH(arg1), TCGV_HIGH(arg2)); |
633 |
} |
634 |
|
635 |
static inline void tcg_gen_xori_i64(TCGv ret, TCGv arg1, int64_t arg2) |
636 |
{ |
637 |
tcg_gen_xori_i32(ret, arg1, arg2); |
638 |
tcg_gen_xori_i32(TCGV_HIGH(ret), TCGV_HIGH(arg1), arg2 >> 32);
|
639 |
} |
640 |
|
641 |
/* XXX: use generic code when basic block handling is OK or CPU
|
642 |
specific code (x86) */
|
643 |
static inline void tcg_gen_shl_i64(TCGv ret, TCGv arg1, TCGv arg2) |
644 |
{ |
645 |
tcg_gen_helper_1_2(tcg_helper_shl_i64, ret, arg1, arg2); |
646 |
} |
647 |
|
648 |
static inline void tcg_gen_shli_i64(TCGv ret, TCGv arg1, int64_t arg2) |
649 |
{ |
650 |
tcg_gen_shifti_i64(ret, arg1, arg2, 0, 0); |
651 |
} |
652 |
|
653 |
static inline void tcg_gen_shr_i64(TCGv ret, TCGv arg1, TCGv arg2) |
654 |
{ |
655 |
tcg_gen_helper_1_2(tcg_helper_shr_i64, ret, arg1, arg2); |
656 |
} |
657 |
|
658 |
static inline void tcg_gen_shri_i64(TCGv ret, TCGv arg1, int64_t arg2) |
659 |
{ |
660 |
tcg_gen_shifti_i64(ret, arg1, arg2, 1, 0); |
661 |
} |
662 |
|
663 |
static inline void tcg_gen_sar_i64(TCGv ret, TCGv arg1, TCGv arg2) |
664 |
{ |
665 |
tcg_gen_helper_1_2(tcg_helper_sar_i64, ret, arg1, arg2); |
666 |
} |
667 |
|
668 |
static inline void tcg_gen_sari_i64(TCGv ret, TCGv arg1, int64_t arg2) |
669 |
{ |
670 |
tcg_gen_shifti_i64(ret, arg1, arg2, 1, 1); |
671 |
} |
672 |
|
673 |
static inline void tcg_gen_brcond_i64(int cond, TCGv arg1, TCGv arg2, |
674 |
int label_index)
|
675 |
{ |
676 |
tcg_gen_op6ii(INDEX_op_brcond2_i32, |
677 |
arg1, TCGV_HIGH(arg1), arg2, TCGV_HIGH(arg2), |
678 |
cond, label_index); |
679 |
} |
680 |
|
681 |
static inline void tcg_gen_mul_i64(TCGv ret, TCGv arg1, TCGv arg2) |
682 |
{ |
683 |
TCGv t0, t1; |
684 |
|
685 |
t0 = tcg_temp_new(TCG_TYPE_I64); |
686 |
t1 = tcg_temp_new(TCG_TYPE_I32); |
687 |
|
688 |
tcg_gen_op4(INDEX_op_mulu2_i32, t0, TCGV_HIGH(t0), arg1, arg2); |
689 |
|
690 |
tcg_gen_mul_i32(t1, arg1, TCGV_HIGH(arg2)); |
691 |
tcg_gen_add_i32(TCGV_HIGH(t0), TCGV_HIGH(t0), t1); |
692 |
tcg_gen_mul_i32(t1, TCGV_HIGH(arg1), arg2); |
693 |
tcg_gen_add_i32(TCGV_HIGH(t0), TCGV_HIGH(t0), t1); |
694 |
|
695 |
tcg_gen_mov_i64(ret, t0); |
696 |
} |
697 |
|
698 |
static inline void tcg_gen_div_i64(TCGv ret, TCGv arg1, TCGv arg2) |
699 |
{ |
700 |
tcg_gen_helper_1_2(tcg_helper_div_i64, ret, arg1, arg2); |
701 |
} |
702 |
|
703 |
static inline void tcg_gen_rem_i64(TCGv ret, TCGv arg1, TCGv arg2) |
704 |
{ |
705 |
tcg_gen_helper_1_2(tcg_helper_rem_i64, ret, arg1, arg2); |
706 |
} |
707 |
|
708 |
static inline void tcg_gen_divu_i64(TCGv ret, TCGv arg1, TCGv arg2) |
709 |
{ |
710 |
tcg_gen_helper_1_2(tcg_helper_divu_i64, ret, arg1, arg2); |
711 |
} |
712 |
|
713 |
static inline void tcg_gen_remu_i64(TCGv ret, TCGv arg1, TCGv arg2) |
714 |
{ |
715 |
tcg_gen_helper_1_2(tcg_helper_remu_i64, ret, arg1, arg2); |
716 |
} |
717 |
|
718 |
#else
|
719 |
|
720 |
static inline void tcg_gen_mov_i64(TCGv ret, TCGv arg) |
721 |
{ |
722 |
tcg_gen_op2(INDEX_op_mov_i64, ret, arg); |
723 |
} |
724 |
|
725 |
static inline void tcg_gen_movi_i64(TCGv ret, int64_t arg) |
726 |
{ |
727 |
tcg_gen_op2i(INDEX_op_movi_i64, ret, arg); |
728 |
} |
729 |
|
730 |
static inline void tcg_gen_ld8u_i64(TCGv ret, TCGv arg2, |
731 |
tcg_target_long offset) |
732 |
{ |
733 |
tcg_gen_op3i(INDEX_op_ld8u_i64, ret, arg2, offset); |
734 |
} |
735 |
|
736 |
static inline void tcg_gen_ld8s_i64(TCGv ret, TCGv arg2, |
737 |
tcg_target_long offset) |
738 |
{ |
739 |
tcg_gen_op3i(INDEX_op_ld8s_i64, ret, arg2, offset); |
740 |
} |
741 |
|
742 |
static inline void tcg_gen_ld16u_i64(TCGv ret, TCGv arg2, |
743 |
tcg_target_long offset) |
744 |
{ |
745 |
tcg_gen_op3i(INDEX_op_ld16u_i64, ret, arg2, offset); |
746 |
} |
747 |
|
748 |
static inline void tcg_gen_ld16s_i64(TCGv ret, TCGv arg2, |
749 |
tcg_target_long offset) |
750 |
{ |
751 |
tcg_gen_op3i(INDEX_op_ld16s_i64, ret, arg2, offset); |
752 |
} |
753 |
|
754 |
static inline void tcg_gen_ld32u_i64(TCGv ret, TCGv arg2, |
755 |
tcg_target_long offset) |
756 |
{ |
757 |
tcg_gen_op3i(INDEX_op_ld32u_i64, ret, arg2, offset); |
758 |
} |
759 |
|
760 |
static inline void tcg_gen_ld32s_i64(TCGv ret, TCGv arg2, |
761 |
tcg_target_long offset) |
762 |
{ |
763 |
tcg_gen_op3i(INDEX_op_ld32s_i64, ret, arg2, offset); |
764 |
} |
765 |
|
766 |
static inline void tcg_gen_ld_i64(TCGv ret, TCGv arg2, tcg_target_long offset) |
767 |
{ |
768 |
tcg_gen_op3i(INDEX_op_ld_i64, ret, arg2, offset); |
769 |
} |
770 |
|
771 |
static inline void tcg_gen_st8_i64(TCGv arg1, TCGv arg2, |
772 |
tcg_target_long offset) |
773 |
{ |
774 |
tcg_gen_op3i(INDEX_op_st8_i64, arg1, arg2, offset); |
775 |
} |
776 |
|
777 |
static inline void tcg_gen_st16_i64(TCGv arg1, TCGv arg2, |
778 |
tcg_target_long offset) |
779 |
{ |
780 |
tcg_gen_op3i(INDEX_op_st16_i64, arg1, arg2, offset); |
781 |
} |
782 |
|
783 |
static inline void tcg_gen_st32_i64(TCGv arg1, TCGv arg2, |
784 |
tcg_target_long offset) |
785 |
{ |
786 |
tcg_gen_op3i(INDEX_op_st32_i64, arg1, arg2, offset); |
787 |
} |
788 |
|
789 |
static inline void tcg_gen_st_i64(TCGv arg1, TCGv arg2, tcg_target_long offset) |
790 |
{ |
791 |
tcg_gen_op3i(INDEX_op_st_i64, arg1, arg2, offset); |
792 |
} |
793 |
|
794 |
static inline void tcg_gen_add_i64(TCGv ret, TCGv arg1, TCGv arg2) |
795 |
{ |
796 |
tcg_gen_op3(INDEX_op_add_i64, ret, arg1, arg2); |
797 |
} |
798 |
|
799 |
static inline void tcg_gen_addi_i64(TCGv ret, TCGv arg1, int64_t arg2) |
800 |
{ |
801 |
tcg_gen_add_i64(ret, arg1, tcg_const_i64(arg2)); |
802 |
} |
803 |
|
804 |
static inline void tcg_gen_sub_i64(TCGv ret, TCGv arg1, TCGv arg2) |
805 |
{ |
806 |
tcg_gen_op3(INDEX_op_sub_i64, ret, arg1, arg2); |
807 |
} |
808 |
|
809 |
static inline void tcg_gen_subi_i64(TCGv ret, TCGv arg1, int64_t arg2) |
810 |
{ |
811 |
tcg_gen_sub_i64(ret, arg1, tcg_const_i64(arg2)); |
812 |
} |
813 |
|
814 |
static inline void tcg_gen_and_i64(TCGv ret, TCGv arg1, TCGv arg2) |
815 |
{ |
816 |
tcg_gen_op3(INDEX_op_and_i64, ret, arg1, arg2); |
817 |
} |
818 |
|
819 |
static inline void tcg_gen_andi_i64(TCGv ret, TCGv arg1, int64_t arg2) |
820 |
{ |
821 |
tcg_gen_and_i64(ret, arg1, tcg_const_i64(arg2)); |
822 |
} |
823 |
|
824 |
static inline void tcg_gen_or_i64(TCGv ret, TCGv arg1, TCGv arg2) |
825 |
{ |
826 |
tcg_gen_op3(INDEX_op_or_i64, ret, arg1, arg2); |
827 |
} |
828 |
|
829 |
static inline void tcg_gen_ori_i64(TCGv ret, TCGv arg1, int64_t arg2) |
830 |
{ |
831 |
tcg_gen_or_i64(ret, arg1, tcg_const_i64(arg2)); |
832 |
} |
833 |
|
834 |
static inline void tcg_gen_xor_i64(TCGv ret, TCGv arg1, TCGv arg2) |
835 |
{ |
836 |
tcg_gen_op3(INDEX_op_xor_i64, ret, arg1, arg2); |
837 |
} |
838 |
|
839 |
static inline void tcg_gen_xori_i64(TCGv ret, TCGv arg1, int64_t arg2) |
840 |
{ |
841 |
tcg_gen_xor_i64(ret, arg1, tcg_const_i64(arg2)); |
842 |
} |
843 |
|
844 |
static inline void tcg_gen_shl_i64(TCGv ret, TCGv arg1, TCGv arg2) |
845 |
{ |
846 |
tcg_gen_op3(INDEX_op_shl_i64, ret, arg1, arg2); |
847 |
} |
848 |
|
849 |
static inline void tcg_gen_shli_i64(TCGv ret, TCGv arg1, int64_t arg2) |
850 |
{ |
851 |
tcg_gen_shl_i64(ret, arg1, tcg_const_i64(arg2)); |
852 |
} |
853 |
|
854 |
static inline void tcg_gen_shr_i64(TCGv ret, TCGv arg1, TCGv arg2) |
855 |
{ |
856 |
tcg_gen_op3(INDEX_op_shr_i64, ret, arg1, arg2); |
857 |
} |
858 |
|
859 |
static inline void tcg_gen_shri_i64(TCGv ret, TCGv arg1, int64_t arg2) |
860 |
{ |
861 |
tcg_gen_shr_i64(ret, arg1, tcg_const_i64(arg2)); |
862 |
} |
863 |
|
864 |
static inline void tcg_gen_sar_i64(TCGv ret, TCGv arg1, TCGv arg2) |
865 |
{ |
866 |
tcg_gen_op3(INDEX_op_sar_i64, ret, arg1, arg2); |
867 |
} |
868 |
|
869 |
static inline void tcg_gen_sari_i64(TCGv ret, TCGv arg1, int64_t arg2) |
870 |
{ |
871 |
tcg_gen_sar_i64(ret, arg1, tcg_const_i64(arg2)); |
872 |
} |
873 |
|
874 |
static inline void tcg_gen_brcond_i64(int cond, TCGv arg1, TCGv arg2, |
875 |
int label_index)
|
876 |
{ |
877 |
tcg_gen_op4ii(INDEX_op_brcond_i64, arg1, arg2, cond, label_index); |
878 |
} |
879 |
|
880 |
static inline void tcg_gen_mul_i64(TCGv ret, TCGv arg1, TCGv arg2) |
881 |
{ |
882 |
tcg_gen_op3(INDEX_op_mul_i64, ret, arg1, arg2); |
883 |
} |
884 |
|
885 |
#ifdef TCG_TARGET_HAS_div_i64
|
886 |
static inline void tcg_gen_div_i64(TCGv ret, TCGv arg1, TCGv arg2) |
887 |
{ |
888 |
tcg_gen_op3(INDEX_op_div_i64, ret, arg1, arg2); |
889 |
} |
890 |
|
891 |
static inline void tcg_gen_rem_i64(TCGv ret, TCGv arg1, TCGv arg2) |
892 |
{ |
893 |
tcg_gen_op3(INDEX_op_rem_i64, ret, arg1, arg2); |
894 |
} |
895 |
|
896 |
static inline void tcg_gen_divu_i64(TCGv ret, TCGv arg1, TCGv arg2) |
897 |
{ |
898 |
tcg_gen_op3(INDEX_op_divu_i64, ret, arg1, arg2); |
899 |
} |
900 |
|
901 |
static inline void tcg_gen_remu_i64(TCGv ret, TCGv arg1, TCGv arg2) |
902 |
{ |
903 |
tcg_gen_op3(INDEX_op_remu_i64, ret, arg1, arg2); |
904 |
} |
905 |
#else
|
906 |
static inline void tcg_gen_div_i64(TCGv ret, TCGv arg1, TCGv arg2) |
907 |
{ |
908 |
TCGv t0; |
909 |
t0 = tcg_temp_new(TCG_TYPE_I64); |
910 |
tcg_gen_sari_i64(t0, arg1, 63);
|
911 |
tcg_gen_op5(INDEX_op_div2_i64, ret, t0, arg1, t0, arg2); |
912 |
} |
913 |
|
914 |
static inline void tcg_gen_rem_i64(TCGv ret, TCGv arg1, TCGv arg2) |
915 |
{ |
916 |
TCGv t0; |
917 |
t0 = tcg_temp_new(TCG_TYPE_I64); |
918 |
tcg_gen_sari_i64(t0, arg1, 63);
|
919 |
tcg_gen_op5(INDEX_op_div2_i64, t0, ret, arg1, t0, arg2); |
920 |
} |
921 |
|
922 |
static inline void tcg_gen_divu_i64(TCGv ret, TCGv arg1, TCGv arg2) |
923 |
{ |
924 |
TCGv t0; |
925 |
t0 = tcg_temp_new(TCG_TYPE_I64); |
926 |
tcg_gen_movi_i64(t0, 0);
|
927 |
tcg_gen_op5(INDEX_op_divu2_i64, ret, t0, arg1, t0, arg2); |
928 |
} |
929 |
|
930 |
static inline void tcg_gen_remu_i64(TCGv ret, TCGv arg1, TCGv arg2) |
931 |
{ |
932 |
TCGv t0; |
933 |
t0 = tcg_temp_new(TCG_TYPE_I64); |
934 |
tcg_gen_movi_i64(t0, 0);
|
935 |
tcg_gen_op5(INDEX_op_divu2_i64, t0, ret, arg1, t0, arg2); |
936 |
} |
937 |
#endif
|
938 |
|
939 |
#endif
|
940 |
|
941 |
/***************************************/
|
942 |
/* optional operations */
|
943 |
|
944 |
static inline void tcg_gen_ext8s_i32(TCGv ret, TCGv arg) |
945 |
{ |
946 |
#ifdef TCG_TARGET_HAS_ext8s_i32
|
947 |
tcg_gen_op2(INDEX_op_ext8s_i32, ret, arg); |
948 |
#else
|
949 |
tcg_gen_shli_i32(ret, arg, 24);
|
950 |
tcg_gen_sari_i32(ret, ret, 24);
|
951 |
#endif
|
952 |
} |
953 |
|
954 |
static inline void tcg_gen_ext16s_i32(TCGv ret, TCGv arg) |
955 |
{ |
956 |
#ifdef TCG_TARGET_HAS_ext16s_i32
|
957 |
tcg_gen_op2(INDEX_op_ext16s_i32, ret, arg); |
958 |
#else
|
959 |
tcg_gen_shli_i32(ret, arg, 16);
|
960 |
tcg_gen_sari_i32(ret, ret, 16);
|
961 |
#endif
|
962 |
} |
963 |
|
964 |
/* Note: we assume the two high bytes are set to zero */
|
965 |
static inline void tcg_gen_bswap16_i32(TCGv ret, TCGv arg) |
966 |
{ |
967 |
#ifdef TCG_TARGET_HAS_bswap16_i32
|
968 |
tcg_gen_op2(INDEX_op_bswap16_i32, ret, arg); |
969 |
#else
|
970 |
TCGv t0, t1; |
971 |
t0 = tcg_temp_new(TCG_TYPE_I32); |
972 |
t1 = tcg_temp_new(TCG_TYPE_I32); |
973 |
|
974 |
tcg_gen_shri_i32(t0, arg, 8);
|
975 |
tcg_gen_andi_i32(t1, arg, 0x000000ff);
|
976 |
tcg_gen_shli_i32(t1, t1, 8);
|
977 |
tcg_gen_or_i32(ret, t0, t1); |
978 |
#endif
|
979 |
} |
980 |
|
981 |
static inline void tcg_gen_bswap_i32(TCGv ret, TCGv arg) |
982 |
{ |
983 |
#ifdef TCG_TARGET_HAS_bswap_i32
|
984 |
tcg_gen_op2(INDEX_op_bswap_i32, ret, arg); |
985 |
#else
|
986 |
TCGv t0, t1; |
987 |
t0 = tcg_temp_new(TCG_TYPE_I32); |
988 |
t1 = tcg_temp_new(TCG_TYPE_I32); |
989 |
|
990 |
tcg_gen_shli_i32(t0, arg, 24);
|
991 |
|
992 |
tcg_gen_andi_i32(t1, arg, 0x0000ff00);
|
993 |
tcg_gen_shli_i32(t1, t1, 8);
|
994 |
tcg_gen_or_i32(t0, t0, t1); |
995 |
|
996 |
tcg_gen_shri_i32(t1, arg, 8);
|
997 |
tcg_gen_andi_i32(t1, t1, 0x0000ff00);
|
998 |
tcg_gen_or_i32(t0, t0, t1); |
999 |
|
1000 |
tcg_gen_shri_i32(t1, arg, 24);
|
1001 |
tcg_gen_or_i32(ret, t0, t1); |
1002 |
#endif
|
1003 |
} |
1004 |
|
1005 |
#if TCG_TARGET_REG_BITS == 32 |
1006 |
static inline void tcg_gen_ext8s_i64(TCGv ret, TCGv arg) |
1007 |
{ |
1008 |
tcg_gen_ext8s_i32(ret, arg); |
1009 |
tcg_gen_sari_i32(TCGV_HIGH(ret), ret, 31);
|
1010 |
} |
1011 |
|
1012 |
static inline void tcg_gen_ext16s_i64(TCGv ret, TCGv arg) |
1013 |
{ |
1014 |
tcg_gen_ext16s_i32(ret, arg); |
1015 |
tcg_gen_sari_i32(TCGV_HIGH(ret), ret, 31);
|
1016 |
} |
1017 |
|
1018 |
static inline void tcg_gen_ext32s_i64(TCGv ret, TCGv arg) |
1019 |
{ |
1020 |
tcg_gen_mov_i32(ret, arg); |
1021 |
tcg_gen_sari_i32(TCGV_HIGH(ret), ret, 31);
|
1022 |
} |
1023 |
|
1024 |
static inline void tcg_gen_trunc_i64_i32(TCGv ret, TCGv arg) |
1025 |
{ |
1026 |
tcg_gen_mov_i32(ret, arg); |
1027 |
} |
1028 |
|
1029 |
static inline void tcg_gen_extu_i32_i64(TCGv ret, TCGv arg) |
1030 |
{ |
1031 |
tcg_gen_mov_i32(ret, arg); |
1032 |
tcg_gen_movi_i32(TCGV_HIGH(ret), 0);
|
1033 |
} |
1034 |
|
1035 |
static inline void tcg_gen_ext_i32_i64(TCGv ret, TCGv arg) |
1036 |
{ |
1037 |
tcg_gen_mov_i32(ret, arg); |
1038 |
tcg_gen_sari_i32(TCGV_HIGH(ret), ret, 31);
|
1039 |
} |
1040 |
|
1041 |
static inline void tcg_gen_bswap_i64(TCGv ret, TCGv arg) |
1042 |
{ |
1043 |
TCGv t0, t1; |
1044 |
t0 = tcg_temp_new(TCG_TYPE_I32); |
1045 |
t1 = tcg_temp_new(TCG_TYPE_I32); |
1046 |
|
1047 |
tcg_gen_bswap_i32(t0, arg); |
1048 |
tcg_gen_bswap_i32(t1, TCGV_HIGH(arg)); |
1049 |
tcg_gen_mov_i32(ret, t1); |
1050 |
tcg_gen_mov_i32(TCGV_HIGH(ret), t0); |
1051 |
} |
1052 |
#else
|
1053 |
|
1054 |
static inline void tcg_gen_ext8s_i64(TCGv ret, TCGv arg) |
1055 |
{ |
1056 |
#ifdef TCG_TARGET_HAS_ext8s_i64
|
1057 |
tcg_gen_op2(INDEX_op_ext8s_i64, ret, arg); |
1058 |
#else
|
1059 |
tcg_gen_shli_i64(ret, arg, 56);
|
1060 |
tcg_gen_sari_i64(ret, ret, 56);
|
1061 |
#endif
|
1062 |
} |
1063 |
|
1064 |
static inline void tcg_gen_ext16s_i64(TCGv ret, TCGv arg) |
1065 |
{ |
1066 |
#ifdef TCG_TARGET_HAS_ext16s_i64
|
1067 |
tcg_gen_op2(INDEX_op_ext16s_i64, ret, arg); |
1068 |
#else
|
1069 |
tcg_gen_shli_i64(ret, arg, 48);
|
1070 |
tcg_gen_sari_i64(ret, ret, 48);
|
1071 |
#endif
|
1072 |
} |
1073 |
|
1074 |
static inline void tcg_gen_ext32s_i64(TCGv ret, TCGv arg) |
1075 |
{ |
1076 |
#ifdef TCG_TARGET_HAS_ext32s_i64
|
1077 |
tcg_gen_op2(INDEX_op_ext32s_i64, ret, arg); |
1078 |
#else
|
1079 |
tcg_gen_shli_i64(ret, arg, 32);
|
1080 |
tcg_gen_sari_i64(ret, ret, 32);
|
1081 |
#endif
|
1082 |
} |
1083 |
|
1084 |
/* Note: we assume the target supports move between 32 and 64 bit
|
1085 |
registers. This will probably break MIPS64 targets. */
|
1086 |
static inline void tcg_gen_trunc_i64_i32(TCGv ret, TCGv arg) |
1087 |
{ |
1088 |
tcg_gen_mov_i32(ret, arg); |
1089 |
} |
1090 |
|
1091 |
/* Note: we assume the target supports move between 32 and 64 bit
|
1092 |
registers */
|
1093 |
static inline void tcg_gen_extu_i32_i64(TCGv ret, TCGv arg) |
1094 |
{ |
1095 |
tcg_gen_andi_i64(ret, arg, 0xffffffff);
|
1096 |
} |
1097 |
|
1098 |
/* Note: we assume the target supports move between 32 and 64 bit
|
1099 |
registers */
|
1100 |
static inline void tcg_gen_ext_i32_i64(TCGv ret, TCGv arg) |
1101 |
{ |
1102 |
tcg_gen_ext32s_i64(ret, arg); |
1103 |
} |
1104 |
|
1105 |
static inline void tcg_gen_bswap_i64(TCGv ret, TCGv arg) |
1106 |
{ |
1107 |
#ifdef TCG_TARGET_HAS_bswap_i64
|
1108 |
tcg_gen_op2(INDEX_op_bswap_i64, ret, arg); |
1109 |
#else
|
1110 |
TCGv t0, t1; |
1111 |
t0 = tcg_temp_new(TCG_TYPE_I32); |
1112 |
t1 = tcg_temp_new(TCG_TYPE_I32); |
1113 |
|
1114 |
tcg_gen_shli_i64(t0, arg, 56);
|
1115 |
|
1116 |
tcg_gen_andi_i64(t1, arg, 0x0000ff00);
|
1117 |
tcg_gen_shli_i64(t1, t1, 40);
|
1118 |
tcg_gen_or_i64(t0, t0, t1); |
1119 |
|
1120 |
tcg_gen_andi_i64(t1, arg, 0x00ff0000);
|
1121 |
tcg_gen_shli_i64(t1, t1, 24);
|
1122 |
tcg_gen_or_i64(t0, t0, t1); |
1123 |
|
1124 |
tcg_gen_andi_i64(t1, arg, 0xff000000);
|
1125 |
tcg_gen_shli_i64(t1, t1, 8);
|
1126 |
tcg_gen_or_i64(t0, t0, t1); |
1127 |
|
1128 |
tcg_gen_shri_i64(t1, arg, 8);
|
1129 |
tcg_gen_andi_i64(t1, t1, 0xff000000);
|
1130 |
tcg_gen_or_i64(t0, t0, t1); |
1131 |
|
1132 |
tcg_gen_shri_i64(t1, arg, 24);
|
1133 |
tcg_gen_andi_i64(t1, t1, 0x00ff0000);
|
1134 |
tcg_gen_or_i64(t0, t0, t1); |
1135 |
|
1136 |
tcg_gen_shri_i64(t1, arg, 40);
|
1137 |
tcg_gen_andi_i64(t1, t1, 0x0000ff00);
|
1138 |
tcg_gen_or_i64(t0, t0, t1); |
1139 |
|
1140 |
tcg_gen_shri_i64(t1, arg, 56);
|
1141 |
tcg_gen_or_i64(ret, t0, t1); |
1142 |
#endif
|
1143 |
} |
1144 |
|
1145 |
#endif
|
1146 |
|
1147 |
|
1148 |
static inline void tcg_gen_discard_i32(TCGv arg) |
1149 |
{ |
1150 |
tcg_gen_op1(INDEX_op_discard, arg); |
1151 |
} |
1152 |
|
1153 |
#if TCG_TARGET_REG_BITS == 32 |
1154 |
static inline void tcg_gen_discard_i64(TCGv arg) |
1155 |
{ |
1156 |
tcg_gen_discard_i32(arg); |
1157 |
tcg_gen_discard_i32(TCGV_HIGH(arg)); |
1158 |
} |
1159 |
#else
|
1160 |
static inline void tcg_gen_discard_i64(TCGv arg) |
1161 |
{ |
1162 |
tcg_gen_op1(INDEX_op_discard, arg); |
1163 |
} |
1164 |
#endif
|
1165 |
|
1166 |
/***************************************/
|
1167 |
static inline void tcg_gen_macro_2(TCGv ret0, TCGv ret1, int macro_id) |
1168 |
{ |
1169 |
tcg_gen_op3i(INDEX_op_macro_2, ret0, ret1, macro_id); |
1170 |
} |
1171 |
|
1172 |
/***************************************/
|
1173 |
/* QEMU specific operations. Their type depend on the QEMU CPU
|
1174 |
type. */
|
1175 |
#ifndef TARGET_LONG_BITS
|
1176 |
#error must include QEMU headers
|
1177 |
#endif
|
1178 |
|
1179 |
static inline void tcg_gen_exit_tb(tcg_target_long val) |
1180 |
{ |
1181 |
tcg_gen_op1i(INDEX_op_exit_tb, val); |
1182 |
} |
1183 |
|
1184 |
static inline void tcg_gen_goto_tb(int idx) |
1185 |
{ |
1186 |
tcg_gen_op1i(INDEX_op_goto_tb, idx); |
1187 |
} |
1188 |
|
1189 |
#if TCG_TARGET_REG_BITS == 32 |
1190 |
static inline void tcg_gen_qemu_ld8u(TCGv ret, TCGv addr, int mem_index) |
1191 |
{ |
1192 |
#if TARGET_LONG_BITS == 32 |
1193 |
tcg_gen_op3i(INDEX_op_qemu_ld8u, ret, addr, mem_index); |
1194 |
#else
|
1195 |
tcg_gen_op4i(INDEX_op_qemu_ld8u, ret, addr, TCGV_HIGH(addr), mem_index); |
1196 |
tcg_gen_movi_i32(TCGV_HIGH(ret), 0);
|
1197 |
#endif
|
1198 |
} |
1199 |
|
1200 |
static inline void tcg_gen_qemu_ld8s(TCGv ret, TCGv addr, int mem_index) |
1201 |
{ |
1202 |
#if TARGET_LONG_BITS == 32 |
1203 |
tcg_gen_op3i(INDEX_op_qemu_ld8s, ret, addr, mem_index); |
1204 |
#else
|
1205 |
tcg_gen_op4i(INDEX_op_qemu_ld8s, ret, addr, TCGV_HIGH(addr), mem_index); |
1206 |
tcg_gen_sari_i32(TCGV_HIGH(ret), ret, 31);
|
1207 |
#endif
|
1208 |
} |
1209 |
|
1210 |
static inline void tcg_gen_qemu_ld16u(TCGv ret, TCGv addr, int mem_index) |
1211 |
{ |
1212 |
#if TARGET_LONG_BITS == 32 |
1213 |
tcg_gen_op3i(INDEX_op_qemu_ld16u, ret, addr, mem_index); |
1214 |
#else
|
1215 |
tcg_gen_op4i(INDEX_op_qemu_ld16u, ret, addr, TCGV_HIGH(addr), mem_index); |
1216 |
tcg_gen_movi_i32(TCGV_HIGH(ret), 0);
|
1217 |
#endif
|
1218 |
} |
1219 |
|
1220 |
static inline void tcg_gen_qemu_ld16s(TCGv ret, TCGv addr, int mem_index) |
1221 |
{ |
1222 |
#if TARGET_LONG_BITS == 32 |
1223 |
tcg_gen_op3i(INDEX_op_qemu_ld16s, ret, addr, mem_index); |
1224 |
#else
|
1225 |
tcg_gen_op4i(INDEX_op_qemu_ld16s, ret, addr, TCGV_HIGH(addr), mem_index); |
1226 |
tcg_gen_sari_i32(TCGV_HIGH(ret), ret, 31);
|
1227 |
#endif
|
1228 |
} |
1229 |
|
1230 |
static inline void tcg_gen_qemu_ld32u(TCGv ret, TCGv addr, int mem_index) |
1231 |
{ |
1232 |
#if TARGET_LONG_BITS == 32 |
1233 |
tcg_gen_op3i(INDEX_op_qemu_ld32u, ret, addr, mem_index); |
1234 |
#else
|
1235 |
tcg_gen_op4i(INDEX_op_qemu_ld32u, ret, addr, TCGV_HIGH(addr), mem_index); |
1236 |
tcg_gen_movi_i32(TCGV_HIGH(ret), 0);
|
1237 |
#endif
|
1238 |
} |
1239 |
|
1240 |
static inline void tcg_gen_qemu_ld32s(TCGv ret, TCGv addr, int mem_index) |
1241 |
{ |
1242 |
#if TARGET_LONG_BITS == 32 |
1243 |
tcg_gen_op3i(INDEX_op_qemu_ld32u, ret, addr, mem_index); |
1244 |
#else
|
1245 |
tcg_gen_op4i(INDEX_op_qemu_ld32u, ret, addr, TCGV_HIGH(addr), mem_index); |
1246 |
tcg_gen_sari_i32(TCGV_HIGH(ret), ret, 31);
|
1247 |
#endif
|
1248 |
} |
1249 |
|
1250 |
static inline void tcg_gen_qemu_ld64(TCGv ret, TCGv addr, int mem_index) |
1251 |
{ |
1252 |
#if TARGET_LONG_BITS == 32 |
1253 |
tcg_gen_op4i(INDEX_op_qemu_ld64, ret, TCGV_HIGH(ret), addr, mem_index); |
1254 |
#else
|
1255 |
tcg_gen_op5i(INDEX_op_qemu_ld64, ret, TCGV_HIGH(ret), |
1256 |
addr, TCGV_HIGH(addr), mem_index); |
1257 |
#endif
|
1258 |
} |
1259 |
|
1260 |
static inline void tcg_gen_qemu_st8(TCGv arg, TCGv addr, int mem_index) |
1261 |
{ |
1262 |
#if TARGET_LONG_BITS == 32 |
1263 |
tcg_gen_op3i(INDEX_op_qemu_st8, arg, addr, mem_index); |
1264 |
#else
|
1265 |
tcg_gen_op4i(INDEX_op_qemu_st8, arg, addr, TCGV_HIGH(addr), mem_index); |
1266 |
#endif
|
1267 |
} |
1268 |
|
1269 |
static inline void tcg_gen_qemu_st16(TCGv arg, TCGv addr, int mem_index) |
1270 |
{ |
1271 |
#if TARGET_LONG_BITS == 32 |
1272 |
tcg_gen_op3i(INDEX_op_qemu_st16, arg, addr, mem_index); |
1273 |
#else
|
1274 |
tcg_gen_op4i(INDEX_op_qemu_st16, arg, addr, TCGV_HIGH(addr), mem_index); |
1275 |
#endif
|
1276 |
} |
1277 |
|
1278 |
static inline void tcg_gen_qemu_st32(TCGv arg, TCGv addr, int mem_index) |
1279 |
{ |
1280 |
#if TARGET_LONG_BITS == 32 |
1281 |
tcg_gen_op3i(INDEX_op_qemu_st32, arg, addr, mem_index); |
1282 |
#else
|
1283 |
tcg_gen_op4i(INDEX_op_qemu_st32, arg, addr, TCGV_HIGH(addr), mem_index); |
1284 |
#endif
|
1285 |
} |
1286 |
|
1287 |
static inline void tcg_gen_qemu_st64(TCGv arg, TCGv addr, int mem_index) |
1288 |
{ |
1289 |
#if TARGET_LONG_BITS == 32 |
1290 |
tcg_gen_op4i(INDEX_op_qemu_st64, arg, TCGV_HIGH(arg), addr, mem_index); |
1291 |
#else
|
1292 |
tcg_gen_op5i(INDEX_op_qemu_st64, arg, TCGV_HIGH(arg), |
1293 |
addr, TCGV_HIGH(addr), mem_index); |
1294 |
#endif
|
1295 |
} |
1296 |
|
1297 |
#define tcg_gen_ld_ptr tcg_gen_ld_i32
|
1298 |
#define tcg_gen_discard_ptr tcg_gen_discard_i32
|
1299 |
|
1300 |
#else /* TCG_TARGET_REG_BITS == 32 */ |
1301 |
|
1302 |
static inline void tcg_gen_qemu_ld8u(TCGv ret, TCGv addr, int mem_index) |
1303 |
{ |
1304 |
tcg_gen_op3i(INDEX_op_qemu_ld8u, ret, addr, mem_index); |
1305 |
} |
1306 |
|
1307 |
static inline void tcg_gen_qemu_ld8s(TCGv ret, TCGv addr, int mem_index) |
1308 |
{ |
1309 |
tcg_gen_op3i(INDEX_op_qemu_ld8s, ret, addr, mem_index); |
1310 |
} |
1311 |
|
1312 |
static inline void tcg_gen_qemu_ld16u(TCGv ret, TCGv addr, int mem_index) |
1313 |
{ |
1314 |
tcg_gen_op3i(INDEX_op_qemu_ld16u, ret, addr, mem_index); |
1315 |
} |
1316 |
|
1317 |
static inline void tcg_gen_qemu_ld16s(TCGv ret, TCGv addr, int mem_index) |
1318 |
{ |
1319 |
tcg_gen_op3i(INDEX_op_qemu_ld16s, ret, addr, mem_index); |
1320 |
} |
1321 |
|
1322 |
static inline void tcg_gen_qemu_ld32u(TCGv ret, TCGv addr, int mem_index) |
1323 |
{ |
1324 |
tcg_gen_op3i(INDEX_op_qemu_ld32u, ret, addr, mem_index); |
1325 |
} |
1326 |
|
1327 |
static inline void tcg_gen_qemu_ld32s(TCGv ret, TCGv addr, int mem_index) |
1328 |
{ |
1329 |
tcg_gen_op3i(INDEX_op_qemu_ld32s, ret, addr, mem_index); |
1330 |
} |
1331 |
|
1332 |
static inline void tcg_gen_qemu_ld64(TCGv ret, TCGv addr, int mem_index) |
1333 |
{ |
1334 |
tcg_gen_op3i(INDEX_op_qemu_ld64, ret, addr, mem_index); |
1335 |
} |
1336 |
|
1337 |
static inline void tcg_gen_qemu_st8(TCGv arg, TCGv addr, int mem_index) |
1338 |
{ |
1339 |
tcg_gen_op3i(INDEX_op_qemu_st8, arg, addr, mem_index); |
1340 |
} |
1341 |
|
1342 |
static inline void tcg_gen_qemu_st16(TCGv arg, TCGv addr, int mem_index) |
1343 |
{ |
1344 |
tcg_gen_op3i(INDEX_op_qemu_st16, arg, addr, mem_index); |
1345 |
} |
1346 |
|
1347 |
static inline void tcg_gen_qemu_st32(TCGv arg, TCGv addr, int mem_index) |
1348 |
{ |
1349 |
tcg_gen_op3i(INDEX_op_qemu_st32, arg, addr, mem_index); |
1350 |
} |
1351 |
|
1352 |
static inline void tcg_gen_qemu_st64(TCGv arg, TCGv addr, int mem_index) |
1353 |
{ |
1354 |
tcg_gen_op3i(INDEX_op_qemu_st64, arg, addr, mem_index); |
1355 |
} |
1356 |
|
1357 |
#define tcg_gen_ld_ptr tcg_gen_ld_i64
|
1358 |
#define tcg_gen_discard_ptr tcg_gen_discard_i64
|
1359 |
|
1360 |
#endif /* TCG_TARGET_REG_BITS != 32 */ |
1361 |
|
1362 |
#if TARGET_LONG_BITS == 64 |
1363 |
#define TCG_TYPE_TL TCG_TYPE_I64
|
1364 |
#define tcg_gen_movi_tl tcg_gen_movi_i64
|
1365 |
#define tcg_gen_mov_tl tcg_gen_mov_i64
|
1366 |
#define tcg_gen_ld8u_tl tcg_gen_ld8u_i64
|
1367 |
#define tcg_gen_ld8s_tl tcg_gen_ld8s_i64
|
1368 |
#define tcg_gen_ld16u_tl tcg_gen_ld16u_i64
|
1369 |
#define tcg_gen_ld16s_tl tcg_gen_ld16s_i64
|
1370 |
#define tcg_gen_ld32u_tl tcg_gen_ld32u_i64
|
1371 |
#define tcg_gen_ld32s_tl tcg_gen_ld32s_i64
|
1372 |
#define tcg_gen_ld_tl tcg_gen_ld_i64
|
1373 |
#define tcg_gen_st8_tl tcg_gen_st8_i64
|
1374 |
#define tcg_gen_st16_tl tcg_gen_st16_i64
|
1375 |
#define tcg_gen_st32_tl tcg_gen_st32_i64
|
1376 |
#define tcg_gen_st_tl tcg_gen_st_i64
|
1377 |
#define tcg_gen_add_tl tcg_gen_add_i64
|
1378 |
#define tcg_gen_addi_tl tcg_gen_addi_i64
|
1379 |
#define tcg_gen_sub_tl tcg_gen_sub_i64
|
1380 |
#define tcg_gen_subi_tl tcg_gen_subi_i64
|
1381 |
#define tcg_gen_and_tl tcg_gen_and_i64
|
1382 |
#define tcg_gen_andi_tl tcg_gen_andi_i64
|
1383 |
#define tcg_gen_or_tl tcg_gen_or_i64
|
1384 |
#define tcg_gen_ori_tl tcg_gen_ori_i64
|
1385 |
#define tcg_gen_xor_tl tcg_gen_xor_i64
|
1386 |
#define tcg_gen_xori_tl tcg_gen_xori_i64
|
1387 |
#define tcg_gen_shl_tl tcg_gen_shl_i64
|
1388 |
#define tcg_gen_shli_tl tcg_gen_shli_i64
|
1389 |
#define tcg_gen_shr_tl tcg_gen_shr_i64
|
1390 |
#define tcg_gen_shri_tl tcg_gen_shri_i64
|
1391 |
#define tcg_gen_sar_tl tcg_gen_sar_i64
|
1392 |
#define tcg_gen_sari_tl tcg_gen_sari_i64
|
1393 |
#define tcg_gen_brcond_tl tcg_gen_brcond_i64
|
1394 |
#define tcg_gen_discard_tl tcg_gen_discard_i64
|
1395 |
#define tcg_gen_trunc_tl_i32 tcg_gen_trunc_i64_i32
|
1396 |
#define tcg_gen_trunc_i64_tl tcg_gen_mov_i64
|
1397 |
#define tcg_gen_extu_i32_tl tcg_gen_extu_i32_i64
|
1398 |
#define tcg_gen_ext_i32_tl tcg_gen_ext_i32_i64
|
1399 |
#define tcg_gen_extu_tl_i64 tcg_gen_mov_i64
|
1400 |
#define tcg_gen_ext_tl_i64 tcg_gen_mov_i64
|
1401 |
#define tcg_const_tl tcg_const_i64
|
1402 |
#else
|
1403 |
#define TCG_TYPE_TL TCG_TYPE_I32
|
1404 |
#define tcg_gen_movi_tl tcg_gen_movi_i32
|
1405 |
#define tcg_gen_mov_tl tcg_gen_mov_i32
|
1406 |
#define tcg_gen_ld8u_tl tcg_gen_ld8u_i32
|
1407 |
#define tcg_gen_ld8s_tl tcg_gen_ld8s_i32
|
1408 |
#define tcg_gen_ld16u_tl tcg_gen_ld16u_i32
|
1409 |
#define tcg_gen_ld16s_tl tcg_gen_ld16s_i32
|
1410 |
#define tcg_gen_ld32u_tl tcg_gen_ld_i32
|
1411 |
#define tcg_gen_ld32s_tl tcg_gen_ld_i32
|
1412 |
#define tcg_gen_ld_tl tcg_gen_ld_i32
|
1413 |
#define tcg_gen_st8_tl tcg_gen_st8_i32
|
1414 |
#define tcg_gen_st16_tl tcg_gen_st16_i32
|
1415 |
#define tcg_gen_st32_tl tcg_gen_st_i32
|
1416 |
#define tcg_gen_st_tl tcg_gen_st_i32
|
1417 |
#define tcg_gen_add_tl tcg_gen_add_i32
|
1418 |
#define tcg_gen_addi_tl tcg_gen_addi_i32
|
1419 |
#define tcg_gen_sub_tl tcg_gen_sub_i32
|
1420 |
#define tcg_gen_subi_tl tcg_gen_subi_i32
|
1421 |
#define tcg_gen_and_tl tcg_gen_and_i32
|
1422 |
#define tcg_gen_andi_tl tcg_gen_andi_i32
|
1423 |
#define tcg_gen_or_tl tcg_gen_or_i32
|
1424 |
#define tcg_gen_ori_tl tcg_gen_ori_i32
|
1425 |
#define tcg_gen_xor_tl tcg_gen_xor_i32
|
1426 |
#define tcg_gen_xori_tl tcg_gen_xori_i32
|
1427 |
#define tcg_gen_shl_tl tcg_gen_shl_i32
|
1428 |
#define tcg_gen_shli_tl tcg_gen_shli_i32
|
1429 |
#define tcg_gen_shr_tl tcg_gen_shr_i32
|
1430 |
#define tcg_gen_shri_tl tcg_gen_shri_i32
|
1431 |
#define tcg_gen_sar_tl tcg_gen_sar_i32
|
1432 |
#define tcg_gen_sari_tl tcg_gen_sari_i32
|
1433 |
#define tcg_gen_brcond_tl tcg_gen_brcond_i32
|
1434 |
#define tcg_gen_discard_tl tcg_gen_discard_i32
|
1435 |
#define tcg_gen_trunc_tl_i32 tcg_gen_mov_i32
|
1436 |
#define tcg_gen_trunc_i64_tl tcg_gen_trunc_i64_i32
|
1437 |
#define tcg_gen_extu_i32_tl tcg_gen_mov_i32
|
1438 |
#define tcg_gen_ext_i32_tl tcg_gen_mov_i32
|
1439 |
#define tcg_gen_extu_tl_i64 tcg_gen_extu_i32_i64
|
1440 |
#define tcg_gen_ext_tl_i64 tcg_gen_ext_i32_i64
|
1441 |
#define tcg_const_tl tcg_const_i32
|
1442 |
#endif
|
1443 |
|
1444 |
#if TCG_TARGET_REG_BITS == 32 |
1445 |
#define tcg_gen_addi_ptr tcg_gen_addi_i32
|
1446 |
#else /* TCG_TARGET_REG_BITS == 32 */ |
1447 |
#define tcg_gen_addi_ptr tcg_gen_addi_i64
|
1448 |
#endif /* TCG_TARGET_REG_BITS != 32 */ |
1449 |
|