root / hw / unin_pci.c @ 67d4b0c1
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1 | 502a5395 | pbrook | /*
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2 | 502a5395 | pbrook | * QEMU Uninorth PCI host (for all Mac99 and newer machines)
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3 | 502a5395 | pbrook | *
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4 | 502a5395 | pbrook | * Copyright (c) 2006 Fabrice Bellard
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5 | 5fafdf24 | ths | *
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6 | 502a5395 | pbrook | * Permission is hereby granted, free of charge, to any person obtaining a copy
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7 | 502a5395 | pbrook | * of this software and associated documentation files (the "Software"), to deal
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8 | 502a5395 | pbrook | * in the Software without restriction, including without limitation the rights
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9 | 502a5395 | pbrook | * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
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10 | 502a5395 | pbrook | * copies of the Software, and to permit persons to whom the Software is
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11 | 502a5395 | pbrook | * furnished to do so, subject to the following conditions:
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12 | 502a5395 | pbrook | *
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13 | 502a5395 | pbrook | * The above copyright notice and this permission notice shall be included in
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14 | 502a5395 | pbrook | * all copies or substantial portions of the Software.
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15 | 502a5395 | pbrook | *
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16 | 502a5395 | pbrook | * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
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17 | 502a5395 | pbrook | * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
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18 | 502a5395 | pbrook | * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
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19 | 502a5395 | pbrook | * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
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20 | 502a5395 | pbrook | * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
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21 | 502a5395 | pbrook | * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
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22 | 502a5395 | pbrook | * THE SOFTWARE.
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23 | 502a5395 | pbrook | */
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24 | 87ecb68b | pbrook | #include "hw.h" |
25 | 87ecb68b | pbrook | #include "ppc_mac.h" |
26 | 87ecb68b | pbrook | #include "pci.h" |
27 | 4f5e19e6 | Isaku Yamahata | #include "pci_host.h" |
28 | 87ecb68b | pbrook | |
29 | f3902383 | blueswir1 | /* debug UniNorth */
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30 | f3902383 | blueswir1 | //#define DEBUG_UNIN
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31 | f3902383 | blueswir1 | |
32 | f3902383 | blueswir1 | #ifdef DEBUG_UNIN
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33 | 001faf32 | Blue Swirl | #define UNIN_DPRINTF(fmt, ...) \
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34 | 001faf32 | Blue Swirl | do { printf("UNIN: " fmt , ## __VA_ARGS__); } while (0) |
35 | f3902383 | blueswir1 | #else
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36 | 001faf32 | Blue Swirl | #define UNIN_DPRINTF(fmt, ...)
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37 | f3902383 | blueswir1 | #endif
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38 | f3902383 | blueswir1 | |
39 | fa0be69a | Alexander Graf | static const int unin_irq_line[] = { 0x1b, 0x1c, 0x1d, 0x1e }; |
40 | fa0be69a | Alexander Graf | |
41 | 2e29bd04 | Blue Swirl | typedef struct UNINState { |
42 | 2e29bd04 | Blue Swirl | SysBusDevice busdev; |
43 | 2e29bd04 | Blue Swirl | PCIHostState host_state; |
44 | d86f0e32 | Alexander Graf | ReadWriteHandler data_handler; |
45 | 2e29bd04 | Blue Swirl | } UNINState; |
46 | 502a5395 | pbrook | |
47 | d2b59317 | pbrook | static int pci_unin_map_irq(PCIDevice *pci_dev, int irq_num) |
48 | 502a5395 | pbrook | { |
49 | fa0be69a | Alexander Graf | int retval;
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50 | fa0be69a | Alexander Graf | int devfn = pci_dev->devfn & 0x00FFFFFF; |
51 | fa0be69a | Alexander Graf | |
52 | fa0be69a | Alexander Graf | retval = (((devfn >> 11) & 0x1F) + irq_num) & 3; |
53 | fa0be69a | Alexander Graf | |
54 | fa0be69a | Alexander Graf | return retval;
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55 | d2b59317 | pbrook | } |
56 | d2b59317 | pbrook | |
57 | 5d4e84c8 | Juan Quintela | static void pci_unin_set_irq(void *opaque, int irq_num, int level) |
58 | d2b59317 | pbrook | { |
59 | 5d4e84c8 | Juan Quintela | qemu_irq *pic = opaque; |
60 | 5d4e84c8 | Juan Quintela | |
61 | fa0be69a | Alexander Graf | UNIN_DPRINTF("%s: setting INT %d = %d\n", __func__,
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62 | fa0be69a | Alexander Graf | unin_irq_line[irq_num], level); |
63 | fa0be69a | Alexander Graf | qemu_set_irq(pic[unin_irq_line[irq_num]], level); |
64 | 502a5395 | pbrook | } |
65 | 502a5395 | pbrook | |
66 | f3902383 | blueswir1 | static void pci_unin_save(QEMUFile* f, void *opaque) |
67 | f3902383 | blueswir1 | { |
68 | f3902383 | blueswir1 | PCIDevice *d = opaque; |
69 | f3902383 | blueswir1 | |
70 | f3902383 | blueswir1 | pci_device_save(d, f); |
71 | f3902383 | blueswir1 | } |
72 | f3902383 | blueswir1 | |
73 | f3902383 | blueswir1 | static int pci_unin_load(QEMUFile* f, void *opaque, int version_id) |
74 | f3902383 | blueswir1 | { |
75 | f3902383 | blueswir1 | PCIDevice *d = opaque; |
76 | f3902383 | blueswir1 | |
77 | f3902383 | blueswir1 | if (version_id != 1) |
78 | f3902383 | blueswir1 | return -EINVAL;
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79 | f3902383 | blueswir1 | |
80 | f3902383 | blueswir1 | return pci_device_load(d, f);
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81 | f3902383 | blueswir1 | } |
82 | f3902383 | blueswir1 | |
83 | f3902383 | blueswir1 | static void pci_unin_reset(void *opaque) |
84 | f3902383 | blueswir1 | { |
85 | f3902383 | blueswir1 | } |
86 | f3902383 | blueswir1 | |
87 | d86f0e32 | Alexander Graf | static uint32_t unin_get_config_reg(uint32_t reg, uint32_t addr)
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88 | d86f0e32 | Alexander Graf | { |
89 | d86f0e32 | Alexander Graf | uint32_t retval; |
90 | d86f0e32 | Alexander Graf | |
91 | d86f0e32 | Alexander Graf | if (reg & (1u << 31)) { |
92 | d86f0e32 | Alexander Graf | /* XXX OpenBIOS compatibility hack */
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93 | d86f0e32 | Alexander Graf | retval = reg | (addr & 3);
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94 | d86f0e32 | Alexander Graf | } else if (reg & 1) { |
95 | d86f0e32 | Alexander Graf | /* CFA1 style */
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96 | d86f0e32 | Alexander Graf | retval = (reg & ~7u) | (addr & 7); |
97 | d86f0e32 | Alexander Graf | } else {
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98 | d86f0e32 | Alexander Graf | uint32_t slot, func; |
99 | d86f0e32 | Alexander Graf | |
100 | d86f0e32 | Alexander Graf | /* Grab CFA0 style values */
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101 | d86f0e32 | Alexander Graf | slot = ffs(reg & 0xfffff800) - 1; |
102 | d86f0e32 | Alexander Graf | func = (reg >> 8) & 7; |
103 | d86f0e32 | Alexander Graf | |
104 | d86f0e32 | Alexander Graf | /* ... and then convert them to x86 format */
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105 | d86f0e32 | Alexander Graf | /* config pointer */
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106 | d86f0e32 | Alexander Graf | retval = (reg & (0xff - 7)) | (addr & 7); |
107 | d86f0e32 | Alexander Graf | /* slot */
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108 | d86f0e32 | Alexander Graf | retval |= slot << 11;
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109 | d86f0e32 | Alexander Graf | /* fn */
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110 | d86f0e32 | Alexander Graf | retval |= func << 8;
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111 | d86f0e32 | Alexander Graf | } |
112 | d86f0e32 | Alexander Graf | |
113 | d86f0e32 | Alexander Graf | |
114 | d86f0e32 | Alexander Graf | UNIN_DPRINTF("Converted config space accessor %08x/%08x -> %08x\n",
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115 | d86f0e32 | Alexander Graf | reg, addr, retval); |
116 | d86f0e32 | Alexander Graf | |
117 | d86f0e32 | Alexander Graf | return retval;
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118 | d86f0e32 | Alexander Graf | } |
119 | d86f0e32 | Alexander Graf | |
120 | d86f0e32 | Alexander Graf | static void unin_data_write(ReadWriteHandler *handler, |
121 | d86f0e32 | Alexander Graf | pcibus_t addr, uint32_t val, int len)
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122 | d86f0e32 | Alexander Graf | { |
123 | d86f0e32 | Alexander Graf | UNINState *s = container_of(handler, UNINState, data_handler); |
124 | d86f0e32 | Alexander Graf | val = qemu_bswap_len(val, len); |
125 | d86f0e32 | Alexander Graf | UNIN_DPRINTF("write addr %" FMT_PCIBUS " len %d val %x\n", addr, len, val); |
126 | d86f0e32 | Alexander Graf | pci_data_write(s->host_state.bus, |
127 | d86f0e32 | Alexander Graf | unin_get_config_reg(s->host_state.config_reg, addr), |
128 | d86f0e32 | Alexander Graf | val, len); |
129 | d86f0e32 | Alexander Graf | } |
130 | d86f0e32 | Alexander Graf | |
131 | d86f0e32 | Alexander Graf | static uint32_t unin_data_read(ReadWriteHandler *handler,
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132 | d86f0e32 | Alexander Graf | pcibus_t addr, int len)
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133 | d86f0e32 | Alexander Graf | { |
134 | d86f0e32 | Alexander Graf | UNINState *s = container_of(handler, UNINState, data_handler); |
135 | d86f0e32 | Alexander Graf | uint32_t val; |
136 | d86f0e32 | Alexander Graf | |
137 | d86f0e32 | Alexander Graf | val = pci_data_read(s->host_state.bus, |
138 | d86f0e32 | Alexander Graf | unin_get_config_reg(s->host_state.config_reg, addr), |
139 | d86f0e32 | Alexander Graf | len); |
140 | d86f0e32 | Alexander Graf | UNIN_DPRINTF("read addr %" FMT_PCIBUS " len %d val %x\n", addr, len, val); |
141 | d86f0e32 | Alexander Graf | val = qemu_bswap_len(val, len); |
142 | d86f0e32 | Alexander Graf | return val;
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143 | d86f0e32 | Alexander Graf | } |
144 | d86f0e32 | Alexander Graf | |
145 | 81a322d4 | Gerd Hoffmann | static int pci_unin_main_init_device(SysBusDevice *dev) |
146 | 502a5395 | pbrook | { |
147 | 502a5395 | pbrook | UNINState *s; |
148 | 502a5395 | pbrook | int pci_mem_config, pci_mem_data;
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149 | 502a5395 | pbrook | |
150 | 502a5395 | pbrook | /* Use values found on a real PowerMac */
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151 | 502a5395 | pbrook | /* Uninorth main bus */
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152 | 2e29bd04 | Blue Swirl | s = FROM_SYSBUS(UNINState, dev); |
153 | 502a5395 | pbrook | |
154 | 952760bb | Blue Swirl | pci_mem_config = pci_host_conf_register_mmio(&s->host_state, 1);
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155 | d86f0e32 | Alexander Graf | s->data_handler.read = unin_data_read; |
156 | d86f0e32 | Alexander Graf | s->data_handler.write = unin_data_write; |
157 | d86f0e32 | Alexander Graf | pci_mem_data = cpu_register_io_memory_simple(&s->data_handler); |
158 | 2e29bd04 | Blue Swirl | sysbus_init_mmio(dev, 0x1000, pci_mem_config);
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159 | 2e29bd04 | Blue Swirl | sysbus_init_mmio(dev, 0x1000, pci_mem_data);
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160 | 2e29bd04 | Blue Swirl | |
161 | 0be71e32 | Alex Williamson | register_savevm(&dev->qdev, "uninorth", 0, 1, |
162 | 0be71e32 | Alex Williamson | pci_unin_save, pci_unin_load, &s->host_state); |
163 | 2e29bd04 | Blue Swirl | qemu_register_reset(pci_unin_reset, &s->host_state); |
164 | 81a322d4 | Gerd Hoffmann | return 0; |
165 | 2e29bd04 | Blue Swirl | } |
166 | 2e29bd04 | Blue Swirl | |
167 | 0f921197 | Alexander Graf | static int pci_u3_agp_init_device(SysBusDevice *dev) |
168 | 0f921197 | Alexander Graf | { |
169 | 0f921197 | Alexander Graf | UNINState *s; |
170 | 0f921197 | Alexander Graf | int pci_mem_config, pci_mem_data;
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171 | 0f921197 | Alexander Graf | |
172 | 0f921197 | Alexander Graf | /* Uninorth U3 AGP bus */
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173 | 0f921197 | Alexander Graf | s = FROM_SYSBUS(UNINState, dev); |
174 | 0f921197 | Alexander Graf | |
175 | 952760bb | Blue Swirl | pci_mem_config = pci_host_conf_register_mmio(&s->host_state, 1);
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176 | 0f921197 | Alexander Graf | s->data_handler.read = unin_data_read; |
177 | 0f921197 | Alexander Graf | s->data_handler.write = unin_data_write; |
178 | 0f921197 | Alexander Graf | pci_mem_data = cpu_register_io_memory_simple(&s->data_handler); |
179 | 0f921197 | Alexander Graf | sysbus_init_mmio(dev, 0x1000, pci_mem_config);
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180 | 0f921197 | Alexander Graf | sysbus_init_mmio(dev, 0x1000, pci_mem_data);
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181 | 0f921197 | Alexander Graf | |
182 | 0be71e32 | Alex Williamson | register_savevm(&dev->qdev, "uninorth", 0, 1, |
183 | 0be71e32 | Alex Williamson | pci_unin_save, pci_unin_load, &s->host_state); |
184 | 0f921197 | Alexander Graf | qemu_register_reset(pci_unin_reset, &s->host_state); |
185 | 0f921197 | Alexander Graf | |
186 | 0f921197 | Alexander Graf | return 0; |
187 | 0f921197 | Alexander Graf | } |
188 | 0f921197 | Alexander Graf | |
189 | 81a322d4 | Gerd Hoffmann | static int pci_unin_agp_init_device(SysBusDevice *dev) |
190 | 2e29bd04 | Blue Swirl | { |
191 | 2e29bd04 | Blue Swirl | UNINState *s; |
192 | 2e29bd04 | Blue Swirl | int pci_mem_config, pci_mem_data;
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193 | 2e29bd04 | Blue Swirl | |
194 | 2e29bd04 | Blue Swirl | /* Uninorth AGP bus */
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195 | 2e29bd04 | Blue Swirl | s = FROM_SYSBUS(UNINState, dev); |
196 | 2e29bd04 | Blue Swirl | |
197 | 952760bb | Blue Swirl | pci_mem_config = pci_host_conf_register_mmio(&s->host_state, 0);
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198 | 952760bb | Blue Swirl | pci_mem_data = pci_host_data_register_mmio(&s->host_state, 1);
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199 | 2e29bd04 | Blue Swirl | sysbus_init_mmio(dev, 0x1000, pci_mem_config);
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200 | 2e29bd04 | Blue Swirl | sysbus_init_mmio(dev, 0x1000, pci_mem_data);
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201 | 81a322d4 | Gerd Hoffmann | return 0; |
202 | 2e29bd04 | Blue Swirl | } |
203 | 2e29bd04 | Blue Swirl | |
204 | 81a322d4 | Gerd Hoffmann | static int pci_unin_internal_init_device(SysBusDevice *dev) |
205 | 2e29bd04 | Blue Swirl | { |
206 | 2e29bd04 | Blue Swirl | UNINState *s; |
207 | 2e29bd04 | Blue Swirl | int pci_mem_config, pci_mem_data;
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208 | 2e29bd04 | Blue Swirl | |
209 | 2e29bd04 | Blue Swirl | /* Uninorth internal bus */
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210 | 2e29bd04 | Blue Swirl | s = FROM_SYSBUS(UNINState, dev); |
211 | 2e29bd04 | Blue Swirl | |
212 | 952760bb | Blue Swirl | pci_mem_config = pci_host_conf_register_mmio(&s->host_state, 0);
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213 | 952760bb | Blue Swirl | pci_mem_data = pci_host_data_register_mmio(&s->host_state, 1);
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214 | 2e29bd04 | Blue Swirl | sysbus_init_mmio(dev, 0x1000, pci_mem_config);
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215 | 2e29bd04 | Blue Swirl | sysbus_init_mmio(dev, 0x1000, pci_mem_data);
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216 | 81a322d4 | Gerd Hoffmann | return 0; |
217 | 2e29bd04 | Blue Swirl | } |
218 | 2e29bd04 | Blue Swirl | |
219 | 2e29bd04 | Blue Swirl | PCIBus *pci_pmac_init(qemu_irq *pic) |
220 | 2e29bd04 | Blue Swirl | { |
221 | 2e29bd04 | Blue Swirl | DeviceState *dev; |
222 | 2e29bd04 | Blue Swirl | SysBusDevice *s; |
223 | 2e29bd04 | Blue Swirl | UNINState *d; |
224 | 2e29bd04 | Blue Swirl | |
225 | 2e29bd04 | Blue Swirl | /* Use values found on a real PowerMac */
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226 | 2e29bd04 | Blue Swirl | /* Uninorth main bus */
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227 | 18dd19a7 | Markus Armbruster | dev = qdev_create(NULL, "uni-north"); |
228 | e23a1b33 | Markus Armbruster | qdev_init_nofail(dev); |
229 | 2e29bd04 | Blue Swirl | s = sysbus_from_qdev(dev); |
230 | 2e29bd04 | Blue Swirl | d = FROM_SYSBUS(UNINState, s); |
231 | cdd0935c | Blue Swirl | d->host_state.bus = pci_register_bus(&d->busdev.qdev, "pci",
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232 | 2e29bd04 | Blue Swirl | pci_unin_set_irq, pci_unin_map_irq, |
233 | 520128bd | Isaku Yamahata | pic, PCI_DEVFN(11, 0), 4); |
234 | 2e29bd04 | Blue Swirl | |
235 | 60398748 | Blue Swirl | #if 0
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236 | 520128bd | Isaku Yamahata | pci_create_simple(d->host_state.bus, PCI_DEVFN(11, 0), "uni-north");
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237 | 60398748 | Blue Swirl | #endif
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238 | 2e29bd04 | Blue Swirl | |
239 | 2e29bd04 | Blue Swirl | sysbus_mmio_map(s, 0, 0xf2800000); |
240 | 2e29bd04 | Blue Swirl | sysbus_mmio_map(s, 1, 0xf2c00000); |
241 | 2e29bd04 | Blue Swirl | |
242 | 2e29bd04 | Blue Swirl | /* DEC 21154 bridge */
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243 | 2e29bd04 | Blue Swirl | #if 0
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244 | 2e29bd04 | Blue Swirl | /* XXX: not activated as PPC BIOS doesn't handle multiple buses properly */
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245 | 520128bd | Isaku Yamahata | pci_create_simple(d->host_state.bus, PCI_DEVFN(12, 0), "dec-21154");
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246 | 2e29bd04 | Blue Swirl | #endif
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247 | 2e29bd04 | Blue Swirl | |
248 | 2e29bd04 | Blue Swirl | /* Uninorth AGP bus */
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249 | 520128bd | Isaku Yamahata | pci_create_simple(d->host_state.bus, PCI_DEVFN(11, 0), "uni-north-agp"); |
250 | 18dd19a7 | Markus Armbruster | dev = qdev_create(NULL, "uni-north-agp"); |
251 | d27d06f2 | Blue Swirl | qdev_init_nofail(dev); |
252 | d27d06f2 | Blue Swirl | s = sysbus_from_qdev(dev); |
253 | d27d06f2 | Blue Swirl | sysbus_mmio_map(s, 0, 0xf0800000); |
254 | d27d06f2 | Blue Swirl | sysbus_mmio_map(s, 1, 0xf0c00000); |
255 | 2e29bd04 | Blue Swirl | |
256 | 2e29bd04 | Blue Swirl | /* Uninorth internal bus */
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257 | 2e29bd04 | Blue Swirl | #if 0
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258 | 2e29bd04 | Blue Swirl | /* XXX: not needed for now */
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259 | 520128bd | Isaku Yamahata | pci_create_simple(d->host_state.bus, PCI_DEVFN(14, 0), "uni-north-pci");
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260 | 18dd19a7 | Markus Armbruster | dev = qdev_create(NULL, "uni-north-pci");
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261 | d27d06f2 | Blue Swirl | qdev_init_nofail(dev);
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262 | d27d06f2 | Blue Swirl | s = sysbus_from_qdev(dev);
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263 | d27d06f2 | Blue Swirl | sysbus_mmio_map(s, 0, 0xf4800000);
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264 | d27d06f2 | Blue Swirl | sysbus_mmio_map(s, 1, 0xf4c00000);
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265 | 2e29bd04 | Blue Swirl | #endif
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266 | 2e29bd04 | Blue Swirl | |
267 | 2e29bd04 | Blue Swirl | return d->host_state.bus;
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268 | 2e29bd04 | Blue Swirl | } |
269 | 2e29bd04 | Blue Swirl | |
270 | 0f921197 | Alexander Graf | PCIBus *pci_pmac_u3_init(qemu_irq *pic) |
271 | 0f921197 | Alexander Graf | { |
272 | 0f921197 | Alexander Graf | DeviceState *dev; |
273 | 0f921197 | Alexander Graf | SysBusDevice *s; |
274 | 0f921197 | Alexander Graf | UNINState *d; |
275 | 0f921197 | Alexander Graf | |
276 | 0f921197 | Alexander Graf | /* Uninorth AGP bus */
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277 | 0f921197 | Alexander Graf | |
278 | 0f921197 | Alexander Graf | dev = qdev_create(NULL, "u3-agp"); |
279 | 0f921197 | Alexander Graf | qdev_init_nofail(dev); |
280 | 0f921197 | Alexander Graf | s = sysbus_from_qdev(dev); |
281 | 0f921197 | Alexander Graf | d = FROM_SYSBUS(UNINState, s); |
282 | 0f921197 | Alexander Graf | |
283 | 0f921197 | Alexander Graf | d->host_state.bus = pci_register_bus(&d->busdev.qdev, "pci",
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284 | 0f921197 | Alexander Graf | pci_unin_set_irq, pci_unin_map_irq, |
285 | 520128bd | Isaku Yamahata | pic, PCI_DEVFN(11, 0), 4); |
286 | 0f921197 | Alexander Graf | |
287 | 0f921197 | Alexander Graf | sysbus_mmio_map(s, 0, 0xf0800000); |
288 | 0f921197 | Alexander Graf | sysbus_mmio_map(s, 1, 0xf0c00000); |
289 | 0f921197 | Alexander Graf | |
290 | 0f921197 | Alexander Graf | pci_create_simple(d->host_state.bus, 11 << 3, "u3-agp"); |
291 | 0f921197 | Alexander Graf | |
292 | 0f921197 | Alexander Graf | return d->host_state.bus;
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293 | 0f921197 | Alexander Graf | } |
294 | 0f921197 | Alexander Graf | |
295 | 81a322d4 | Gerd Hoffmann | static int unin_main_pci_host_init(PCIDevice *d) |
296 | 2e29bd04 | Blue Swirl | { |
297 | deb54399 | aliguori | pci_config_set_vendor_id(d->config, PCI_VENDOR_ID_APPLE); |
298 | 4ebcf884 | blueswir1 | pci_config_set_device_id(d->config, PCI_DEVICE_ID_APPLE_UNI_N_PCI); |
299 | 502a5395 | pbrook | d->config[0x08] = 0x00; // revision |
300 | 173a543b | blueswir1 | pci_config_set_class(d->config, PCI_CLASS_BRIDGE_HOST); |
301 | 502a5395 | pbrook | d->config[0x0C] = 0x08; // cache_line_size |
302 | 502a5395 | pbrook | d->config[0x0D] = 0x10; // latency_timer |
303 | 502a5395 | pbrook | d->config[0x34] = 0x00; // capabilities_pointer |
304 | 81a322d4 | Gerd Hoffmann | return 0; |
305 | 2e29bd04 | Blue Swirl | } |
306 | 502a5395 | pbrook | |
307 | 81a322d4 | Gerd Hoffmann | static int unin_agp_pci_host_init(PCIDevice *d) |
308 | 2e29bd04 | Blue Swirl | { |
309 | deb54399 | aliguori | pci_config_set_vendor_id(d->config, PCI_VENDOR_ID_APPLE); |
310 | deb54399 | aliguori | pci_config_set_device_id(d->config, PCI_DEVICE_ID_APPLE_UNI_N_AGP); |
311 | 502a5395 | pbrook | d->config[0x08] = 0x00; // revision |
312 | 173a543b | blueswir1 | pci_config_set_class(d->config, PCI_CLASS_BRIDGE_HOST); |
313 | 502a5395 | pbrook | d->config[0x0C] = 0x08; // cache_line_size |
314 | 502a5395 | pbrook | d->config[0x0D] = 0x10; // latency_timer |
315 | 502a5395 | pbrook | // d->config[0x34] = 0x80; // capabilities_pointer
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316 | 81a322d4 | Gerd Hoffmann | return 0; |
317 | 2e29bd04 | Blue Swirl | } |
318 | 502a5395 | pbrook | |
319 | 0f921197 | Alexander Graf | static int u3_agp_pci_host_init(PCIDevice *d) |
320 | 0f921197 | Alexander Graf | { |
321 | 0f921197 | Alexander Graf | pci_config_set_vendor_id(d->config, PCI_VENDOR_ID_APPLE); |
322 | 0f921197 | Alexander Graf | pci_config_set_device_id(d->config, PCI_DEVICE_ID_APPLE_U3_AGP); |
323 | 0f921197 | Alexander Graf | /* revision */
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324 | 0f921197 | Alexander Graf | d->config[0x08] = 0x00; |
325 | 0f921197 | Alexander Graf | pci_config_set_class(d->config, PCI_CLASS_BRIDGE_HOST); |
326 | 0f921197 | Alexander Graf | /* cache line size */
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327 | 0f921197 | Alexander Graf | d->config[0x0C] = 0x08; |
328 | 0f921197 | Alexander Graf | /* latency timer */
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329 | 0f921197 | Alexander Graf | d->config[0x0D] = 0x10; |
330 | 0f921197 | Alexander Graf | return 0; |
331 | 0f921197 | Alexander Graf | } |
332 | 0f921197 | Alexander Graf | |
333 | 81a322d4 | Gerd Hoffmann | static int unin_internal_pci_host_init(PCIDevice *d) |
334 | 2e29bd04 | Blue Swirl | { |
335 | deb54399 | aliguori | pci_config_set_vendor_id(d->config, PCI_VENDOR_ID_APPLE); |
336 | 4ebcf884 | blueswir1 | pci_config_set_device_id(d->config, PCI_DEVICE_ID_APPLE_UNI_N_I_PCI); |
337 | 502a5395 | pbrook | d->config[0x08] = 0x00; // revision |
338 | 173a543b | blueswir1 | pci_config_set_class(d->config, PCI_CLASS_BRIDGE_HOST); |
339 | 502a5395 | pbrook | d->config[0x0C] = 0x08; // cache_line_size |
340 | 502a5395 | pbrook | d->config[0x0D] = 0x10; // latency_timer |
341 | 502a5395 | pbrook | d->config[0x34] = 0x00; // capabilities_pointer |
342 | 81a322d4 | Gerd Hoffmann | return 0; |
343 | 2e29bd04 | Blue Swirl | } |
344 | 2e29bd04 | Blue Swirl | |
345 | 2e29bd04 | Blue Swirl | static PCIDeviceInfo unin_main_pci_host_info = {
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346 | 18dd19a7 | Markus Armbruster | .qdev.name = "uni-north",
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347 | 2e29bd04 | Blue Swirl | .qdev.size = sizeof(PCIDevice),
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348 | 2e29bd04 | Blue Swirl | .init = unin_main_pci_host_init, |
349 | 2e29bd04 | Blue Swirl | }; |
350 | 2e29bd04 | Blue Swirl | |
351 | 0f921197 | Alexander Graf | static PCIDeviceInfo u3_agp_pci_host_info = {
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352 | 0f921197 | Alexander Graf | .qdev.name = "u3-agp",
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353 | 0f921197 | Alexander Graf | .qdev.size = sizeof(PCIDevice),
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354 | 0f921197 | Alexander Graf | .init = u3_agp_pci_host_init, |
355 | 0f921197 | Alexander Graf | }; |
356 | 0f921197 | Alexander Graf | |
357 | 2e29bd04 | Blue Swirl | static PCIDeviceInfo unin_agp_pci_host_info = {
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358 | 18dd19a7 | Markus Armbruster | .qdev.name = "uni-north-agp",
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359 | 2e29bd04 | Blue Swirl | .qdev.size = sizeof(PCIDevice),
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360 | 2e29bd04 | Blue Swirl | .init = unin_agp_pci_host_init, |
361 | 2e29bd04 | Blue Swirl | }; |
362 | 2e29bd04 | Blue Swirl | |
363 | 2e29bd04 | Blue Swirl | static PCIDeviceInfo unin_internal_pci_host_info = {
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364 | 18dd19a7 | Markus Armbruster | .qdev.name = "uni-north-pci",
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365 | 2e29bd04 | Blue Swirl | .qdev.size = sizeof(PCIDevice),
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366 | 2e29bd04 | Blue Swirl | .init = unin_internal_pci_host_init, |
367 | 2e29bd04 | Blue Swirl | }; |
368 | 2e29bd04 | Blue Swirl | |
369 | 2e29bd04 | Blue Swirl | static void unin_register_devices(void) |
370 | 2e29bd04 | Blue Swirl | { |
371 | 18dd19a7 | Markus Armbruster | sysbus_register_dev("uni-north", sizeof(UNINState), |
372 | 2e29bd04 | Blue Swirl | pci_unin_main_init_device); |
373 | 2e29bd04 | Blue Swirl | pci_qdev_register(&unin_main_pci_host_info); |
374 | 0f921197 | Alexander Graf | sysbus_register_dev("u3-agp", sizeof(UNINState), |
375 | 0f921197 | Alexander Graf | pci_u3_agp_init_device); |
376 | 0f921197 | Alexander Graf | pci_qdev_register(&u3_agp_pci_host_info); |
377 | 18dd19a7 | Markus Armbruster | sysbus_register_dev("uni-north-agp", sizeof(UNINState), |
378 | 2e29bd04 | Blue Swirl | pci_unin_agp_init_device); |
379 | 2e29bd04 | Blue Swirl | pci_qdev_register(&unin_agp_pci_host_info); |
380 | 18dd19a7 | Markus Armbruster | sysbus_register_dev("uni-north-pci", sizeof(UNINState), |
381 | 2e29bd04 | Blue Swirl | pci_unin_internal_init_device); |
382 | 2e29bd04 | Blue Swirl | pci_qdev_register(&unin_internal_pci_host_info); |
383 | 502a5395 | pbrook | } |
384 | 2e29bd04 | Blue Swirl | |
385 | 2e29bd04 | Blue Swirl | device_init(unin_register_devices) |