Revision 6bb72b18 target-mips/translate.c
b/target-mips/translate.c | ||
---|---|---|
1604 | 1604 |
tcg_gen_ext32s_tl(cpu_gpr[rd], cpu_gpr[rd]); |
1605 | 1605 |
} else if (rs == 0 && rt != 0) { |
1606 | 1606 |
tcg_gen_neg_tl(cpu_gpr[rd], cpu_gpr[rt]); |
1607 |
tcg_gen_ext32s_tl(cpu_gpr[rd], cpu_gpr[rd]); |
|
1607 | 1608 |
} else if (rs != 0 && rt == 0) { |
1608 | 1609 |
tcg_gen_mov_tl(cpu_gpr[rd], cpu_gpr[rs]); |
1609 | 1610 |
} else { |
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