root / target-sparc / cpu.h @ 6c9bf893
History | View | Annotate | Download (1.6 kB)
1 |
#ifndef CPU_SPARC_H
|
---|---|
2 |
#define CPU_SPARC_H
|
3 |
|
4 |
#include <setjmp.h> |
5 |
#include "config.h" |
6 |
#include "cpu-defs.h" |
7 |
|
8 |
/*#define EXCP_INTERRUPT 0x100*/
|
9 |
|
10 |
/* trap definitions */
|
11 |
#define TT_ILL_INSN 0x02 |
12 |
#define TT_WIN_OVF 0x05 |
13 |
#define TT_WIN_UNF 0x06 |
14 |
#define TT_DIV_ZERO 0x2a |
15 |
#define TT_TRAP 0x80 |
16 |
|
17 |
#define PSR_NEG (1<<23) |
18 |
#define PSR_ZERO (1<<22) |
19 |
#define PSR_OVF (1<<21) |
20 |
#define PSR_CARRY (1<<20) |
21 |
|
22 |
#define NWINDOWS 32 |
23 |
|
24 |
typedef struct CPUSPARCState { |
25 |
uint32_t gregs[8]; /* general registers */ |
26 |
uint32_t *regwptr; /* pointer to current register window */
|
27 |
double *regfptr; /* floating point registers */ |
28 |
uint32_t pc; /* program counter */
|
29 |
uint32_t npc; /* next program counter */
|
30 |
uint32_t sp; /* stack pointer */
|
31 |
uint32_t y; /* multiply/divide register */
|
32 |
uint32_t psr; /* processor state register */
|
33 |
uint32_t T2; |
34 |
uint32_t cwp; /* index of current register window (extracted
|
35 |
from PSR) */
|
36 |
uint32_t wim; /* window invalid mask */
|
37 |
jmp_buf jmp_env; |
38 |
int user_mode_only;
|
39 |
int exception_index;
|
40 |
int interrupt_index;
|
41 |
int interrupt_request;
|
42 |
struct TranslationBlock *current_tb;
|
43 |
void *opaque;
|
44 |
/* NOTE: we allow 8 more registers to handle wrapping */
|
45 |
uint32_t regbase[NWINDOWS * 16 + 8]; |
46 |
} CPUSPARCState; |
47 |
|
48 |
CPUSPARCState *cpu_sparc_init(void);
|
49 |
int cpu_sparc_exec(CPUSPARCState *s);
|
50 |
int cpu_sparc_close(CPUSPARCState *s);
|
51 |
|
52 |
struct siginfo;
|
53 |
int cpu_sparc_signal_handler(int hostsignum, struct siginfo *info, void *puc); |
54 |
void cpu_sparc_dump_state(CPUSPARCState *env, FILE *f, int flags); |
55 |
|
56 |
#define TARGET_PAGE_BITS 13 |
57 |
#include "cpu-all.h" |
58 |
|
59 |
#endif
|