Revision 6ce0ca12

b/target-ppc/helper.c
2612 2612 
            new_msr |= (target_ulong)1 << MSR_CM;
2613 2613 
        }
2614 2614 
    } else {
2615 
        if (!msr_isf) {
2615 
        if (!msr_isf && !(env->mmu_model & POWERPC_MMU_64)) {
2616 2616 
            new_msr &= ~((target_ulong)1 << MSR_SF);
2617 2617 
            vector = (uint32_t)vector;
2618 2618 
        } else {
......
2793 2793 
        ppc_tlb_invalidate_all(env);
2794 2794 
#endif
2795 2795 
    env->msr = msr & env->msr_mask;
2796 
#if defined(TARGET_PPC64)
2797 
    if (env->mmu_model & POWERPC_MMU_64)
2798 
        env->msr |= (1ULL << MSR_SF);
2799 
#endif
2796 2800 
    hreg_compute_hflags(env);
2797 2801 
    env->reserve = (target_ulong)-1ULL;
2798 2802 
    /* Be sure no exception or interrupt is pending */

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