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/*
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 * SuperH interrupt controller module
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 *
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 * Copyright (c) 2007 Magnus Damm
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 * Based on sh_timer.c and arm_timer.c by Paul Brook
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 * Copyright (c) 2005-2006 CodeSourcery.
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 *
8 8e31bf38 Matthew Fernandez
 * This code is licensed under the GPL.
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 */
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#include "sh_intc.h"
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#include "hw.h"
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#include "sh.h"
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//#define DEBUG_INTC
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//#define DEBUG_INTC_SOURCES
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#define INTC_A7(x) ((x) & 0x1fffffff)
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void sh_intc_toggle_source(struct intc_source *source,
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                           int enable_adj, int assert_adj)
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{
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    int enable_changed = 0;
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    int pending_changed = 0;
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    int old_pending;
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    if ((source->enable_count == source->enable_max) && (enable_adj == -1))
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        enable_changed = -1;
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    source->enable_count += enable_adj;
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    if (source->enable_count == source->enable_max)
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        enable_changed = 1;
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    source->asserted += assert_adj;
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    old_pending = source->pending;
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    source->pending = source->asserted &&
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      (source->enable_count == source->enable_max);
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    if (old_pending != source->pending)
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        pending_changed = 1;
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    if (pending_changed) {
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        if (source->pending) {
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            source->parent->pending++;
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            if (source->parent->pending == 1)
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                cpu_interrupt(first_cpu, CPU_INTERRUPT_HARD);
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        }
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        else {
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            source->parent->pending--;
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            if (source->parent->pending == 0)
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                cpu_reset_interrupt(first_cpu, CPU_INTERRUPT_HARD);
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        }
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    }
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  if (enable_changed || assert_adj || pending_changed) {
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#ifdef DEBUG_INTC_SOURCES
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            printf("sh_intc: (%d/%d/%d/%d) interrupt source 0x%x %s%s%s\n",
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                   source->parent->pending,
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                   source->asserted,
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                   source->enable_count,
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                   source->enable_max,
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                   source->vect,
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                   source->asserted ? "asserted " :
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                   assert_adj ? "deasserted" : "",
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                   enable_changed == 1 ? "enabled " :
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                   enable_changed == -1 ? "disabled " : "",
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                   source->pending ? "pending" : "");
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#endif
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  }
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}
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static void sh_intc_set_irq (void *opaque, int n, int level)
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{
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  struct intc_desc *desc = opaque;
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  struct intc_source *source = &(desc->sources[n]);
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  if (level && !source->asserted)
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    sh_intc_toggle_source(source, 0, 1);
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  else if (!level && source->asserted)
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    sh_intc_toggle_source(source, 0, -1);
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}
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int sh_intc_get_pending_vector(struct intc_desc *desc, int imask)
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{
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    unsigned int i;
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    /* slow: use a linked lists of pending sources instead */
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    /* wrong: take interrupt priority into account (one list per priority) */
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    if (imask == 0x0f) {
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        return -1; /* FIXME, update code to include priority per source */
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    }
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    for (i = 0; i < desc->nr_sources; i++) {
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        struct intc_source *source = desc->sources + i;
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        if (source->pending) {
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#ifdef DEBUG_INTC_SOURCES
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            printf("sh_intc: (%d) returning interrupt source 0x%x\n",
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                   desc->pending, source->vect);
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#endif
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            return source->vect;
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        }
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    }
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    abort();
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}
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#define INTC_MODE_NONE       0
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#define INTC_MODE_DUAL_SET   1
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#define INTC_MODE_DUAL_CLR   2
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#define INTC_MODE_ENABLE_REG 3
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#define INTC_MODE_MASK_REG   4
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#define INTC_MODE_IS_PRIO    8
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static unsigned int sh_intc_mode(unsigned long address,
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                                 unsigned long set_reg, unsigned long clr_reg)
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{
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    if ((address != INTC_A7(set_reg)) &&
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        (address != INTC_A7(clr_reg)))
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        return INTC_MODE_NONE;
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    if (set_reg && clr_reg) {
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        if (address == INTC_A7(set_reg))
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            return INTC_MODE_DUAL_SET;
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        else
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            return INTC_MODE_DUAL_CLR;
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    }
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    if (set_reg)
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        return INTC_MODE_ENABLE_REG;
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    else
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        return INTC_MODE_MASK_REG;
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}
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static void sh_intc_locate(struct intc_desc *desc,
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                           unsigned long address,
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                           unsigned long **datap,
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                           intc_enum **enums,
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                           unsigned int *first,
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                           unsigned int *width,
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                           unsigned int *modep)
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{
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    unsigned int i, mode;
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    /* this is slow but works for now */
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    if (desc->mask_regs) {
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        for (i = 0; i < desc->nr_mask_regs; i++) {
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            struct intc_mask_reg *mr = desc->mask_regs + i;
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            mode = sh_intc_mode(address, mr->set_reg, mr->clr_reg);
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            if (mode == INTC_MODE_NONE)
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                continue;
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            *modep = mode;
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            *datap = &mr->value;
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            *enums = mr->enum_ids;
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            *first = mr->reg_width - 1;
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            *width = 1;
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            return;
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        }
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    }
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    if (desc->prio_regs) {
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        for (i = 0; i < desc->nr_prio_regs; i++) {
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            struct intc_prio_reg *pr = desc->prio_regs + i;
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            mode = sh_intc_mode(address, pr->set_reg, pr->clr_reg);
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            if (mode == INTC_MODE_NONE)
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                continue;
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            *modep = mode | INTC_MODE_IS_PRIO;
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            *datap = &pr->value;
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            *enums = pr->enum_ids;
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            *first = (pr->reg_width / pr->field_width) - 1;
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            *width = pr->field_width;
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            return;
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        }
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    }
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    abort();
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}
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static void sh_intc_toggle_mask(struct intc_desc *desc, intc_enum id,
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                                int enable, int is_group)
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{
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    struct intc_source *source = desc->sources + id;
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    if (!id)
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        return;
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    if (!source->next_enum_id && (!source->enable_max || !source->vect)) {
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#ifdef DEBUG_INTC_SOURCES
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        printf("sh_intc: reserved interrupt source %d modified\n", id);
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#endif
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        return;
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    }
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    if (source->vect)
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        sh_intc_toggle_source(source, enable ? 1 : -1, 0);
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#ifdef DEBUG_INTC
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    else {
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        printf("setting interrupt group %d to %d\n", id, !!enable);
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    }
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#endif
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    if ((is_group || !source->vect) && source->next_enum_id) {
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        sh_intc_toggle_mask(desc, source->next_enum_id, enable, 1);
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    }
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#ifdef DEBUG_INTC
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    if (!source->vect) {
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        printf("setting interrupt group %d to %d - done\n", id, !!enable);
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    }
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#endif
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}
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static uint64_t sh_intc_read(void *opaque, target_phys_addr_t offset,
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                             unsigned size)
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{
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    struct intc_desc *desc = opaque;
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    intc_enum *enum_ids = NULL;
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    unsigned int first = 0;
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    unsigned int width = 0;
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    unsigned int mode = 0;
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    unsigned long *valuep;
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#ifdef DEBUG_INTC
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    printf("sh_intc_read 0x%lx\n", (unsigned long) offset);
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#endif
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    sh_intc_locate(desc, (unsigned long)offset, &valuep, 
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                   &enum_ids, &first, &width, &mode);
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    return *valuep;
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}
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static void sh_intc_write(void *opaque, target_phys_addr_t offset,
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                          uint64_t value, unsigned size)
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{
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    struct intc_desc *desc = opaque;
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    intc_enum *enum_ids = NULL;
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    unsigned int first = 0;
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    unsigned int width = 0;
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    unsigned int mode = 0;
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    unsigned int k;
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    unsigned long *valuep;
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    unsigned long mask;
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#ifdef DEBUG_INTC
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    printf("sh_intc_write 0x%lx 0x%08x\n", (unsigned long) offset, value);
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#endif
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    sh_intc_locate(desc, (unsigned long)offset, &valuep, 
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                   &enum_ids, &first, &width, &mode);
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    switch (mode) {
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    case INTC_MODE_ENABLE_REG | INTC_MODE_IS_PRIO: break;
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    case INTC_MODE_DUAL_SET: value |= *valuep; break;
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    case INTC_MODE_DUAL_CLR: value = *valuep & ~value; break;
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    default: abort();
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    }
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    for (k = 0; k <= first; k++) {
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        mask = ((1 << width) - 1) << ((first - k) * width);
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        if ((*valuep & mask) == (value & mask))
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            continue;
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#if 0
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        printf("k = %d, first = %d, enum = %d, mask = 0x%08x\n", 
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               k, first, enum_ids[k], (unsigned int)mask);
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#endif
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        sh_intc_toggle_mask(desc, enum_ids[k], value & mask, 0);
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    }
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    *valuep = value;
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#ifdef DEBUG_INTC
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    printf("sh_intc_write 0x%lx -> 0x%08x\n", (unsigned long) offset, value);
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#endif
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}
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static const MemoryRegionOps sh_intc_ops = {
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    .read = sh_intc_read,
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    .write = sh_intc_write,
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    .endianness = DEVICE_NATIVE_ENDIAN,
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};
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struct intc_source *sh_intc_source(struct intc_desc *desc, intc_enum id)
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{
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    if (id)
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        return desc->sources + id;
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    return NULL;
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}
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static unsigned int sh_intc_register(MemoryRegion *sysmem,
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                             struct intc_desc *desc,
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                             const unsigned long address,
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                             const char *type,
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                             const char *action,
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                             const unsigned int index)
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{
307 b279e5ef Benoît Canet
    char name[60];
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    MemoryRegion *iomem, *iomem_p4, *iomem_a7;
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    if (!address) {
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        return 0;
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    }
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    iomem = &desc->iomem;
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    iomem_p4 = desc->iomem_aliases + index;
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    iomem_a7 = iomem_p4 + 1;
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#define SH_INTC_IOMEM_FORMAT "interrupt-controller-%s-%s-%s"
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    snprintf(name, sizeof(name), SH_INTC_IOMEM_FORMAT, type, action, "p4");
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    memory_region_init_alias(iomem_p4, name, iomem, INTC_A7(address), 4);
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    memory_region_add_subregion(sysmem, P4ADDR(address), iomem_p4);
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    snprintf(name, sizeof(name), SH_INTC_IOMEM_FORMAT, type, action, "a7");
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    memory_region_init_alias(iomem_a7, name, iomem, INTC_A7(address), 4);
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    memory_region_add_subregion(sysmem, A7ADDR(address), iomem_a7);
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#undef SH_INTC_IOMEM_FORMAT
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    /* used to increment aliases index */
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    return 2;
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}
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static void sh_intc_register_source(struct intc_desc *desc,
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                                    intc_enum source,
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                                    struct intc_group *groups,
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                                    int nr_groups)
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{
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    unsigned int i, k;
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    struct intc_source *s;
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    if (desc->mask_regs) {
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        for (i = 0; i < desc->nr_mask_regs; i++) {
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            struct intc_mask_reg *mr = desc->mask_regs + i;
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344 b1503cda malc
            for (k = 0; k < ARRAY_SIZE(mr->enum_ids); k++) {
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                if (mr->enum_ids[k] != source)
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                    continue;
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                s = sh_intc_source(desc, mr->enum_ids[k]);
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                if (s)
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                    s->enable_max++;
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            }
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        }
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    }
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    if (desc->prio_regs) {
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        for (i = 0; i < desc->nr_prio_regs; i++) {
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            struct intc_prio_reg *pr = desc->prio_regs + i;
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359 b1503cda malc
            for (k = 0; k < ARRAY_SIZE(pr->enum_ids); k++) {
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                if (pr->enum_ids[k] != source)
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                    continue;
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                s = sh_intc_source(desc, pr->enum_ids[k]);
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                if (s)
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                    s->enable_max++;
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            }
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        }
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    }
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    if (groups) {
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        for (i = 0; i < nr_groups; i++) {
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            struct intc_group *gr = groups + i;
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374 b1503cda malc
            for (k = 0; k < ARRAY_SIZE(gr->enum_ids); k++) {
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                if (gr->enum_ids[k] != source)
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                    continue;
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                s = sh_intc_source(desc, gr->enum_ids[k]);
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                if (s)
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                    s->enable_max++;
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            }
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        }
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    }
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}
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void sh_intc_register_sources(struct intc_desc *desc,
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                              struct intc_vect *vectors,
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                              int nr_vectors,
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                              struct intc_group *groups,
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                              int nr_groups)
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{
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    unsigned int i, k;
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    struct intc_source *s;
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    for (i = 0; i < nr_vectors; i++) {
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        struct intc_vect *vect = vectors + i;
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        sh_intc_register_source(desc, vect->enum_id, groups, nr_groups);
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        s = sh_intc_source(desc, vect->enum_id);
401 6f9faa91 Stefan Weil
        if (s) {
402 6f9faa91 Stefan Weil
            s->vect = vect->vect;
403 80f515e6 balrog
404 e96e2044 ths
#ifdef DEBUG_INTC_SOURCES
405 6f9faa91 Stefan Weil
            printf("sh_intc: registered source %d -> 0x%04x (%d/%d)\n",
406 6f9faa91 Stefan Weil
                   vect->enum_id, s->vect, s->enable_count, s->enable_max);
407 80f515e6 balrog
#endif
408 6f9faa91 Stefan Weil
        }
409 80f515e6 balrog
    }
410 80f515e6 balrog
411 80f515e6 balrog
    if (groups) {
412 80f515e6 balrog
        for (i = 0; i < nr_groups; i++) {
413 80f515e6 balrog
            struct intc_group *gr = groups + i;
414 80f515e6 balrog
415 80f515e6 balrog
            s = sh_intc_source(desc, gr->enum_id);
416 80f515e6 balrog
            s->next_enum_id = gr->enum_ids[0];
417 80f515e6 balrog
418 b1503cda malc
            for (k = 1; k < ARRAY_SIZE(gr->enum_ids); k++) {
419 80f515e6 balrog
                if (!gr->enum_ids[k])
420 80f515e6 balrog
                    continue;
421 80f515e6 balrog
422 80f515e6 balrog
                s = sh_intc_source(desc, gr->enum_ids[k - 1]);
423 80f515e6 balrog
                s->next_enum_id = gr->enum_ids[k];
424 80f515e6 balrog
            }
425 80f515e6 balrog
426 e96e2044 ths
#ifdef DEBUG_INTC_SOURCES
427 80f515e6 balrog
            printf("sh_intc: registered group %d (%d/%d)\n",
428 80f515e6 balrog
                   gr->enum_id, s->enable_count, s->enable_max);
429 80f515e6 balrog
#endif
430 80f515e6 balrog
        }
431 80f515e6 balrog
    }
432 80f515e6 balrog
}
433 80f515e6 balrog
434 b279e5ef Benoît Canet
int sh_intc_init(MemoryRegion *sysmem,
435 b279e5ef Benoît Canet
         struct intc_desc *desc,
436 80f515e6 balrog
                 int nr_sources,
437 80f515e6 balrog
                 struct intc_mask_reg *mask_regs,
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                 int nr_mask_regs,
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                 struct intc_prio_reg *prio_regs,
440 80f515e6 balrog
                 int nr_prio_regs)
441 80f515e6 balrog
{
442 b279e5ef Benoît Canet
    unsigned int i, j;
443 80f515e6 balrog
444 e96e2044 ths
    desc->pending = 0;
445 80f515e6 balrog
    desc->nr_sources = nr_sources;
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    desc->mask_regs = mask_regs;
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    desc->nr_mask_regs = nr_mask_regs;
448 80f515e6 balrog
    desc->prio_regs = prio_regs;
449 80f515e6 balrog
    desc->nr_prio_regs = nr_prio_regs;
450 b279e5ef Benoît Canet
    /* Allocate 4 MemoryRegions per register (2 actions * 2 aliases).
451 b279e5ef Benoît Canet
     **/
452 b279e5ef Benoît Canet
    desc->iomem_aliases = g_new0(MemoryRegion,
453 b279e5ef Benoît Canet
                                 (nr_mask_regs + nr_prio_regs) * 4);
454 80f515e6 balrog
455 b279e5ef Benoît Canet
    j = 0;
456 80f515e6 balrog
    i = sizeof(struct intc_source) * nr_sources;
457 7267c094 Anthony Liguori
    desc->sources = g_malloc0(i);
458 80f515e6 balrog
459 e96e2044 ths
    for (i = 0; i < desc->nr_sources; i++) {
460 e96e2044 ths
        struct intc_source *source = desc->sources + i;
461 e96e2044 ths
462 e96e2044 ths
        source->parent = desc;
463 e96e2044 ths
    }
464 96e2fc41 aurel32
465 96e2fc41 aurel32
    desc->irqs = qemu_allocate_irqs(sh_intc_set_irq, desc, nr_sources);
466 80f515e6 balrog
 
467 b279e5ef Benoît Canet
    memory_region_init_io(&desc->iomem, &sh_intc_ops, desc,
468 b279e5ef Benoît Canet
                          "interrupt-controller", 0x100000000ULL);
469 b279e5ef Benoît Canet
470 b279e5ef Benoît Canet
#define INT_REG_PARAMS(reg_struct, type, action, j) \
471 b279e5ef Benoît Canet
        reg_struct->action##_reg, #type, #action, j
472 80f515e6 balrog
    if (desc->mask_regs) {
473 80f515e6 balrog
        for (i = 0; i < desc->nr_mask_regs; i++) {
474 80f515e6 balrog
            struct intc_mask_reg *mr = desc->mask_regs + i;
475 80f515e6 balrog
476 b279e5ef Benoît Canet
            j += sh_intc_register(sysmem, desc,
477 b279e5ef Benoît Canet
                                  INT_REG_PARAMS(mr, mask, set, j));
478 b279e5ef Benoît Canet
            j += sh_intc_register(sysmem, desc,
479 b279e5ef Benoît Canet
                                  INT_REG_PARAMS(mr, mask, clr, j));
480 80f515e6 balrog
        }
481 80f515e6 balrog
    }
482 80f515e6 balrog
483 80f515e6 balrog
    if (desc->prio_regs) {
484 80f515e6 balrog
        for (i = 0; i < desc->nr_prio_regs; i++) {
485 80f515e6 balrog
            struct intc_prio_reg *pr = desc->prio_regs + i;
486 80f515e6 balrog
487 b279e5ef Benoît Canet
            j += sh_intc_register(sysmem, desc,
488 b279e5ef Benoît Canet
                                  INT_REG_PARAMS(pr, prio, set, j));
489 b279e5ef Benoît Canet
            j += sh_intc_register(sysmem, desc,
490 b279e5ef Benoît Canet
                                  INT_REG_PARAMS(pr, prio, clr, j));
491 80f515e6 balrog
        }
492 80f515e6 balrog
    }
493 b279e5ef Benoît Canet
#undef INT_REG_PARAMS
494 80f515e6 balrog
495 80f515e6 balrog
    return 0;
496 80f515e6 balrog
}
497 c6d86a33 balrog
498 c6d86a33 balrog
/* Assert level <n> IRL interrupt. 
499 c6d86a33 balrog
   0:deassert. 1:lowest priority,... 15:highest priority. */
500 c6d86a33 balrog
void sh_intc_set_irl(void *opaque, int n, int level)
501 c6d86a33 balrog
{
502 c6d86a33 balrog
    struct intc_source *s = opaque;
503 c6d86a33 balrog
    int i, irl = level ^ 15;
504 c6d86a33 balrog
    for (i = 0; (s = sh_intc_source(s->parent, s->next_enum_id)); i++) {
505 c6d86a33 balrog
        if (i == irl)
506 c6d86a33 balrog
            sh_intc_toggle_source(s, s->enable_count?0:1, s->asserted?0:1);
507 c6d86a33 balrog
        else
508 c6d86a33 balrog
            if (s->asserted)
509 c6d86a33 balrog
                sh_intc_toggle_source(s, 0, -1);
510 c6d86a33 balrog
    }
511 c6d86a33 balrog
}