Revision 6da48311 hw/usb-ohci.c
| b/hw/usb-ohci.c | ||
|---|---|---|
| 62 | 62 |
typedef struct {
|
| 63 | 63 |
USBBus bus; |
| 64 | 64 |
qemu_irq irq; |
| 65 |
int mem;
|
|
| 65 |
MemoryRegion mem;
|
|
| 66 | 66 |
int num_ports; |
| 67 | 67 |
const char *name; |
| 68 | 68 |
|
| ... | ... | |
| 1440 | 1440 |
return; |
| 1441 | 1441 |
} |
| 1442 | 1442 |
|
| 1443 |
static uint32_t ohci_mem_read(void *ptr, target_phys_addr_t addr) |
|
| 1443 |
static uint64_t ohci_mem_read(void *opaque, |
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| 1444 |
target_phys_addr_t addr, |
|
| 1445 |
unsigned size) |
|
| 1444 | 1446 |
{
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| 1445 |
OHCIState *ohci = ptr;
|
|
| 1447 |
OHCIState *ohci = opaque;
|
|
| 1446 | 1448 |
uint32_t retval; |
| 1447 | 1449 |
|
| 1448 |
addr &= 0xff; |
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| 1449 |
|
|
| 1450 | 1450 |
/* Only aligned reads are allowed on OHCI */ |
| 1451 | 1451 |
if (addr & 3) {
|
| 1452 | 1452 |
fprintf(stderr, "usb-ohci: Mis-aligned read\n"); |
| ... | ... | |
| 1563 | 1563 |
return retval; |
| 1564 | 1564 |
} |
| 1565 | 1565 |
|
| 1566 |
static void ohci_mem_write(void *ptr, target_phys_addr_t addr, uint32_t val) |
|
| 1566 |
static void ohci_mem_write(void *opaque, |
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| 1567 |
target_phys_addr_t addr, |
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| 1568 |
uint64_t val, |
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| 1569 |
unsigned size) |
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| 1567 | 1570 |
{
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| 1568 |
OHCIState *ohci = ptr; |
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| 1569 |
|
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| 1570 |
addr &= 0xff; |
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OHCIState *ohci = opaque; |
|
| 1571 | 1572 |
|
| 1572 | 1573 |
/* Only aligned reads are allowed on OHCI */ |
| 1573 | 1574 |
if (addr & 3) {
|
| ... | ... | |
| 1697 | 1698 |
} |
| 1698 | 1699 |
} |
| 1699 | 1700 |
|
| 1700 |
/* Only dword reads are defined on OHCI register space */ |
|
| 1701 |
static CPUReadMemoryFunc * const ohci_readfn[3]={
|
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| 1702 |
ohci_mem_read, |
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| 1703 |
ohci_mem_read, |
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| 1704 |
ohci_mem_read |
|
| 1705 |
}; |
|
| 1706 |
|
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| 1707 |
/* Only dword writes are defined on OHCI register space */ |
|
| 1708 |
static CPUWriteMemoryFunc * const ohci_writefn[3]={
|
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| 1709 |
ohci_mem_write, |
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| 1710 |
ohci_mem_write, |
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| 1711 |
ohci_mem_write |
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| 1701 |
static const MemoryRegionOps ohci_mem_ops = {
|
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| 1702 |
.read = ohci_mem_read, |
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| 1703 |
.write = ohci_mem_write, |
|
| 1704 |
.endianness = DEVICE_LITTLE_ENDIAN, |
|
| 1712 | 1705 |
}; |
| 1713 | 1706 |
|
| 1714 | 1707 |
static USBPortOps ohci_port_ops = {
|
| ... | ... | |
| 1764 | 1757 |
} |
| 1765 | 1758 |
} |
| 1766 | 1759 |
|
| 1767 |
ohci->mem = cpu_register_io_memory(ohci_readfn, ohci_writefn, ohci, |
|
| 1768 |
DEVICE_LITTLE_ENDIAN); |
|
| 1760 |
memory_region_init_io(&ohci->mem, &ohci_mem_ops, ohci, "ohci", 256); |
|
| 1769 | 1761 |
ohci->localmem_base = localmem_base; |
| 1770 | 1762 |
|
| 1771 | 1763 |
ohci->name = dev->info->name; |
| ... | ... | |
| 1799 | 1791 |
ohci->state.irq = ohci->pci_dev.irq[0]; |
| 1800 | 1792 |
|
| 1801 | 1793 |
/* TODO: avoid cast below by using dev */ |
| 1802 |
pci_register_bar_simple(&ohci->pci_dev, 0, 256, 0, ohci->state.mem);
|
|
| 1794 |
pci_register_bar_region(&ohci->pci_dev, 0, 0, &ohci->state.mem);
|
|
| 1803 | 1795 |
return 0; |
| 1804 | 1796 |
} |
| 1805 | 1797 |
|
| ... | ... | |
| 1822 | 1814 |
/* Cannot fail as we pass NULL for masterbus */ |
| 1823 | 1815 |
usb_ohci_init(&s->ohci, &dev->qdev, s->num_ports, s->dma_offset, NULL, 0); |
| 1824 | 1816 |
sysbus_init_irq(dev, &s->ohci.irq); |
| 1825 |
sysbus_init_mmio(dev, 0x1000, s->ohci.mem);
|
|
| 1817 |
sysbus_init_mmio_region(dev, &s->ohci.mem);
|
|
| 1826 | 1818 |
|
| 1827 | 1819 |
return 0; |
| 1828 | 1820 |
} |
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