root / target-i386 / ops_sse_header.h @ 6e0d8677
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1 | 5af45186 | bellard | /*
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2 | 5af45186 | bellard | * MMX/3DNow!/SSE/SSE2/SSE3/PNI support
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3 | 5af45186 | bellard | *
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4 | 5af45186 | bellard | * Copyright (c) 2005 Fabrice Bellard
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5 | 5af45186 | bellard | *
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6 | 5af45186 | bellard | * This library is free software; you can redistribute it and/or
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7 | 5af45186 | bellard | * modify it under the terms of the GNU Lesser General Public
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8 | 5af45186 | bellard | * License as published by the Free Software Foundation; either
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9 | 5af45186 | bellard | * version 2 of the License, or (at your option) any later version.
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10 | 5af45186 | bellard | *
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11 | 5af45186 | bellard | * This library is distributed in the hope that it will be useful,
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12 | 5af45186 | bellard | * but WITHOUT ANY WARRANTY; without even the implied warranty of
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13 | 5af45186 | bellard | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
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14 | 5af45186 | bellard | * Lesser General Public License for more details.
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15 | 5af45186 | bellard | *
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16 | 5af45186 | bellard | * You should have received a copy of the GNU Lesser General Public
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17 | 5af45186 | bellard | * License along with this library; if not, write to the Free Software
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18 | 5af45186 | bellard | * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
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19 | 5af45186 | bellard | */
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20 | 5af45186 | bellard | #if SHIFT == 0 |
21 | 5af45186 | bellard | #define Reg MMXReg
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22 | 5af45186 | bellard | #define SUFFIX _mmx
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23 | 5af45186 | bellard | #else
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24 | 5af45186 | bellard | #define Reg XMMReg
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25 | 5af45186 | bellard | #define SUFFIX _xmm
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26 | 5af45186 | bellard | #endif
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27 | 5af45186 | bellard | |
28 | 5af45186 | bellard | void glue(helper_psrlw, SUFFIX)(Reg *d, Reg *s);
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29 | 5af45186 | bellard | void glue(helper_psraw, SUFFIX)(Reg *d, Reg *s);
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30 | 5af45186 | bellard | void glue(helper_psllw, SUFFIX)(Reg *d, Reg *s);
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31 | 5af45186 | bellard | void glue(helper_psrld, SUFFIX)(Reg *d, Reg *s);
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32 | 5af45186 | bellard | void glue(helper_psrad, SUFFIX)(Reg *d, Reg *s);
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33 | 5af45186 | bellard | void glue(helper_pslld, SUFFIX)(Reg *d, Reg *s);
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34 | 5af45186 | bellard | void glue(helper_psrlq, SUFFIX)(Reg *d, Reg *s);
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35 | 5af45186 | bellard | void glue(helper_psllq, SUFFIX)(Reg *d, Reg *s);
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36 | 5af45186 | bellard | |
37 | 5af45186 | bellard | #if SHIFT == 1 |
38 | 5af45186 | bellard | void glue(helper_psrldq, SUFFIX)(Reg *d, Reg *s);
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39 | 5af45186 | bellard | void glue(helper_pslldq, SUFFIX)(Reg *d, Reg *s);
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40 | 5af45186 | bellard | #endif
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41 | 5af45186 | bellard | |
42 | 5af45186 | bellard | #define SSE_HELPER_B(name, F)\
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43 | 5af45186 | bellard | void glue(name, SUFFIX) (Reg *d, Reg *s);
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44 | 5af45186 | bellard | |
45 | 5af45186 | bellard | #define SSE_HELPER_W(name, F)\
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46 | 5af45186 | bellard | void glue(name, SUFFIX) (Reg *d, Reg *s);
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47 | 5af45186 | bellard | |
48 | 5af45186 | bellard | #define SSE_HELPER_L(name, F)\
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49 | 5af45186 | bellard | void glue(name, SUFFIX) (Reg *d, Reg *s);
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50 | 5af45186 | bellard | |
51 | 5af45186 | bellard | #define SSE_HELPER_Q(name, F)\
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52 | 5af45186 | bellard | void glue(name, SUFFIX) (Reg *d, Reg *s);
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53 | 5af45186 | bellard | |
54 | 5af45186 | bellard | SSE_HELPER_B(helper_paddb, FADD); |
55 | 5af45186 | bellard | SSE_HELPER_W(helper_paddw, FADD); |
56 | 5af45186 | bellard | SSE_HELPER_L(helper_paddl, FADD); |
57 | 5af45186 | bellard | SSE_HELPER_Q(helper_paddq, FADD); |
58 | 5af45186 | bellard | |
59 | 5af45186 | bellard | SSE_HELPER_B(helper_psubb, FSUB); |
60 | 5af45186 | bellard | SSE_HELPER_W(helper_psubw, FSUB); |
61 | 5af45186 | bellard | SSE_HELPER_L(helper_psubl, FSUB); |
62 | 5af45186 | bellard | SSE_HELPER_Q(helper_psubq, FSUB); |
63 | 5af45186 | bellard | |
64 | 5af45186 | bellard | SSE_HELPER_B(helper_paddusb, FADDUB); |
65 | 5af45186 | bellard | SSE_HELPER_B(helper_paddsb, FADDSB); |
66 | 5af45186 | bellard | SSE_HELPER_B(helper_psubusb, FSUBUB); |
67 | 5af45186 | bellard | SSE_HELPER_B(helper_psubsb, FSUBSB); |
68 | 5af45186 | bellard | |
69 | 5af45186 | bellard | SSE_HELPER_W(helper_paddusw, FADDUW); |
70 | 5af45186 | bellard | SSE_HELPER_W(helper_paddsw, FADDSW); |
71 | 5af45186 | bellard | SSE_HELPER_W(helper_psubusw, FSUBUW); |
72 | 5af45186 | bellard | SSE_HELPER_W(helper_psubsw, FSUBSW); |
73 | 5af45186 | bellard | |
74 | 5af45186 | bellard | SSE_HELPER_B(helper_pminub, FMINUB); |
75 | 5af45186 | bellard | SSE_HELPER_B(helper_pmaxub, FMAXUB); |
76 | 5af45186 | bellard | |
77 | 5af45186 | bellard | SSE_HELPER_W(helper_pminsw, FMINSW); |
78 | 5af45186 | bellard | SSE_HELPER_W(helper_pmaxsw, FMAXSW); |
79 | 5af45186 | bellard | |
80 | 5af45186 | bellard | SSE_HELPER_Q(helper_pand, FAND); |
81 | 5af45186 | bellard | SSE_HELPER_Q(helper_pandn, FANDN); |
82 | 5af45186 | bellard | SSE_HELPER_Q(helper_por, FOR); |
83 | 5af45186 | bellard | SSE_HELPER_Q(helper_pxor, FXOR); |
84 | 5af45186 | bellard | |
85 | 5af45186 | bellard | SSE_HELPER_B(helper_pcmpgtb, FCMPGTB); |
86 | 5af45186 | bellard | SSE_HELPER_W(helper_pcmpgtw, FCMPGTW); |
87 | 5af45186 | bellard | SSE_HELPER_L(helper_pcmpgtl, FCMPGTL); |
88 | 5af45186 | bellard | |
89 | 5af45186 | bellard | SSE_HELPER_B(helper_pcmpeqb, FCMPEQ); |
90 | 5af45186 | bellard | SSE_HELPER_W(helper_pcmpeqw, FCMPEQ); |
91 | 5af45186 | bellard | SSE_HELPER_L(helper_pcmpeql, FCMPEQ); |
92 | 5af45186 | bellard | |
93 | 5af45186 | bellard | SSE_HELPER_W(helper_pmullw, FMULLW); |
94 | 5af45186 | bellard | #if SHIFT == 0 |
95 | 5af45186 | bellard | SSE_HELPER_W(helper_pmulhrw, FMULHRW); |
96 | 5af45186 | bellard | #endif
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97 | 5af45186 | bellard | SSE_HELPER_W(helper_pmulhuw, FMULHUW); |
98 | 5af45186 | bellard | SSE_HELPER_W(helper_pmulhw, FMULHW); |
99 | 5af45186 | bellard | |
100 | 5af45186 | bellard | SSE_HELPER_B(helper_pavgb, FAVG); |
101 | 5af45186 | bellard | SSE_HELPER_W(helper_pavgw, FAVG); |
102 | 5af45186 | bellard | |
103 | 5af45186 | bellard | void glue(helper_pmuludq, SUFFIX) (Reg *d, Reg *s);
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104 | 5af45186 | bellard | void glue(helper_pmaddwd, SUFFIX) (Reg *d, Reg *s);
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105 | 5af45186 | bellard | |
106 | 5af45186 | bellard | void glue(helper_psadbw, SUFFIX) (Reg *d, Reg *s);
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107 | b8b6a50b | bellard | void glue(helper_maskmov, SUFFIX) (Reg *d, Reg *s, target_ulong a0);
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108 | 5af45186 | bellard | void glue(helper_movl_mm_T0, SUFFIX) (Reg *d, uint32_t val);
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109 | 5af45186 | bellard | #ifdef TARGET_X86_64
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110 | 5af45186 | bellard | void glue(helper_movq_mm_T0, SUFFIX) (Reg *d, uint64_t val);
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111 | 5af45186 | bellard | #endif
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112 | 5af45186 | bellard | |
113 | 5af45186 | bellard | #if SHIFT == 0 |
114 | 5af45186 | bellard | void glue(helper_pshufw, SUFFIX) (Reg *d, Reg *s, int order); |
115 | 5af45186 | bellard | #else
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116 | 5af45186 | bellard | void helper_shufps(Reg *d, Reg *s, int order); |
117 | 5af45186 | bellard | void helper_shufpd(Reg *d, Reg *s, int order); |
118 | 5af45186 | bellard | void glue(helper_pshufd, SUFFIX) (Reg *d, Reg *s, int order); |
119 | 5af45186 | bellard | void glue(helper_pshuflw, SUFFIX) (Reg *d, Reg *s, int order); |
120 | 5af45186 | bellard | void glue(helper_pshufhw, SUFFIX) (Reg *d, Reg *s, int order); |
121 | 5af45186 | bellard | #endif
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122 | 5af45186 | bellard | |
123 | 5af45186 | bellard | #if SHIFT == 1 |
124 | 5af45186 | bellard | /* FPU ops */
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125 | 5af45186 | bellard | /* XXX: not accurate */
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126 | 5af45186 | bellard | |
127 | 5af45186 | bellard | #define SSE_HELPER_S(name, F)\
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128 | 5af45186 | bellard | void helper_ ## name ## ps (Reg *d, Reg *s); \ |
129 | 5af45186 | bellard | void helper_ ## name ## ss (Reg *d, Reg *s); \ |
130 | 5af45186 | bellard | void helper_ ## name ## pd (Reg *d, Reg *s); \ |
131 | 5af45186 | bellard | void helper_ ## name ## sd (Reg *d, Reg *s); |
132 | 5af45186 | bellard | |
133 | 5af45186 | bellard | SSE_HELPER_S(add, FPU_ADD); |
134 | 5af45186 | bellard | SSE_HELPER_S(sub, FPU_SUB); |
135 | 5af45186 | bellard | SSE_HELPER_S(mul, FPU_MUL); |
136 | 5af45186 | bellard | SSE_HELPER_S(div, FPU_DIV); |
137 | 5af45186 | bellard | SSE_HELPER_S(min, FPU_MIN); |
138 | 5af45186 | bellard | SSE_HELPER_S(max, FPU_MAX); |
139 | 5af45186 | bellard | SSE_HELPER_S(sqrt, FPU_SQRT); |
140 | 5af45186 | bellard | |
141 | 5af45186 | bellard | |
142 | 5af45186 | bellard | void helper_cvtps2pd(Reg *d, Reg *s);
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143 | 5af45186 | bellard | void helper_cvtpd2ps(Reg *d, Reg *s);
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144 | 5af45186 | bellard | void helper_cvtss2sd(Reg *d, Reg *s);
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145 | 5af45186 | bellard | void helper_cvtsd2ss(Reg *d, Reg *s);
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146 | 5af45186 | bellard | void helper_cvtdq2ps(Reg *d, Reg *s);
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147 | 5af45186 | bellard | void helper_cvtdq2pd(Reg *d, Reg *s);
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148 | 5af45186 | bellard | void helper_cvtpi2ps(XMMReg *d, MMXReg *s);
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149 | 5af45186 | bellard | void helper_cvtpi2pd(XMMReg *d, MMXReg *s);
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150 | 5af45186 | bellard | void helper_cvtsi2ss(XMMReg *d, uint32_t val);
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151 | 5af45186 | bellard | void helper_cvtsi2sd(XMMReg *d, uint32_t val);
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152 | 5af45186 | bellard | |
153 | 5af45186 | bellard | #ifdef TARGET_X86_64
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154 | 5af45186 | bellard | void helper_cvtsq2ss(XMMReg *d, uint64_t val);
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155 | 5af45186 | bellard | void helper_cvtsq2sd(XMMReg *d, uint64_t val);
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156 | 5af45186 | bellard | #endif
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157 | 5af45186 | bellard | |
158 | 5af45186 | bellard | void helper_cvtps2dq(XMMReg *d, XMMReg *s);
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159 | 5af45186 | bellard | void helper_cvtpd2dq(XMMReg *d, XMMReg *s);
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160 | 5af45186 | bellard | void helper_cvtps2pi(MMXReg *d, XMMReg *s);
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161 | 5af45186 | bellard | void helper_cvtpd2pi(MMXReg *d, XMMReg *s);
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162 | 5af45186 | bellard | int32_t helper_cvtss2si(XMMReg *s); |
163 | 5af45186 | bellard | int32_t helper_cvtsd2si(XMMReg *s); |
164 | 5af45186 | bellard | #ifdef TARGET_X86_64
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165 | 5af45186 | bellard | int64_t helper_cvtss2sq(XMMReg *s); |
166 | 5af45186 | bellard | int64_t helper_cvtsd2sq(XMMReg *s); |
167 | 5af45186 | bellard | #endif
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168 | 5af45186 | bellard | |
169 | 5af45186 | bellard | void helper_cvttps2dq(XMMReg *d, XMMReg *s);
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170 | 5af45186 | bellard | void helper_cvttpd2dq(XMMReg *d, XMMReg *s);
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171 | 5af45186 | bellard | void helper_cvttps2pi(MMXReg *d, XMMReg *s);
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172 | 5af45186 | bellard | void helper_cvttpd2pi(MMXReg *d, XMMReg *s);
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173 | 5af45186 | bellard | int32_t helper_cvttss2si(XMMReg *s); |
174 | 5af45186 | bellard | int32_t helper_cvttsd2si(XMMReg *s); |
175 | 5af45186 | bellard | #ifdef TARGET_X86_64
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176 | 5af45186 | bellard | int64_t helper_cvttss2sq(XMMReg *s); |
177 | 5af45186 | bellard | int64_t helper_cvttsd2sq(XMMReg *s); |
178 | 5af45186 | bellard | #endif
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179 | 5af45186 | bellard | |
180 | 5af45186 | bellard | void helper_rsqrtps(XMMReg *d, XMMReg *s);
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181 | 5af45186 | bellard | void helper_rsqrtss(XMMReg *d, XMMReg *s);
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182 | 5af45186 | bellard | void helper_rcpps(XMMReg *d, XMMReg *s);
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183 | 5af45186 | bellard | void helper_rcpss(XMMReg *d, XMMReg *s);
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184 | 5af45186 | bellard | void helper_haddps(XMMReg *d, XMMReg *s);
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185 | 5af45186 | bellard | void helper_haddpd(XMMReg *d, XMMReg *s);
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186 | 5af45186 | bellard | void helper_hsubps(XMMReg *d, XMMReg *s);
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187 | 5af45186 | bellard | void helper_hsubpd(XMMReg *d, XMMReg *s);
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188 | 5af45186 | bellard | void helper_addsubps(XMMReg *d, XMMReg *s);
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189 | 5af45186 | bellard | void helper_addsubpd(XMMReg *d, XMMReg *s);
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190 | 5af45186 | bellard | |
191 | 5af45186 | bellard | #define SSE_HELPER_CMP(name, F)\
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192 | 5af45186 | bellard | void helper_ ## name ## ps (Reg *d, Reg *s); \ |
193 | 5af45186 | bellard | void helper_ ## name ## ss (Reg *d, Reg *s); \ |
194 | 5af45186 | bellard | void helper_ ## name ## pd (Reg *d, Reg *s); \ |
195 | 5af45186 | bellard | void helper_ ## name ## sd (Reg *d, Reg *s); |
196 | 5af45186 | bellard | |
197 | 5af45186 | bellard | SSE_HELPER_CMP(cmpeq, FPU_CMPEQ); |
198 | 5af45186 | bellard | SSE_HELPER_CMP(cmplt, FPU_CMPLT); |
199 | 5af45186 | bellard | SSE_HELPER_CMP(cmple, FPU_CMPLE); |
200 | 5af45186 | bellard | SSE_HELPER_CMP(cmpunord, FPU_CMPUNORD); |
201 | 5af45186 | bellard | SSE_HELPER_CMP(cmpneq, FPU_CMPNEQ); |
202 | 5af45186 | bellard | SSE_HELPER_CMP(cmpnlt, FPU_CMPNLT); |
203 | 5af45186 | bellard | SSE_HELPER_CMP(cmpnle, FPU_CMPNLE); |
204 | 5af45186 | bellard | SSE_HELPER_CMP(cmpord, FPU_CMPORD); |
205 | 5af45186 | bellard | |
206 | 5af45186 | bellard | void helper_ucomiss(Reg *d, Reg *s);
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207 | 5af45186 | bellard | void helper_comiss(Reg *d, Reg *s);
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208 | 5af45186 | bellard | void helper_ucomisd(Reg *d, Reg *s);
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209 | 5af45186 | bellard | void helper_comisd(Reg *d, Reg *s);
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210 | 5af45186 | bellard | uint32_t helper_movmskps(Reg *s); |
211 | 5af45186 | bellard | uint32_t helper_movmskpd(Reg *s); |
212 | 5af45186 | bellard | #endif
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213 | 5af45186 | bellard | |
214 | 5af45186 | bellard | uint32_t glue(helper_pmovmskb, SUFFIX)(Reg *s); |
215 | 5af45186 | bellard | void glue(helper_packsswb, SUFFIX) (Reg *d, Reg *s);
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216 | 5af45186 | bellard | void glue(helper_packuswb, SUFFIX) (Reg *d, Reg *s);
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217 | 5af45186 | bellard | void glue(helper_packssdw, SUFFIX) (Reg *d, Reg *s);
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218 | 5af45186 | bellard | #define UNPCK_OP(base_name, base) \
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219 | 5af45186 | bellard | void glue(helper_punpck ## base_name ## bw, SUFFIX) (Reg *d, Reg *s); \ |
220 | 5af45186 | bellard | void glue(helper_punpck ## base_name ## wd, SUFFIX) (Reg *d, Reg *s); \ |
221 | 5af45186 | bellard | void glue(helper_punpck ## base_name ## dq, SUFFIX) (Reg *d, Reg *s); |
222 | 5af45186 | bellard | |
223 | 5af45186 | bellard | UNPCK_OP(l, 0);
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224 | 5af45186 | bellard | UNPCK_OP(h, 1);
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225 | 5af45186 | bellard | |
226 | 5af45186 | bellard | #if SHIFT == 1 |
227 | 5af45186 | bellard | void glue(helper_punpcklqdq, SUFFIX) (Reg *d, Reg *s);
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228 | 5af45186 | bellard | void glue(helper_punpckhqdq, SUFFIX) (Reg *d, Reg *s);
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229 | 5af45186 | bellard | #endif
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230 | 5af45186 | bellard | |
231 | 5af45186 | bellard | /* 3DNow! float ops */
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232 | 5af45186 | bellard | #if SHIFT == 0 |
233 | 5af45186 | bellard | void helper_pi2fd(MMXReg *d, MMXReg *s);
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234 | 5af45186 | bellard | void helper_pi2fw(MMXReg *d, MMXReg *s);
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235 | 5af45186 | bellard | void helper_pf2id(MMXReg *d, MMXReg *s);
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236 | 5af45186 | bellard | void helper_pf2iw(MMXReg *d, MMXReg *s);
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237 | 5af45186 | bellard | void helper_pfacc(MMXReg *d, MMXReg *s);
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238 | 5af45186 | bellard | void helper_pfadd(MMXReg *d, MMXReg *s);
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239 | 5af45186 | bellard | void helper_pfcmpeq(MMXReg *d, MMXReg *s);
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240 | 5af45186 | bellard | void helper_pfcmpge(MMXReg *d, MMXReg *s);
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241 | 5af45186 | bellard | void helper_pfcmpgt(MMXReg *d, MMXReg *s);
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242 | 5af45186 | bellard | void helper_pfmax(MMXReg *d, MMXReg *s);
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243 | 5af45186 | bellard | void helper_pfmin(MMXReg *d, MMXReg *s);
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244 | 5af45186 | bellard | void helper_pfmul(MMXReg *d, MMXReg *s);
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245 | 5af45186 | bellard | void helper_pfnacc(MMXReg *d, MMXReg *s);
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246 | 5af45186 | bellard | void helper_pfpnacc(MMXReg *d, MMXReg *s);
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247 | 5af45186 | bellard | void helper_pfrcp(MMXReg *d, MMXReg *s);
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248 | 5af45186 | bellard | void helper_pfrsqrt(MMXReg *d, MMXReg *s);
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249 | 5af45186 | bellard | void helper_pfsub(MMXReg *d, MMXReg *s);
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250 | 5af45186 | bellard | void helper_pfsubr(MMXReg *d, MMXReg *s);
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251 | 5af45186 | bellard | void helper_pswapd(MMXReg *d, MMXReg *s);
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252 | 5af45186 | bellard | #endif
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253 | 5af45186 | bellard | |
254 | 5af45186 | bellard | #undef SHIFT
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255 | 5af45186 | bellard | #undef Reg
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256 | 5af45186 | bellard | #undef SUFFIX
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257 | 5af45186 | bellard | |
258 | 5af45186 | bellard | #undef SSE_HELPER_B
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259 | 5af45186 | bellard | #undef SSE_HELPER_W
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260 | 5af45186 | bellard | #undef SSE_HELPER_L
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261 | 5af45186 | bellard | #undef SSE_HELPER_Q
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262 | 5af45186 | bellard | #undef SSE_HELPER_S
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263 | 5af45186 | bellard | #undef SSE_HELPER_CMP
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264 | 5af45186 | bellard | #undef UNPCK_OP |