root / tcg / sparc / tcg-target.c @ 6e0d8677
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1 | 8289b279 | blueswir1 | /*
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2 | 8289b279 | blueswir1 | * Tiny Code Generator for QEMU
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3 | 8289b279 | blueswir1 | *
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4 | 8289b279 | blueswir1 | * Copyright (c) 2008 Fabrice Bellard
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5 | 8289b279 | blueswir1 | *
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6 | 8289b279 | blueswir1 | * Permission is hereby granted, free of charge, to any person obtaining a copy
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7 | 8289b279 | blueswir1 | * of this software and associated documentation files (the "Software"), to deal
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8 | 8289b279 | blueswir1 | * in the Software without restriction, including without limitation the rights
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9 | 8289b279 | blueswir1 | * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
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10 | 8289b279 | blueswir1 | * copies of the Software, and to permit persons to whom the Software is
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11 | 8289b279 | blueswir1 | * furnished to do so, subject to the following conditions:
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12 | 8289b279 | blueswir1 | *
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13 | 8289b279 | blueswir1 | * The above copyright notice and this permission notice shall be included in
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14 | 8289b279 | blueswir1 | * all copies or substantial portions of the Software.
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15 | 8289b279 | blueswir1 | *
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16 | 8289b279 | blueswir1 | * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
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17 | 8289b279 | blueswir1 | * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
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18 | 8289b279 | blueswir1 | * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
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19 | 8289b279 | blueswir1 | * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
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20 | 8289b279 | blueswir1 | * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
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21 | 8289b279 | blueswir1 | * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
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22 | 8289b279 | blueswir1 | * THE SOFTWARE.
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23 | 8289b279 | blueswir1 | */
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24 | 8289b279 | blueswir1 | |
25 | 8289b279 | blueswir1 | static const char * const tcg_target_reg_names[TCG_TARGET_NB_REGS] = { |
26 | 8289b279 | blueswir1 | "%g0",
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27 | 8289b279 | blueswir1 | "%g1",
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28 | 8289b279 | blueswir1 | "%g2",
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29 | 8289b279 | blueswir1 | "%g3",
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30 | 8289b279 | blueswir1 | "%g4",
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31 | 8289b279 | blueswir1 | "%g5",
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32 | 8289b279 | blueswir1 | "%g6",
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33 | 8289b279 | blueswir1 | "%g7",
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34 | 8289b279 | blueswir1 | "%o0",
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35 | 8289b279 | blueswir1 | "%o1",
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36 | 8289b279 | blueswir1 | "%o2",
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37 | 8289b279 | blueswir1 | "%o3",
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38 | 8289b279 | blueswir1 | "%o4",
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39 | 8289b279 | blueswir1 | "%o5",
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40 | 8289b279 | blueswir1 | "%o6",
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41 | 8289b279 | blueswir1 | "%o7",
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42 | 8289b279 | blueswir1 | "%l0",
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43 | 8289b279 | blueswir1 | "%l1",
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44 | 8289b279 | blueswir1 | "%l2",
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45 | 8289b279 | blueswir1 | "%l3",
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46 | 8289b279 | blueswir1 | "%l4",
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47 | 8289b279 | blueswir1 | "%l5",
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48 | 8289b279 | blueswir1 | "%l6",
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49 | 8289b279 | blueswir1 | "%l7",
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50 | 8289b279 | blueswir1 | "%i0",
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51 | 8289b279 | blueswir1 | "%i1",
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52 | 8289b279 | blueswir1 | "%i2",
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53 | 8289b279 | blueswir1 | "%i3",
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54 | 8289b279 | blueswir1 | "%i4",
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55 | 8289b279 | blueswir1 | "%i5",
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56 | 8289b279 | blueswir1 | "%i6",
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57 | 8289b279 | blueswir1 | "%i7",
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58 | 8289b279 | blueswir1 | }; |
59 | 8289b279 | blueswir1 | |
60 | 0954d0d9 | blueswir1 | static const int tcg_target_reg_alloc_order[] = { |
61 | 8289b279 | blueswir1 | TCG_REG_L0, |
62 | 8289b279 | blueswir1 | TCG_REG_L1, |
63 | 8289b279 | blueswir1 | TCG_REG_L2, |
64 | 8289b279 | blueswir1 | TCG_REG_L3, |
65 | 8289b279 | blueswir1 | TCG_REG_L4, |
66 | 8289b279 | blueswir1 | TCG_REG_L5, |
67 | 8289b279 | blueswir1 | TCG_REG_L6, |
68 | 8289b279 | blueswir1 | TCG_REG_L7, |
69 | 8289b279 | blueswir1 | TCG_REG_I0, |
70 | 8289b279 | blueswir1 | TCG_REG_I1, |
71 | 8289b279 | blueswir1 | TCG_REG_I2, |
72 | 8289b279 | blueswir1 | TCG_REG_I3, |
73 | 8289b279 | blueswir1 | TCG_REG_I4, |
74 | 8289b279 | blueswir1 | }; |
75 | 8289b279 | blueswir1 | |
76 | 8289b279 | blueswir1 | static const int tcg_target_call_iarg_regs[6] = { |
77 | 8289b279 | blueswir1 | TCG_REG_O0, |
78 | 8289b279 | blueswir1 | TCG_REG_O1, |
79 | 8289b279 | blueswir1 | TCG_REG_O2, |
80 | 8289b279 | blueswir1 | TCG_REG_O3, |
81 | 8289b279 | blueswir1 | TCG_REG_O4, |
82 | 8289b279 | blueswir1 | TCG_REG_O5, |
83 | 8289b279 | blueswir1 | }; |
84 | 8289b279 | blueswir1 | |
85 | 8289b279 | blueswir1 | static const int tcg_target_call_oarg_regs[2] = { |
86 | 8289b279 | blueswir1 | TCG_REG_O0, |
87 | 8289b279 | blueswir1 | TCG_REG_O1, |
88 | 8289b279 | blueswir1 | }; |
89 | 8289b279 | blueswir1 | |
90 | 57e49b40 | blueswir1 | static inline int check_fit_tl(tcg_target_long val, unsigned int bits) |
91 | f5ef6aac | blueswir1 | { |
92 | 57e49b40 | blueswir1 | return (val << ((sizeof(tcg_target_long) * 8 - bits)) |
93 | 57e49b40 | blueswir1 | >> (sizeof(tcg_target_long) * 8 - bits)) == val; |
94 | 57e49b40 | blueswir1 | } |
95 | 57e49b40 | blueswir1 | |
96 | 57e49b40 | blueswir1 | static inline int check_fit_i32(uint32_t val, unsigned int bits) |
97 | 57e49b40 | blueswir1 | { |
98 | 57e49b40 | blueswir1 | return ((val << (32 - bits)) >> (32 - bits)) == val; |
99 | f5ef6aac | blueswir1 | } |
100 | f5ef6aac | blueswir1 | |
101 | 8289b279 | blueswir1 | static void patch_reloc(uint8_t *code_ptr, int type, |
102 | f54b3f92 | aurel32 | tcg_target_long value, tcg_target_long addend) |
103 | 8289b279 | blueswir1 | { |
104 | f54b3f92 | aurel32 | value += addend; |
105 | 8289b279 | blueswir1 | switch (type) {
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106 | 8289b279 | blueswir1 | case R_SPARC_32:
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107 | 8289b279 | blueswir1 | if (value != (uint32_t)value)
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108 | 8289b279 | blueswir1 | tcg_abort(); |
109 | 8289b279 | blueswir1 | *(uint32_t *)code_ptr = value; |
110 | 8289b279 | blueswir1 | break;
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111 | f5ef6aac | blueswir1 | case R_SPARC_WDISP22:
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112 | f5ef6aac | blueswir1 | value -= (long)code_ptr;
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113 | f5ef6aac | blueswir1 | value >>= 2;
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114 | 57e49b40 | blueswir1 | if (!check_fit_tl(value, 22)) |
115 | f5ef6aac | blueswir1 | tcg_abort(); |
116 | f5ef6aac | blueswir1 | *(uint32_t *)code_ptr = ((*(uint32_t *)code_ptr) & ~0x3fffff) | value;
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117 | f5ef6aac | blueswir1 | break;
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118 | 8289b279 | blueswir1 | default:
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119 | 8289b279 | blueswir1 | tcg_abort(); |
120 | 8289b279 | blueswir1 | } |
121 | 8289b279 | blueswir1 | } |
122 | 8289b279 | blueswir1 | |
123 | 8289b279 | blueswir1 | /* maximum number of register used for input function arguments */
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124 | 8289b279 | blueswir1 | static inline int tcg_target_get_call_iarg_regs_count(int flags) |
125 | 8289b279 | blueswir1 | { |
126 | 8289b279 | blueswir1 | return 6; |
127 | 8289b279 | blueswir1 | } |
128 | 8289b279 | blueswir1 | |
129 | 8289b279 | blueswir1 | /* parse target specific constraints */
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130 | 8289b279 | blueswir1 | static int target_parse_constraint(TCGArgConstraint *ct, const char **pct_str) |
131 | 8289b279 | blueswir1 | { |
132 | 8289b279 | blueswir1 | const char *ct_str; |
133 | 8289b279 | blueswir1 | |
134 | 8289b279 | blueswir1 | ct_str = *pct_str; |
135 | 8289b279 | blueswir1 | switch (ct_str[0]) { |
136 | 8289b279 | blueswir1 | case 'r': |
137 | 8289b279 | blueswir1 | case 'L': /* qemu_ld/st constraint */ |
138 | 8289b279 | blueswir1 | ct->ct |= TCG_CT_REG; |
139 | 8289b279 | blueswir1 | tcg_regset_set32(ct->u.regs, 0, 0xffffffff); |
140 | f5ef6aac | blueswir1 | tcg_regset_reset_reg(ct->u.regs, TCG_REG_I0); |
141 | f5ef6aac | blueswir1 | tcg_regset_reset_reg(ct->u.regs, TCG_REG_I1); |
142 | 8289b279 | blueswir1 | break;
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143 | 8289b279 | blueswir1 | case 'I': |
144 | 8289b279 | blueswir1 | ct->ct |= TCG_CT_CONST_S11; |
145 | 8289b279 | blueswir1 | break;
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146 | 8289b279 | blueswir1 | case 'J': |
147 | 8289b279 | blueswir1 | ct->ct |= TCG_CT_CONST_S13; |
148 | 8289b279 | blueswir1 | break;
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149 | 8289b279 | blueswir1 | default:
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150 | 8289b279 | blueswir1 | return -1; |
151 | 8289b279 | blueswir1 | } |
152 | 8289b279 | blueswir1 | ct_str++; |
153 | 8289b279 | blueswir1 | *pct_str = ct_str; |
154 | 8289b279 | blueswir1 | return 0; |
155 | 8289b279 | blueswir1 | } |
156 | 8289b279 | blueswir1 | |
157 | 8289b279 | blueswir1 | /* test if a constant matches the constraint */
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158 | 8289b279 | blueswir1 | static inline int tcg_target_const_match(tcg_target_long val, |
159 | 8289b279 | blueswir1 | const TCGArgConstraint *arg_ct)
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160 | 8289b279 | blueswir1 | { |
161 | 8289b279 | blueswir1 | int ct;
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162 | 8289b279 | blueswir1 | |
163 | 8289b279 | blueswir1 | ct = arg_ct->ct; |
164 | 8289b279 | blueswir1 | if (ct & TCG_CT_CONST)
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165 | 8289b279 | blueswir1 | return 1; |
166 | 57e49b40 | blueswir1 | else if ((ct & TCG_CT_CONST_S11) && check_fit_tl(val, 11)) |
167 | 8289b279 | blueswir1 | return 1; |
168 | 57e49b40 | blueswir1 | else if ((ct & TCG_CT_CONST_S13) && check_fit_tl(val, 13)) |
169 | 8289b279 | blueswir1 | return 1; |
170 | 8289b279 | blueswir1 | else
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171 | 8289b279 | blueswir1 | return 0; |
172 | 8289b279 | blueswir1 | } |
173 | 8289b279 | blueswir1 | |
174 | 8289b279 | blueswir1 | #define INSN_OP(x) ((x) << 30) |
175 | 8289b279 | blueswir1 | #define INSN_OP2(x) ((x) << 22) |
176 | 8289b279 | blueswir1 | #define INSN_OP3(x) ((x) << 19) |
177 | 8289b279 | blueswir1 | #define INSN_OPF(x) ((x) << 5) |
178 | 8289b279 | blueswir1 | #define INSN_RD(x) ((x) << 25) |
179 | 8289b279 | blueswir1 | #define INSN_RS1(x) ((x) << 14) |
180 | 8289b279 | blueswir1 | #define INSN_RS2(x) (x)
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181 | 8289b279 | blueswir1 | |
182 | 8289b279 | blueswir1 | #define INSN_IMM13(x) ((1 << 13) | ((x) & 0x1fff)) |
183 | b3db8758 | blueswir1 | #define INSN_OFF22(x) (((x) >> 2) & 0x3fffff) |
184 | 8289b279 | blueswir1 | |
185 | b3db8758 | blueswir1 | #define INSN_COND(x, a) (((x) << 25) | ((a) << 29)) |
186 | cf7c2ca5 | blueswir1 | #define COND_N 0x0 |
187 | cf7c2ca5 | blueswir1 | #define COND_E 0x1 |
188 | cf7c2ca5 | blueswir1 | #define COND_LE 0x2 |
189 | cf7c2ca5 | blueswir1 | #define COND_L 0x3 |
190 | cf7c2ca5 | blueswir1 | #define COND_LEU 0x4 |
191 | cf7c2ca5 | blueswir1 | #define COND_CS 0x5 |
192 | cf7c2ca5 | blueswir1 | #define COND_NEG 0x6 |
193 | cf7c2ca5 | blueswir1 | #define COND_VS 0x7 |
194 | b3db8758 | blueswir1 | #define COND_A 0x8 |
195 | cf7c2ca5 | blueswir1 | #define COND_NE 0x9 |
196 | cf7c2ca5 | blueswir1 | #define COND_G 0xa |
197 | cf7c2ca5 | blueswir1 | #define COND_GE 0xb |
198 | cf7c2ca5 | blueswir1 | #define COND_GU 0xc |
199 | cf7c2ca5 | blueswir1 | #define COND_CC 0xd |
200 | cf7c2ca5 | blueswir1 | #define COND_POS 0xe |
201 | cf7c2ca5 | blueswir1 | #define COND_VC 0xf |
202 | b3db8758 | blueswir1 | #define BA (INSN_OP(0) | INSN_COND(COND_A, 0) | INSN_OP2(0x2)) |
203 | 8289b279 | blueswir1 | |
204 | 8289b279 | blueswir1 | #define ARITH_ADD (INSN_OP(2) | INSN_OP3(0x00)) |
205 | 8289b279 | blueswir1 | #define ARITH_AND (INSN_OP(2) | INSN_OP3(0x01)) |
206 | 8289b279 | blueswir1 | #define ARITH_OR (INSN_OP(2) | INSN_OP3(0x02)) |
207 | 9a7f3228 | blueswir1 | #define ARITH_ORCC (INSN_OP(2) | INSN_OP3(0x12)) |
208 | 8289b279 | blueswir1 | #define ARITH_XOR (INSN_OP(2) | INSN_OP3(0x03)) |
209 | f5ef6aac | blueswir1 | #define ARITH_SUB (INSN_OP(2) | INSN_OP3(0x04)) |
210 | f5ef6aac | blueswir1 | #define ARITH_SUBCC (INSN_OP(2) | INSN_OP3(0x14)) |
211 | 8289b279 | blueswir1 | #define ARITH_ADDX (INSN_OP(2) | INSN_OP3(0x10)) |
212 | 8289b279 | blueswir1 | #define ARITH_SUBX (INSN_OP(2) | INSN_OP3(0x0c)) |
213 | 8289b279 | blueswir1 | #define ARITH_UMUL (INSN_OP(2) | INSN_OP3(0x0a)) |
214 | 8289b279 | blueswir1 | #define ARITH_UDIV (INSN_OP(2) | INSN_OP3(0x0e)) |
215 | 8289b279 | blueswir1 | #define ARITH_SDIV (INSN_OP(2) | INSN_OP3(0x0f)) |
216 | 8289b279 | blueswir1 | #define ARITH_MULX (INSN_OP(2) | INSN_OP3(0x09)) |
217 | 8289b279 | blueswir1 | #define ARITH_UDIVX (INSN_OP(2) | INSN_OP3(0x0d)) |
218 | 8289b279 | blueswir1 | #define ARITH_SDIVX (INSN_OP(2) | INSN_OP3(0x2d)) |
219 | 8289b279 | blueswir1 | |
220 | 8289b279 | blueswir1 | #define SHIFT_SLL (INSN_OP(2) | INSN_OP3(0x25)) |
221 | 8289b279 | blueswir1 | #define SHIFT_SRL (INSN_OP(2) | INSN_OP3(0x26)) |
222 | 8289b279 | blueswir1 | #define SHIFT_SRA (INSN_OP(2) | INSN_OP3(0x27)) |
223 | 8289b279 | blueswir1 | |
224 | 8289b279 | blueswir1 | #define SHIFT_SLLX (INSN_OP(2) | INSN_OP3(0x25) | (1 << 12)) |
225 | 8289b279 | blueswir1 | #define SHIFT_SRLX (INSN_OP(2) | INSN_OP3(0x26) | (1 << 12)) |
226 | 8289b279 | blueswir1 | #define SHIFT_SRAX (INSN_OP(2) | INSN_OP3(0x27) | (1 << 12)) |
227 | 8289b279 | blueswir1 | |
228 | 8289b279 | blueswir1 | #define WRY (INSN_OP(2) | INSN_OP3(0x30)) |
229 | 8289b279 | blueswir1 | #define JMPL (INSN_OP(2) | INSN_OP3(0x38)) |
230 | 8289b279 | blueswir1 | #define SAVE (INSN_OP(2) | INSN_OP3(0x3c)) |
231 | 8289b279 | blueswir1 | #define RESTORE (INSN_OP(2) | INSN_OP3(0x3d)) |
232 | 8289b279 | blueswir1 | #define SETHI (INSN_OP(0) | INSN_OP2(0x4)) |
233 | 8289b279 | blueswir1 | #define CALL INSN_OP(1) |
234 | 8289b279 | blueswir1 | #define LDUB (INSN_OP(3) | INSN_OP3(0x01)) |
235 | 8289b279 | blueswir1 | #define LDSB (INSN_OP(3) | INSN_OP3(0x09)) |
236 | 8289b279 | blueswir1 | #define LDUH (INSN_OP(3) | INSN_OP3(0x02)) |
237 | 8289b279 | blueswir1 | #define LDSH (INSN_OP(3) | INSN_OP3(0x0a)) |
238 | 8289b279 | blueswir1 | #define LDUW (INSN_OP(3) | INSN_OP3(0x00)) |
239 | 8289b279 | blueswir1 | #define LDSW (INSN_OP(3) | INSN_OP3(0x08)) |
240 | 8289b279 | blueswir1 | #define LDX (INSN_OP(3) | INSN_OP3(0x0b)) |
241 | 8289b279 | blueswir1 | #define STB (INSN_OP(3) | INSN_OP3(0x05)) |
242 | 8289b279 | blueswir1 | #define STH (INSN_OP(3) | INSN_OP3(0x06)) |
243 | 8289b279 | blueswir1 | #define STW (INSN_OP(3) | INSN_OP3(0x04)) |
244 | 8289b279 | blueswir1 | #define STX (INSN_OP(3) | INSN_OP3(0x0e)) |
245 | 8289b279 | blueswir1 | |
246 | 8289b279 | blueswir1 | static inline void tcg_out_mov(TCGContext *s, int ret, int arg) |
247 | 8289b279 | blueswir1 | { |
248 | 8289b279 | blueswir1 | tcg_out32(s, ARITH_OR | INSN_RD(ret) | INSN_RS1(arg) | |
249 | 8289b279 | blueswir1 | INSN_RS2(TCG_REG_G0)); |
250 | 8289b279 | blueswir1 | } |
251 | 8289b279 | blueswir1 | |
252 | 8289b279 | blueswir1 | static inline void tcg_out_movi(TCGContext *s, TCGType type, |
253 | 8289b279 | blueswir1 | int ret, tcg_target_long arg)
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254 | 8289b279 | blueswir1 | { |
255 | b3db8758 | blueswir1 | #if defined(__sparc_v9__) && !defined(__sparc_v8plus__)
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256 | 57e49b40 | blueswir1 | if (!check_fit_tl(arg, 32) && (arg & ~0xffffffff) != 0) |
257 | b3db8758 | blueswir1 | fprintf(stderr, "unimplemented %s with constant %ld\n", __func__, arg);
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258 | b3db8758 | blueswir1 | #endif
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259 | 57e49b40 | blueswir1 | if (check_fit_i32(arg, 13)) |
260 | 2f0a5008 | blueswir1 | tcg_out32(s, ARITH_OR | INSN_RD(ret) | INSN_RS1(TCG_REG_G0) | |
261 | 8289b279 | blueswir1 | INSN_IMM13(arg)); |
262 | 8289b279 | blueswir1 | else {
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263 | 8289b279 | blueswir1 | tcg_out32(s, SETHI | INSN_RD(ret) | ((arg & 0xfffffc00) >> 10)); |
264 | 8289b279 | blueswir1 | if (arg & 0x3ff) |
265 | 8289b279 | blueswir1 | tcg_out32(s, ARITH_OR | INSN_RD(ret) | INSN_RS1(ret) | |
266 | 8289b279 | blueswir1 | INSN_IMM13(arg & 0x3ff));
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267 | 8289b279 | blueswir1 | } |
268 | 8289b279 | blueswir1 | } |
269 | 8289b279 | blueswir1 | |
270 | 8289b279 | blueswir1 | static inline void tcg_out_ld_raw(TCGContext *s, int ret, |
271 | 8289b279 | blueswir1 | tcg_target_long arg) |
272 | 8289b279 | blueswir1 | { |
273 | 8289b279 | blueswir1 | tcg_out32(s, SETHI | INSN_RD(ret) | (((uint32_t)arg & 0xfffffc00) >> 10)); |
274 | 8289b279 | blueswir1 | tcg_out32(s, LDUW | INSN_RD(ret) | INSN_RS1(ret) | |
275 | 8289b279 | blueswir1 | INSN_IMM13(arg & 0x3ff));
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276 | 8289b279 | blueswir1 | } |
277 | 8289b279 | blueswir1 | |
278 | b3db8758 | blueswir1 | static inline void tcg_out_ld_ptr(TCGContext *s, int ret, |
279 | b3db8758 | blueswir1 | tcg_target_long arg) |
280 | b3db8758 | blueswir1 | { |
281 | b3db8758 | blueswir1 | #if defined(__sparc_v9__) && !defined(__sparc_v8plus__)
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282 | 57e49b40 | blueswir1 | if (!check_fit_tl(arg, 32) && (arg & ~0xffffffff) != 0) |
283 | b3db8758 | blueswir1 | fprintf(stderr, "unimplemented %s with offset %ld\n", __func__, arg);
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284 | 57e49b40 | blueswir1 | if (!check_fit_i32(arg, 13)) |
285 | b3db8758 | blueswir1 | tcg_out32(s, SETHI | INSN_RD(ret) | (((uint32_t)arg & 0xfffffc00) >> 10)); |
286 | b3db8758 | blueswir1 | tcg_out32(s, LDX | INSN_RD(ret) | INSN_RS1(ret) | |
287 | b3db8758 | blueswir1 | INSN_IMM13(arg & 0x3ff));
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288 | b3db8758 | blueswir1 | #else
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289 | b3db8758 | blueswir1 | tcg_out_ld_raw(s, ret, arg); |
290 | b3db8758 | blueswir1 | #endif
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291 | b3db8758 | blueswir1 | } |
292 | b3db8758 | blueswir1 | |
293 | 8289b279 | blueswir1 | static inline void tcg_out_ldst(TCGContext *s, int ret, int addr, int offset, int op) |
294 | 8289b279 | blueswir1 | { |
295 | 57e49b40 | blueswir1 | if (check_fit_tl(offset, 13)) |
296 | 8289b279 | blueswir1 | tcg_out32(s, op | INSN_RD(ret) | INSN_RS1(addr) | |
297 | 8289b279 | blueswir1 | INSN_IMM13(offset)); |
298 | cf7c2ca5 | blueswir1 | else {
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299 | cf7c2ca5 | blueswir1 | tcg_out_movi(s, TCG_TYPE_PTR, TCG_REG_I5, offset); |
300 | cf7c2ca5 | blueswir1 | tcg_out32(s, op | INSN_RD(ret) | INSN_RS1(TCG_REG_I5) | |
301 | cf7c2ca5 | blueswir1 | INSN_RS2(addr)); |
302 | cf7c2ca5 | blueswir1 | } |
303 | 8289b279 | blueswir1 | } |
304 | 8289b279 | blueswir1 | |
305 | e4d5434c | blueswir1 | static inline void tcg_out_ld(TCGContext *s, TCGType type, int ret, |
306 | 8289b279 | blueswir1 | int arg1, tcg_target_long arg2)
|
307 | 8289b279 | blueswir1 | { |
308 | 7d551702 | blueswir1 | if (type == TCG_TYPE_I32)
|
309 | 7d551702 | blueswir1 | tcg_out_ldst(s, ret, arg1, arg2, LDUW); |
310 | 7d551702 | blueswir1 | else
|
311 | 7d551702 | blueswir1 | tcg_out_ldst(s, ret, arg1, arg2, LDX); |
312 | 8289b279 | blueswir1 | } |
313 | 8289b279 | blueswir1 | |
314 | e4d5434c | blueswir1 | static inline void tcg_out_st(TCGContext *s, TCGType type, int arg, |
315 | 8289b279 | blueswir1 | int arg1, tcg_target_long arg2)
|
316 | 8289b279 | blueswir1 | { |
317 | 7d551702 | blueswir1 | if (type == TCG_TYPE_I32)
|
318 | 7d551702 | blueswir1 | tcg_out_ldst(s, arg, arg1, arg2, STW); |
319 | 7d551702 | blueswir1 | else
|
320 | 7d551702 | blueswir1 | tcg_out_ldst(s, arg, arg1, arg2, STX); |
321 | 8289b279 | blueswir1 | } |
322 | 8289b279 | blueswir1 | |
323 | 8289b279 | blueswir1 | static inline void tcg_out_arith(TCGContext *s, int rd, int rs1, int rs2, |
324 | 8289b279 | blueswir1 | int op)
|
325 | 8289b279 | blueswir1 | { |
326 | 8289b279 | blueswir1 | tcg_out32(s, op | INSN_RD(rd) | INSN_RS1(rs1) | |
327 | 8289b279 | blueswir1 | INSN_RS2(rs2)); |
328 | 8289b279 | blueswir1 | } |
329 | 8289b279 | blueswir1 | |
330 | 8289b279 | blueswir1 | static inline void tcg_out_arithi(TCGContext *s, int rd, int rs1, int offset, |
331 | 8289b279 | blueswir1 | int op)
|
332 | 8289b279 | blueswir1 | { |
333 | 8289b279 | blueswir1 | tcg_out32(s, op | INSN_RD(rd) | INSN_RS1(rs1) | |
334 | 8289b279 | blueswir1 | INSN_IMM13(offset)); |
335 | 8289b279 | blueswir1 | } |
336 | 8289b279 | blueswir1 | |
337 | 8289b279 | blueswir1 | static inline void tcg_out_sety(TCGContext *s, tcg_target_long val) |
338 | 8289b279 | blueswir1 | { |
339 | 8289b279 | blueswir1 | if (val == 0 || val == -1) |
340 | 8289b279 | blueswir1 | tcg_out32(s, WRY | INSN_IMM13(val)); |
341 | 8289b279 | blueswir1 | else
|
342 | 8289b279 | blueswir1 | fprintf(stderr, "unimplemented sety %ld\n", (long)val); |
343 | 8289b279 | blueswir1 | } |
344 | 8289b279 | blueswir1 | |
345 | 8289b279 | blueswir1 | static inline void tcg_out_addi(TCGContext *s, int reg, tcg_target_long val) |
346 | 8289b279 | blueswir1 | { |
347 | 8289b279 | blueswir1 | if (val != 0) { |
348 | 57e49b40 | blueswir1 | if (check_fit_tl(val, 13)) |
349 | 8289b279 | blueswir1 | tcg_out_arithi(s, reg, reg, val, ARITH_ADD); |
350 | f5ef6aac | blueswir1 | else {
|
351 | f5ef6aac | blueswir1 | tcg_out_movi(s, TCG_TYPE_PTR, TCG_REG_I5, val); |
352 | f5ef6aac | blueswir1 | tcg_out_arith(s, reg, reg, TCG_REG_I5, ARITH_ADD); |
353 | f5ef6aac | blueswir1 | } |
354 | 8289b279 | blueswir1 | } |
355 | 8289b279 | blueswir1 | } |
356 | 8289b279 | blueswir1 | |
357 | 8289b279 | blueswir1 | static inline void tcg_out_nop(TCGContext *s) |
358 | 8289b279 | blueswir1 | { |
359 | 8289b279 | blueswir1 | tcg_out32(s, SETHI | INSN_RD(TCG_REG_G0) | 0);
|
360 | 8289b279 | blueswir1 | } |
361 | 8289b279 | blueswir1 | |
362 | cf7c2ca5 | blueswir1 | static void tcg_out_branch(TCGContext *s, int opc, int label_index) |
363 | cf7c2ca5 | blueswir1 | { |
364 | cf7c2ca5 | blueswir1 | int32_t val; |
365 | cf7c2ca5 | blueswir1 | TCGLabel *l = &s->labels[label_index]; |
366 | cf7c2ca5 | blueswir1 | |
367 | cf7c2ca5 | blueswir1 | if (l->has_value) {
|
368 | cf7c2ca5 | blueswir1 | val = l->u.value - (tcg_target_long)s->code_ptr; |
369 | f5ef6aac | blueswir1 | tcg_out32(s, (INSN_OP(0) | INSN_COND(opc, 0) | INSN_OP2(0x2) |
370 | cf7c2ca5 | blueswir1 | | INSN_OFF22(l->u.value - (unsigned long)s->code_ptr))); |
371 | f5ef6aac | blueswir1 | } else {
|
372 | f5ef6aac | blueswir1 | tcg_out_reloc(s, s->code_ptr, R_SPARC_WDISP22, label_index, 0);
|
373 | f5ef6aac | blueswir1 | tcg_out32(s, (INSN_OP(0) | INSN_COND(opc, 0) | INSN_OP2(0x2) | 0)); |
374 | f5ef6aac | blueswir1 | } |
375 | cf7c2ca5 | blueswir1 | } |
376 | cf7c2ca5 | blueswir1 | |
377 | cf7c2ca5 | blueswir1 | static const uint8_t tcg_cond_to_bcond[10] = { |
378 | cf7c2ca5 | blueswir1 | [TCG_COND_EQ] = COND_E, |
379 | cf7c2ca5 | blueswir1 | [TCG_COND_NE] = COND_NE, |
380 | cf7c2ca5 | blueswir1 | [TCG_COND_LT] = COND_L, |
381 | cf7c2ca5 | blueswir1 | [TCG_COND_GE] = COND_GE, |
382 | cf7c2ca5 | blueswir1 | [TCG_COND_LE] = COND_LE, |
383 | cf7c2ca5 | blueswir1 | [TCG_COND_GT] = COND_G, |
384 | cf7c2ca5 | blueswir1 | [TCG_COND_LTU] = COND_CS, |
385 | cf7c2ca5 | blueswir1 | [TCG_COND_GEU] = COND_CC, |
386 | cf7c2ca5 | blueswir1 | [TCG_COND_LEU] = COND_LEU, |
387 | cf7c2ca5 | blueswir1 | [TCG_COND_GTU] = COND_GU, |
388 | cf7c2ca5 | blueswir1 | }; |
389 | cf7c2ca5 | blueswir1 | |
390 | cf7c2ca5 | blueswir1 | static void tcg_out_brcond(TCGContext *s, int cond, |
391 | cf7c2ca5 | blueswir1 | TCGArg arg1, TCGArg arg2, int const_arg2,
|
392 | cf7c2ca5 | blueswir1 | int label_index)
|
393 | cf7c2ca5 | blueswir1 | { |
394 | cf7c2ca5 | blueswir1 | if (const_arg2 && arg2 == 0) |
395 | 9a7f3228 | blueswir1 | /* orcc r, r, %g0 */
|
396 | 9a7f3228 | blueswir1 | tcg_out_arith(s, TCG_REG_G0, TCG_REG_G0, arg1, ARITH_ORCC); |
397 | cf7c2ca5 | blueswir1 | else
|
398 | cf7c2ca5 | blueswir1 | /* subcc r1, r2, %g0 */
|
399 | cf7c2ca5 | blueswir1 | tcg_out_arith(s, TCG_REG_G0, arg1, arg2, ARITH_SUBCC); |
400 | cf7c2ca5 | blueswir1 | tcg_out_branch(s, tcg_cond_to_bcond[cond], label_index); |
401 | cf7c2ca5 | blueswir1 | tcg_out_nop(s); |
402 | cf7c2ca5 | blueswir1 | } |
403 | cf7c2ca5 | blueswir1 | |
404 | 7d551702 | blueswir1 | /* Generate global QEMU prologue and epilogue code */
|
405 | 7d551702 | blueswir1 | void tcg_target_qemu_prologue(TCGContext *s)
|
406 | b3db8758 | blueswir1 | { |
407 | b3db8758 | blueswir1 | tcg_out32(s, SAVE | INSN_RD(TCG_REG_O6) | INSN_RS1(TCG_REG_O6) | |
408 | b3db8758 | blueswir1 | INSN_IMM13(-TCG_TARGET_STACK_MINFRAME)); |
409 | cf7c2ca5 | blueswir1 | tcg_out32(s, JMPL | INSN_RD(TCG_REG_G0) | INSN_RS1(TCG_REG_I0) | |
410 | 7d551702 | blueswir1 | INSN_RS2(TCG_REG_G0)); |
411 | 7d551702 | blueswir1 | tcg_out_nop(s); |
412 | b3db8758 | blueswir1 | } |
413 | b3db8758 | blueswir1 | |
414 | f5ef6aac | blueswir1 | #if defined(CONFIG_SOFTMMU)
|
415 | f5ef6aac | blueswir1 | extern void __ldb_mmu(void); |
416 | f5ef6aac | blueswir1 | extern void __ldw_mmu(void); |
417 | f5ef6aac | blueswir1 | extern void __ldl_mmu(void); |
418 | f5ef6aac | blueswir1 | extern void __ldq_mmu(void); |
419 | f5ef6aac | blueswir1 | |
420 | f5ef6aac | blueswir1 | extern void __stb_mmu(void); |
421 | f5ef6aac | blueswir1 | extern void __stw_mmu(void); |
422 | f5ef6aac | blueswir1 | extern void __stl_mmu(void); |
423 | f5ef6aac | blueswir1 | extern void __stq_mmu(void); |
424 | f5ef6aac | blueswir1 | |
425 | f5ef6aac | blueswir1 | |
426 | 9a7f3228 | blueswir1 | static const void * const qemu_ld_helpers[4] = { |
427 | f5ef6aac | blueswir1 | __ldb_mmu, |
428 | f5ef6aac | blueswir1 | __ldw_mmu, |
429 | f5ef6aac | blueswir1 | __ldl_mmu, |
430 | f5ef6aac | blueswir1 | __ldq_mmu, |
431 | f5ef6aac | blueswir1 | }; |
432 | f5ef6aac | blueswir1 | |
433 | 9a7f3228 | blueswir1 | static const void * const qemu_st_helpers[4] = { |
434 | f5ef6aac | blueswir1 | __stb_mmu, |
435 | f5ef6aac | blueswir1 | __stw_mmu, |
436 | f5ef6aac | blueswir1 | __stl_mmu, |
437 | f5ef6aac | blueswir1 | __stq_mmu, |
438 | f5ef6aac | blueswir1 | }; |
439 | f5ef6aac | blueswir1 | #endif
|
440 | f5ef6aac | blueswir1 | |
441 | f5ef6aac | blueswir1 | static void tcg_out_qemu_ld(TCGContext *s, const TCGArg *args, |
442 | f5ef6aac | blueswir1 | int opc)
|
443 | f5ef6aac | blueswir1 | { |
444 | f5ef6aac | blueswir1 | int addr_reg, data_reg, r0, r1, mem_index, s_bits, bswap, ld_op;
|
445 | f5ef6aac | blueswir1 | #if defined(CONFIG_SOFTMMU)
|
446 | f5ef6aac | blueswir1 | uint8_t *label1_ptr, *label2_ptr; |
447 | f5ef6aac | blueswir1 | #endif
|
448 | f5ef6aac | blueswir1 | |
449 | f5ef6aac | blueswir1 | data_reg = *args++; |
450 | f5ef6aac | blueswir1 | addr_reg = *args++; |
451 | f5ef6aac | blueswir1 | mem_index = *args; |
452 | f5ef6aac | blueswir1 | s_bits = opc & 3;
|
453 | f5ef6aac | blueswir1 | |
454 | f5ef6aac | blueswir1 | r0 = TCG_REG_I0; |
455 | f5ef6aac | blueswir1 | r1 = TCG_REG_I1; |
456 | f5ef6aac | blueswir1 | |
457 | f5ef6aac | blueswir1 | #if TARGET_LONG_BITS == 32 |
458 | f5ef6aac | blueswir1 | ld_op = LDUW; |
459 | f5ef6aac | blueswir1 | #else
|
460 | f5ef6aac | blueswir1 | ld_op = LDX; |
461 | f5ef6aac | blueswir1 | #endif
|
462 | f5ef6aac | blueswir1 | |
463 | f5ef6aac | blueswir1 | #if defined(CONFIG_SOFTMMU)
|
464 | f5ef6aac | blueswir1 | /* srl addr_reg, x, r1 */
|
465 | f5ef6aac | blueswir1 | tcg_out_arithi(s, r1, addr_reg, TARGET_PAGE_BITS - CPU_TLB_ENTRY_BITS, |
466 | f5ef6aac | blueswir1 | SHIFT_SRL); |
467 | f5ef6aac | blueswir1 | /* and addr_reg, x, r0 */
|
468 | f5ef6aac | blueswir1 | tcg_out_arithi(s, r0, addr_reg, TARGET_PAGE_MASK | ((1 << s_bits) - 1), |
469 | f5ef6aac | blueswir1 | ARITH_AND); |
470 | f5ef6aac | blueswir1 | |
471 | f5ef6aac | blueswir1 | /* and r1, x, r1 */
|
472 | f5ef6aac | blueswir1 | tcg_out_arithi(s, r1, r1, (CPU_TLB_SIZE - 1) << CPU_TLB_ENTRY_BITS,
|
473 | f5ef6aac | blueswir1 | ARITH_AND); |
474 | f5ef6aac | blueswir1 | |
475 | f5ef6aac | blueswir1 | /* add r1, x, r1 */
|
476 | f5ef6aac | blueswir1 | tcg_out_arithi(s, r1, r1, offsetof(CPUState, tlb_table[mem_index][0].addr_read),
|
477 | f5ef6aac | blueswir1 | ARITH_ADD); |
478 | f5ef6aac | blueswir1 | |
479 | f5ef6aac | blueswir1 | /* ld [env + r1], r1 */
|
480 | f5ef6aac | blueswir1 | tcg_out_ldst(s, r1, TCG_AREG0, r1, ld_op); |
481 | f5ef6aac | blueswir1 | |
482 | f5ef6aac | blueswir1 | /* subcc r0, r1, %g0 */
|
483 | f5ef6aac | blueswir1 | tcg_out_arith(s, TCG_REG_G0, r0, r1, ARITH_SUBCC); |
484 | f5ef6aac | blueswir1 | |
485 | f5ef6aac | blueswir1 | /* will become:
|
486 | f5ef6aac | blueswir1 | be label1 */
|
487 | f5ef6aac | blueswir1 | label1_ptr = s->code_ptr; |
488 | f5ef6aac | blueswir1 | tcg_out32(s, 0);
|
489 | f5ef6aac | blueswir1 | |
490 | f5ef6aac | blueswir1 | /* mov (delay slot)*/
|
491 | f5ef6aac | blueswir1 | tcg_out_mov(s, r0, addr_reg); |
492 | f5ef6aac | blueswir1 | |
493 | f5ef6aac | blueswir1 | /* XXX: move that code at the end of the TB */
|
494 | f5ef6aac | blueswir1 | tcg_out32(s, CALL | ((((tcg_target_ulong)qemu_ld_helpers[s_bits] |
495 | f5ef6aac | blueswir1 | - (tcg_target_ulong)s->code_ptr) >> 2)
|
496 | f5ef6aac | blueswir1 | & 0x3fffffff));
|
497 | f5ef6aac | blueswir1 | /* mov (delay slot)*/
|
498 | f5ef6aac | blueswir1 | tcg_out_movi(s, TCG_TYPE_I32, r1, mem_index); |
499 | f5ef6aac | blueswir1 | |
500 | f5ef6aac | blueswir1 | switch(opc) {
|
501 | f5ef6aac | blueswir1 | case 0 | 4: |
502 | f5ef6aac | blueswir1 | /* sll i0, 24/56, i0 */
|
503 | f5ef6aac | blueswir1 | tcg_out_arithi(s, TCG_REG_I0, TCG_REG_I0, |
504 | f5ef6aac | blueswir1 | sizeof(tcg_target_long) * 8 - 8, SHIFT_SLL); |
505 | f5ef6aac | blueswir1 | /* sra i0, 24/56, data_reg */
|
506 | f5ef6aac | blueswir1 | tcg_out_arithi(s, data_reg, TCG_REG_I0, |
507 | f5ef6aac | blueswir1 | sizeof(tcg_target_long) * 8 - 8, SHIFT_SRA); |
508 | f5ef6aac | blueswir1 | break;
|
509 | f5ef6aac | blueswir1 | case 1 | 4: |
510 | f5ef6aac | blueswir1 | /* sll i0, 16/48, i0 */
|
511 | f5ef6aac | blueswir1 | tcg_out_arithi(s, TCG_REG_I0, TCG_REG_I0, |
512 | f5ef6aac | blueswir1 | sizeof(tcg_target_long) * 8 - 16, SHIFT_SLL); |
513 | f5ef6aac | blueswir1 | /* sra i0, 16/48, data_reg */
|
514 | f5ef6aac | blueswir1 | tcg_out_arithi(s, data_reg, TCG_REG_I0, |
515 | f5ef6aac | blueswir1 | sizeof(tcg_target_long) * 8 - 16, SHIFT_SRA); |
516 | f5ef6aac | blueswir1 | break;
|
517 | f5ef6aac | blueswir1 | case 2 | 4: |
518 | f5ef6aac | blueswir1 | /* sll i0, 32, i0 */
|
519 | f5ef6aac | blueswir1 | tcg_out_arithi(s, TCG_REG_I0, TCG_REG_I0, 32, SHIFT_SLL);
|
520 | f5ef6aac | blueswir1 | /* sra i0, 32, data_reg */
|
521 | f5ef6aac | blueswir1 | tcg_out_arithi(s, data_reg, TCG_REG_I0, 32, SHIFT_SRA);
|
522 | f5ef6aac | blueswir1 | break;
|
523 | f5ef6aac | blueswir1 | case 0: |
524 | f5ef6aac | blueswir1 | case 1: |
525 | f5ef6aac | blueswir1 | case 2: |
526 | f5ef6aac | blueswir1 | case 3: |
527 | f5ef6aac | blueswir1 | default:
|
528 | f5ef6aac | blueswir1 | /* mov */
|
529 | f5ef6aac | blueswir1 | tcg_out_mov(s, data_reg, TCG_REG_I0); |
530 | f5ef6aac | blueswir1 | break;
|
531 | f5ef6aac | blueswir1 | } |
532 | f5ef6aac | blueswir1 | |
533 | f5ef6aac | blueswir1 | /* will become:
|
534 | f5ef6aac | blueswir1 | ba label2 */
|
535 | f5ef6aac | blueswir1 | label2_ptr = s->code_ptr; |
536 | f5ef6aac | blueswir1 | tcg_out32(s, 0);
|
537 | f5ef6aac | blueswir1 | |
538 | f5ef6aac | blueswir1 | /* label1: */
|
539 | 9a7f3228 | blueswir1 | *label1_ptr = (INSN_OP(0) | INSN_COND(COND_A, 0) | INSN_OP2(0x2) | |
540 | f5ef6aac | blueswir1 | INSN_OFF22((unsigned long)label1_ptr - |
541 | f5ef6aac | blueswir1 | (unsigned long)s->code_ptr)); |
542 | f5ef6aac | blueswir1 | |
543 | f5ef6aac | blueswir1 | /* ld [r1 + x], r1 */
|
544 | f5ef6aac | blueswir1 | tcg_out_ldst(s, r1, r1, offsetof(CPUTLBEntry, addend) - |
545 | f5ef6aac | blueswir1 | offsetof(CPUTLBEntry, addr_read), ld_op); |
546 | f5ef6aac | blueswir1 | /* add x(r1), r0 */
|
547 | f5ef6aac | blueswir1 | tcg_out_arith(s, r0, r1, r0, ARITH_ADD); |
548 | f5ef6aac | blueswir1 | #else
|
549 | f5ef6aac | blueswir1 | r0 = addr_reg; |
550 | f5ef6aac | blueswir1 | #endif
|
551 | f5ef6aac | blueswir1 | |
552 | f5ef6aac | blueswir1 | #ifdef TARGET_WORDS_BIGENDIAN
|
553 | f5ef6aac | blueswir1 | bswap = 0;
|
554 | f5ef6aac | blueswir1 | #else
|
555 | f5ef6aac | blueswir1 | bswap = 1;
|
556 | f5ef6aac | blueswir1 | #endif
|
557 | f5ef6aac | blueswir1 | switch(opc) {
|
558 | f5ef6aac | blueswir1 | case 0: |
559 | f5ef6aac | blueswir1 | /* ldub [r0], data_reg */
|
560 | f5ef6aac | blueswir1 | tcg_out_ldst(s, data_reg, r0, 0, LDUB);
|
561 | f5ef6aac | blueswir1 | break;
|
562 | f5ef6aac | blueswir1 | case 0 | 4: |
563 | f5ef6aac | blueswir1 | /* ldsb [r0], data_reg */
|
564 | f5ef6aac | blueswir1 | tcg_out_ldst(s, data_reg, r0, 0, LDSB);
|
565 | f5ef6aac | blueswir1 | break;
|
566 | f5ef6aac | blueswir1 | case 1: |
567 | f5ef6aac | blueswir1 | /* lduh [r0], data_reg */
|
568 | f5ef6aac | blueswir1 | tcg_out_ldst(s, data_reg, r0, 0, LDUH);
|
569 | f5ef6aac | blueswir1 | if (bswap) {
|
570 | f5ef6aac | blueswir1 | fprintf(stderr, "unimplemented %s with bswap\n", __func__);
|
571 | f5ef6aac | blueswir1 | } |
572 | f5ef6aac | blueswir1 | break;
|
573 | f5ef6aac | blueswir1 | case 1 | 4: |
574 | f5ef6aac | blueswir1 | /* ldsh [r0], data_reg */
|
575 | f5ef6aac | blueswir1 | tcg_out_ldst(s, data_reg, r0, 0, LDSH);
|
576 | f5ef6aac | blueswir1 | if (bswap) {
|
577 | f5ef6aac | blueswir1 | fprintf(stderr, "unimplemented %s with bswap\n", __func__);
|
578 | f5ef6aac | blueswir1 | } |
579 | f5ef6aac | blueswir1 | break;
|
580 | f5ef6aac | blueswir1 | case 2: |
581 | f5ef6aac | blueswir1 | /* lduw [r0], data_reg */
|
582 | f5ef6aac | blueswir1 | tcg_out_ldst(s, data_reg, r0, 0, LDUW);
|
583 | f5ef6aac | blueswir1 | if (bswap) {
|
584 | f5ef6aac | blueswir1 | fprintf(stderr, "unimplemented %s with bswap\n", __func__);
|
585 | f5ef6aac | blueswir1 | } |
586 | f5ef6aac | blueswir1 | break;
|
587 | f5ef6aac | blueswir1 | case 2 | 4: |
588 | f5ef6aac | blueswir1 | /* ldsw [r0], data_reg */
|
589 | f5ef6aac | blueswir1 | tcg_out_ldst(s, data_reg, r0, 0, LDSW);
|
590 | f5ef6aac | blueswir1 | if (bswap) {
|
591 | f5ef6aac | blueswir1 | fprintf(stderr, "unimplemented %s with bswap\n", __func__);
|
592 | f5ef6aac | blueswir1 | } |
593 | f5ef6aac | blueswir1 | break;
|
594 | f5ef6aac | blueswir1 | case 3: |
595 | f5ef6aac | blueswir1 | /* ldx [r0], data_reg */
|
596 | f5ef6aac | blueswir1 | tcg_out_ldst(s, data_reg, r0, 0, LDX);
|
597 | f5ef6aac | blueswir1 | if (bswap) {
|
598 | f5ef6aac | blueswir1 | fprintf(stderr, "unimplemented %s with bswap\n", __func__);
|
599 | f5ef6aac | blueswir1 | } |
600 | f5ef6aac | blueswir1 | break;
|
601 | f5ef6aac | blueswir1 | default:
|
602 | f5ef6aac | blueswir1 | tcg_abort(); |
603 | f5ef6aac | blueswir1 | } |
604 | f5ef6aac | blueswir1 | |
605 | f5ef6aac | blueswir1 | #if defined(CONFIG_SOFTMMU)
|
606 | f5ef6aac | blueswir1 | /* label2: */
|
607 | 9a7f3228 | blueswir1 | *label2_ptr = (INSN_OP(0) | INSN_COND(COND_A, 0) | INSN_OP2(0x2) | |
608 | f5ef6aac | blueswir1 | INSN_OFF22((unsigned long)label2_ptr - |
609 | f5ef6aac | blueswir1 | (unsigned long)s->code_ptr)); |
610 | f5ef6aac | blueswir1 | #endif
|
611 | f5ef6aac | blueswir1 | } |
612 | f5ef6aac | blueswir1 | |
613 | f5ef6aac | blueswir1 | static void tcg_out_qemu_st(TCGContext *s, const TCGArg *args, |
614 | f5ef6aac | blueswir1 | int opc)
|
615 | f5ef6aac | blueswir1 | { |
616 | f5ef6aac | blueswir1 | int addr_reg, data_reg, r0, r1, mem_index, s_bits, bswap, ld_op;
|
617 | f5ef6aac | blueswir1 | #if defined(CONFIG_SOFTMMU)
|
618 | f5ef6aac | blueswir1 | uint8_t *label1_ptr, *label2_ptr; |
619 | f5ef6aac | blueswir1 | #endif
|
620 | f5ef6aac | blueswir1 | |
621 | f5ef6aac | blueswir1 | data_reg = *args++; |
622 | f5ef6aac | blueswir1 | addr_reg = *args++; |
623 | f5ef6aac | blueswir1 | mem_index = *args; |
624 | f5ef6aac | blueswir1 | |
625 | f5ef6aac | blueswir1 | s_bits = opc; |
626 | f5ef6aac | blueswir1 | |
627 | f5ef6aac | blueswir1 | r0 = TCG_REG_I5; |
628 | f5ef6aac | blueswir1 | r1 = TCG_REG_I4; |
629 | f5ef6aac | blueswir1 | |
630 | f5ef6aac | blueswir1 | #if TARGET_LONG_BITS == 32 |
631 | f5ef6aac | blueswir1 | ld_op = LDUW; |
632 | f5ef6aac | blueswir1 | #else
|
633 | f5ef6aac | blueswir1 | ld_op = LDX; |
634 | f5ef6aac | blueswir1 | #endif
|
635 | f5ef6aac | blueswir1 | |
636 | f5ef6aac | blueswir1 | #if defined(CONFIG_SOFTMMU)
|
637 | f5ef6aac | blueswir1 | /* srl addr_reg, x, r1 */
|
638 | f5ef6aac | blueswir1 | tcg_out_arithi(s, r1, addr_reg, TARGET_PAGE_BITS - CPU_TLB_ENTRY_BITS, |
639 | f5ef6aac | blueswir1 | SHIFT_SRL); |
640 | f5ef6aac | blueswir1 | /* and addr_reg, x, r0 */
|
641 | f5ef6aac | blueswir1 | tcg_out_arithi(s, r0, addr_reg, TARGET_PAGE_MASK | ((1 << s_bits) - 1), |
642 | f5ef6aac | blueswir1 | ARITH_AND); |
643 | f5ef6aac | blueswir1 | |
644 | f5ef6aac | blueswir1 | /* and r1, x, r1 */
|
645 | f5ef6aac | blueswir1 | tcg_out_arithi(s, r1, r1, (CPU_TLB_SIZE - 1) << CPU_TLB_ENTRY_BITS,
|
646 | f5ef6aac | blueswir1 | ARITH_AND); |
647 | f5ef6aac | blueswir1 | |
648 | f5ef6aac | blueswir1 | /* add r1, x, r1 */
|
649 | f5ef6aac | blueswir1 | tcg_out_arithi(s, r1, r1, |
650 | f5ef6aac | blueswir1 | offsetof(CPUState, tlb_table[mem_index][0].addr_write),
|
651 | f5ef6aac | blueswir1 | ARITH_ADD); |
652 | f5ef6aac | blueswir1 | |
653 | f5ef6aac | blueswir1 | /* ld [env + r1], r1 */
|
654 | f5ef6aac | blueswir1 | tcg_out_ldst(s, r1, TCG_AREG0, r1, ld_op); |
655 | f5ef6aac | blueswir1 | |
656 | f5ef6aac | blueswir1 | /* subcc r0, r1, %g0 */
|
657 | f5ef6aac | blueswir1 | tcg_out_arith(s, TCG_REG_G0, r0, r1, ARITH_SUBCC); |
658 | f5ef6aac | blueswir1 | |
659 | f5ef6aac | blueswir1 | /* will become:
|
660 | f5ef6aac | blueswir1 | be label1 */
|
661 | f5ef6aac | blueswir1 | label1_ptr = s->code_ptr; |
662 | f5ef6aac | blueswir1 | tcg_out32(s, 0);
|
663 | f5ef6aac | blueswir1 | /* mov (delay slot)*/
|
664 | f5ef6aac | blueswir1 | tcg_out_mov(s, r0, addr_reg); |
665 | f5ef6aac | blueswir1 | |
666 | f5ef6aac | blueswir1 | switch(opc) {
|
667 | f5ef6aac | blueswir1 | case 0 | 4: |
668 | f5ef6aac | blueswir1 | /* sll i0, 24/56, i0 */
|
669 | f5ef6aac | blueswir1 | tcg_out_arithi(s, TCG_REG_I0, TCG_REG_I0, |
670 | f5ef6aac | blueswir1 | sizeof(tcg_target_long) * 8 - 8, SHIFT_SLL); |
671 | f5ef6aac | blueswir1 | /* sra i0, 24/56, data_reg */
|
672 | f5ef6aac | blueswir1 | tcg_out_arithi(s, data_reg, TCG_REG_I0, |
673 | f5ef6aac | blueswir1 | sizeof(tcg_target_long) * 8 - 8, SHIFT_SRA); |
674 | f5ef6aac | blueswir1 | break;
|
675 | f5ef6aac | blueswir1 | case 1 | 4: |
676 | f5ef6aac | blueswir1 | /* sll i0, 16/48, i0 */
|
677 | f5ef6aac | blueswir1 | tcg_out_arithi(s, TCG_REG_I0, TCG_REG_I0, |
678 | f5ef6aac | blueswir1 | sizeof(tcg_target_long) * 8 - 16, SHIFT_SLL); |
679 | f5ef6aac | blueswir1 | /* sra i0, 16/48, data_reg */
|
680 | f5ef6aac | blueswir1 | tcg_out_arithi(s, data_reg, TCG_REG_I0, |
681 | f5ef6aac | blueswir1 | sizeof(tcg_target_long) * 8 - 16, SHIFT_SRA); |
682 | f5ef6aac | blueswir1 | break;
|
683 | f5ef6aac | blueswir1 | case 2 | 4: |
684 | f5ef6aac | blueswir1 | /* sll i0, 32, i0 */
|
685 | f5ef6aac | blueswir1 | tcg_out_arithi(s, TCG_REG_I0, TCG_REG_I0, 32, SHIFT_SLL);
|
686 | f5ef6aac | blueswir1 | /* sra i0, 32, data_reg */
|
687 | f5ef6aac | blueswir1 | tcg_out_arithi(s, data_reg, TCG_REG_I0, 32, SHIFT_SRA);
|
688 | f5ef6aac | blueswir1 | break;
|
689 | f5ef6aac | blueswir1 | case 0: |
690 | f5ef6aac | blueswir1 | case 1: |
691 | f5ef6aac | blueswir1 | case 2: |
692 | f5ef6aac | blueswir1 | case 3: |
693 | f5ef6aac | blueswir1 | default:
|
694 | f5ef6aac | blueswir1 | /* mov */
|
695 | f5ef6aac | blueswir1 | tcg_out_mov(s, data_reg, TCG_REG_I0); |
696 | f5ef6aac | blueswir1 | break;
|
697 | f5ef6aac | blueswir1 | } |
698 | f5ef6aac | blueswir1 | |
699 | f5ef6aac | blueswir1 | tcg_out32(s, CALL | ((((tcg_target_ulong)qemu_st_helpers[s_bits] |
700 | f5ef6aac | blueswir1 | - (tcg_target_ulong)s->code_ptr) >> 2)
|
701 | f5ef6aac | blueswir1 | & 0x3fffffff));
|
702 | f5ef6aac | blueswir1 | /* mov (delay slot)*/
|
703 | f5ef6aac | blueswir1 | tcg_out_movi(s, TCG_TYPE_I32, r1, mem_index); |
704 | f5ef6aac | blueswir1 | |
705 | f5ef6aac | blueswir1 | /* will become:
|
706 | f5ef6aac | blueswir1 | ba label2 */
|
707 | f5ef6aac | blueswir1 | label2_ptr = s->code_ptr; |
708 | f5ef6aac | blueswir1 | tcg_out32(s, 0);
|
709 | f5ef6aac | blueswir1 | |
710 | f5ef6aac | blueswir1 | /* label1: */
|
711 | 9a7f3228 | blueswir1 | *label1_ptr = (INSN_OP(0) | INSN_COND(COND_A, 0) | INSN_OP2(0x2) | |
712 | f5ef6aac | blueswir1 | INSN_OFF22((unsigned long)label1_ptr - |
713 | f5ef6aac | blueswir1 | (unsigned long)s->code_ptr)); |
714 | f5ef6aac | blueswir1 | |
715 | f5ef6aac | blueswir1 | /* ld [r1 + x], r1 */
|
716 | f5ef6aac | blueswir1 | tcg_out_ldst(s, r1, r1, offsetof(CPUTLBEntry, addend) - |
717 | f5ef6aac | blueswir1 | offsetof(CPUTLBEntry, addr_write), ld_op); |
718 | f5ef6aac | blueswir1 | /* add x(r1), r0 */
|
719 | f5ef6aac | blueswir1 | tcg_out_arith(s, r0, r1, r0, ARITH_ADD); |
720 | f5ef6aac | blueswir1 | #else
|
721 | f5ef6aac | blueswir1 | r0 = addr_reg; |
722 | f5ef6aac | blueswir1 | #endif
|
723 | f5ef6aac | blueswir1 | |
724 | f5ef6aac | blueswir1 | #ifdef TARGET_WORDS_BIGENDIAN
|
725 | f5ef6aac | blueswir1 | bswap = 0;
|
726 | f5ef6aac | blueswir1 | #else
|
727 | f5ef6aac | blueswir1 | bswap = 1;
|
728 | f5ef6aac | blueswir1 | #endif
|
729 | f5ef6aac | blueswir1 | switch(opc) {
|
730 | f5ef6aac | blueswir1 | case 0: |
731 | f5ef6aac | blueswir1 | /* stb data_reg, [r0] */
|
732 | f5ef6aac | blueswir1 | tcg_out_ldst(s, data_reg, r0, 0, STB);
|
733 | f5ef6aac | blueswir1 | break;
|
734 | f5ef6aac | blueswir1 | case 1: |
735 | f5ef6aac | blueswir1 | if (bswap) {
|
736 | f5ef6aac | blueswir1 | fprintf(stderr, "unimplemented %s with bswap\n", __func__);
|
737 | f5ef6aac | blueswir1 | } |
738 | f5ef6aac | blueswir1 | /* sth data_reg, [r0] */
|
739 | f5ef6aac | blueswir1 | tcg_out_ldst(s, data_reg, r0, 0, STH);
|
740 | f5ef6aac | blueswir1 | break;
|
741 | f5ef6aac | blueswir1 | case 2: |
742 | f5ef6aac | blueswir1 | if (bswap) {
|
743 | f5ef6aac | blueswir1 | fprintf(stderr, "unimplemented %s with bswap\n", __func__);
|
744 | f5ef6aac | blueswir1 | } |
745 | f5ef6aac | blueswir1 | /* stw data_reg, [r0] */
|
746 | f5ef6aac | blueswir1 | tcg_out_ldst(s, data_reg, r0, 0, STW);
|
747 | f5ef6aac | blueswir1 | break;
|
748 | f5ef6aac | blueswir1 | case 3: |
749 | f5ef6aac | blueswir1 | if (bswap) {
|
750 | f5ef6aac | blueswir1 | fprintf(stderr, "unimplemented %s with bswap\n", __func__);
|
751 | f5ef6aac | blueswir1 | } |
752 | f5ef6aac | blueswir1 | /* stx data_reg, [r0] */
|
753 | f5ef6aac | blueswir1 | tcg_out_ldst(s, data_reg, r0, 0, STX);
|
754 | f5ef6aac | blueswir1 | break;
|
755 | f5ef6aac | blueswir1 | default:
|
756 | f5ef6aac | blueswir1 | tcg_abort(); |
757 | f5ef6aac | blueswir1 | } |
758 | f5ef6aac | blueswir1 | |
759 | f5ef6aac | blueswir1 | #if defined(CONFIG_SOFTMMU)
|
760 | f5ef6aac | blueswir1 | /* label2: */
|
761 | 9a7f3228 | blueswir1 | *label2_ptr = (INSN_OP(0) | INSN_COND(COND_A, 0) | INSN_OP2(0x2) | |
762 | f5ef6aac | blueswir1 | INSN_OFF22((unsigned long)label2_ptr - |
763 | f5ef6aac | blueswir1 | (unsigned long)s->code_ptr)); |
764 | f5ef6aac | blueswir1 | #endif
|
765 | f5ef6aac | blueswir1 | } |
766 | f5ef6aac | blueswir1 | |
767 | 8289b279 | blueswir1 | static inline void tcg_out_op(TCGContext *s, int opc, const TCGArg *args, |
768 | 8289b279 | blueswir1 | const int *const_args) |
769 | 8289b279 | blueswir1 | { |
770 | 8289b279 | blueswir1 | int c;
|
771 | 8289b279 | blueswir1 | |
772 | 8289b279 | blueswir1 | switch (opc) {
|
773 | 8289b279 | blueswir1 | case INDEX_op_exit_tb:
|
774 | b3db8758 | blueswir1 | tcg_out_movi(s, TCG_TYPE_PTR, TCG_REG_I0, args[0]);
|
775 | b3db8758 | blueswir1 | tcg_out32(s, JMPL | INSN_RD(TCG_REG_G0) | INSN_RS1(TCG_REG_I7) | |
776 | 8289b279 | blueswir1 | INSN_IMM13(8));
|
777 | b3db8758 | blueswir1 | tcg_out32(s, RESTORE | INSN_RD(TCG_REG_G0) | INSN_RS1(TCG_REG_G0) | |
778 | b3db8758 | blueswir1 | INSN_RS2(TCG_REG_G0)); |
779 | 8289b279 | blueswir1 | break;
|
780 | 8289b279 | blueswir1 | case INDEX_op_goto_tb:
|
781 | 8289b279 | blueswir1 | if (s->tb_jmp_offset) {
|
782 | 8289b279 | blueswir1 | /* direct jump method */
|
783 | cf7c2ca5 | blueswir1 | tcg_out32(s, SETHI | INSN_RD(TCG_REG_I5) | |
784 | cf7c2ca5 | blueswir1 | ((args[0] & 0xffffe000) >> 10)); |
785 | cf7c2ca5 | blueswir1 | tcg_out32(s, JMPL | INSN_RD(TCG_REG_G0) | INSN_RS1(TCG_REG_I5) | |
786 | cf7c2ca5 | blueswir1 | INSN_IMM13((args[0] & 0x1fff))); |
787 | 8289b279 | blueswir1 | s->tb_jmp_offset[args[0]] = s->code_ptr - s->code_buf;
|
788 | 8289b279 | blueswir1 | } else {
|
789 | 8289b279 | blueswir1 | /* indirect jump method */
|
790 | b3db8758 | blueswir1 | tcg_out_ld_ptr(s, TCG_REG_I5, (tcg_target_long)(s->tb_next + args[0]));
|
791 | b3db8758 | blueswir1 | tcg_out32(s, JMPL | INSN_RD(TCG_REG_G0) | INSN_RS1(TCG_REG_I5) | |
792 | b3db8758 | blueswir1 | INSN_RS2(TCG_REG_G0)); |
793 | 8289b279 | blueswir1 | } |
794 | 53cd9273 | blueswir1 | tcg_out_nop(s); |
795 | 8289b279 | blueswir1 | s->tb_next_offset[args[0]] = s->code_ptr - s->code_buf;
|
796 | 8289b279 | blueswir1 | break;
|
797 | 8289b279 | blueswir1 | case INDEX_op_call:
|
798 | 8289b279 | blueswir1 | if (const_args[0]) { |
799 | 8289b279 | blueswir1 | tcg_out32(s, CALL | ((((tcg_target_ulong)args[0]
|
800 | 8289b279 | blueswir1 | - (tcg_target_ulong)s->code_ptr) >> 2)
|
801 | 8289b279 | blueswir1 | & 0x3fffffff));
|
802 | 8289b279 | blueswir1 | tcg_out_nop(s); |
803 | 8289b279 | blueswir1 | } else {
|
804 | cf7c2ca5 | blueswir1 | tcg_out_ld_ptr(s, TCG_REG_I5, (tcg_target_long)(s->tb_next + args[0]));
|
805 | cf7c2ca5 | blueswir1 | tcg_out32(s, JMPL | INSN_RD(TCG_REG_O7) | INSN_RS1(TCG_REG_I5) | |
806 | 2f0a5008 | blueswir1 | INSN_RS2(TCG_REG_G0)); |
807 | 8289b279 | blueswir1 | tcg_out_nop(s); |
808 | 8289b279 | blueswir1 | } |
809 | 8289b279 | blueswir1 | break;
|
810 | 8289b279 | blueswir1 | case INDEX_op_jmp:
|
811 | 8289b279 | blueswir1 | case INDEX_op_br:
|
812 | f5ef6aac | blueswir1 | tcg_out_branch(s, COND_A, args[0]);
|
813 | f5ef6aac | blueswir1 | tcg_out_nop(s); |
814 | 8289b279 | blueswir1 | break;
|
815 | 8289b279 | blueswir1 | case INDEX_op_movi_i32:
|
816 | 8289b279 | blueswir1 | tcg_out_movi(s, TCG_TYPE_I32, args[0], (uint32_t)args[1]); |
817 | 8289b279 | blueswir1 | break;
|
818 | 8289b279 | blueswir1 | |
819 | 8289b279 | blueswir1 | #if defined(__sparc_v9__) && !defined(__sparc_v8plus__)
|
820 | 8289b279 | blueswir1 | #define OP_32_64(x) \
|
821 | 8289b279 | blueswir1 | glue(glue(case INDEX_op_, x), _i32:) \
|
822 | 8289b279 | blueswir1 | glue(glue(case INDEX_op_, x), _i64:)
|
823 | 8289b279 | blueswir1 | #else
|
824 | 8289b279 | blueswir1 | #define OP_32_64(x) \
|
825 | 8289b279 | blueswir1 | glue(glue(case INDEX_op_, x), _i32:)
|
826 | 8289b279 | blueswir1 | #endif
|
827 | 8289b279 | blueswir1 | OP_32_64(ld8u); |
828 | 8289b279 | blueswir1 | tcg_out_ldst(s, args[0], args[1], args[2], LDUB); |
829 | 8289b279 | blueswir1 | break;
|
830 | 8289b279 | blueswir1 | OP_32_64(ld8s); |
831 | 8289b279 | blueswir1 | tcg_out_ldst(s, args[0], args[1], args[2], LDSB); |
832 | 8289b279 | blueswir1 | break;
|
833 | 8289b279 | blueswir1 | OP_32_64(ld16u); |
834 | 8289b279 | blueswir1 | tcg_out_ldst(s, args[0], args[1], args[2], LDUH); |
835 | 8289b279 | blueswir1 | break;
|
836 | 8289b279 | blueswir1 | OP_32_64(ld16s); |
837 | 8289b279 | blueswir1 | tcg_out_ldst(s, args[0], args[1], args[2], LDSH); |
838 | 8289b279 | blueswir1 | break;
|
839 | 8289b279 | blueswir1 | case INDEX_op_ld_i32:
|
840 | 8289b279 | blueswir1 | #if defined(__sparc_v9__) && !defined(__sparc_v8plus__)
|
841 | 53cd9273 | blueswir1 | case INDEX_op_ld32u_i64:
|
842 | 8289b279 | blueswir1 | #endif
|
843 | 8289b279 | blueswir1 | tcg_out_ldst(s, args[0], args[1], args[2], LDUW); |
844 | 8289b279 | blueswir1 | break;
|
845 | 8289b279 | blueswir1 | OP_32_64(st8); |
846 | 8289b279 | blueswir1 | tcg_out_ldst(s, args[0], args[1], args[2], STB); |
847 | 8289b279 | blueswir1 | break;
|
848 | 8289b279 | blueswir1 | OP_32_64(st16); |
849 | 8289b279 | blueswir1 | tcg_out_ldst(s, args[0], args[1], args[2], STH); |
850 | 8289b279 | blueswir1 | break;
|
851 | 8289b279 | blueswir1 | case INDEX_op_st_i32:
|
852 | 8289b279 | blueswir1 | #if defined(__sparc_v9__) && !defined(__sparc_v8plus__)
|
853 | 53cd9273 | blueswir1 | case INDEX_op_st32_i64:
|
854 | 8289b279 | blueswir1 | #endif
|
855 | 8289b279 | blueswir1 | tcg_out_ldst(s, args[0], args[1], args[2], STW); |
856 | 8289b279 | blueswir1 | break;
|
857 | 53cd9273 | blueswir1 | OP_32_64(add); |
858 | 53cd9273 | blueswir1 | c = ARITH_ADD; |
859 | 53cd9273 | blueswir1 | goto gen_arith32;
|
860 | 8289b279 | blueswir1 | OP_32_64(sub); |
861 | 8289b279 | blueswir1 | c = ARITH_SUB; |
862 | 8289b279 | blueswir1 | goto gen_arith32;
|
863 | 8289b279 | blueswir1 | OP_32_64(and); |
864 | 8289b279 | blueswir1 | c = ARITH_AND; |
865 | 8289b279 | blueswir1 | goto gen_arith32;
|
866 | 8289b279 | blueswir1 | OP_32_64(or); |
867 | 8289b279 | blueswir1 | c = ARITH_OR; |
868 | 8289b279 | blueswir1 | goto gen_arith32;
|
869 | 8289b279 | blueswir1 | OP_32_64(xor); |
870 | 8289b279 | blueswir1 | c = ARITH_XOR; |
871 | 8289b279 | blueswir1 | goto gen_arith32;
|
872 | 8289b279 | blueswir1 | case INDEX_op_shl_i32:
|
873 | 8289b279 | blueswir1 | c = SHIFT_SLL; |
874 | 8289b279 | blueswir1 | goto gen_arith32;
|
875 | 8289b279 | blueswir1 | case INDEX_op_shr_i32:
|
876 | 8289b279 | blueswir1 | c = SHIFT_SRL; |
877 | 8289b279 | blueswir1 | goto gen_arith32;
|
878 | 8289b279 | blueswir1 | case INDEX_op_sar_i32:
|
879 | 8289b279 | blueswir1 | c = SHIFT_SRA; |
880 | 8289b279 | blueswir1 | goto gen_arith32;
|
881 | 8289b279 | blueswir1 | case INDEX_op_mul_i32:
|
882 | 8289b279 | blueswir1 | c = ARITH_UMUL; |
883 | 8289b279 | blueswir1 | goto gen_arith32;
|
884 | 8289b279 | blueswir1 | case INDEX_op_div2_i32:
|
885 | 8289b279 | blueswir1 | #if defined(__sparc_v9__) || defined(__sparc_v8plus__)
|
886 | 8289b279 | blueswir1 | c = ARITH_SDIVX; |
887 | 8289b279 | blueswir1 | goto gen_arith32;
|
888 | 8289b279 | blueswir1 | #else
|
889 | 8289b279 | blueswir1 | tcg_out_sety(s, 0);
|
890 | 8289b279 | blueswir1 | c = ARITH_SDIV; |
891 | 8289b279 | blueswir1 | goto gen_arith32;
|
892 | 8289b279 | blueswir1 | #endif
|
893 | 8289b279 | blueswir1 | case INDEX_op_divu2_i32:
|
894 | 8289b279 | blueswir1 | #if defined(__sparc_v9__) || defined(__sparc_v8plus__)
|
895 | 8289b279 | blueswir1 | c = ARITH_UDIVX; |
896 | 8289b279 | blueswir1 | goto gen_arith32;
|
897 | 8289b279 | blueswir1 | #else
|
898 | 8289b279 | blueswir1 | tcg_out_sety(s, 0);
|
899 | 8289b279 | blueswir1 | c = ARITH_UDIV; |
900 | 8289b279 | blueswir1 | goto gen_arith32;
|
901 | 8289b279 | blueswir1 | #endif
|
902 | 8289b279 | blueswir1 | |
903 | 8289b279 | blueswir1 | case INDEX_op_brcond_i32:
|
904 | cf7c2ca5 | blueswir1 | tcg_out_brcond(s, args[2], args[0], args[1], const_args[1], |
905 | cf7c2ca5 | blueswir1 | args[3]);
|
906 | 8289b279 | blueswir1 | break;
|
907 | 8289b279 | blueswir1 | |
908 | 8289b279 | blueswir1 | case INDEX_op_qemu_ld8u:
|
909 | f5ef6aac | blueswir1 | tcg_out_qemu_ld(s, args, 0);
|
910 | 8289b279 | blueswir1 | break;
|
911 | 8289b279 | blueswir1 | case INDEX_op_qemu_ld8s:
|
912 | f5ef6aac | blueswir1 | tcg_out_qemu_ld(s, args, 0 | 4); |
913 | 8289b279 | blueswir1 | break;
|
914 | 8289b279 | blueswir1 | case INDEX_op_qemu_ld16u:
|
915 | f5ef6aac | blueswir1 | tcg_out_qemu_ld(s, args, 1);
|
916 | 8289b279 | blueswir1 | break;
|
917 | 8289b279 | blueswir1 | case INDEX_op_qemu_ld16s:
|
918 | f5ef6aac | blueswir1 | tcg_out_qemu_ld(s, args, 1 | 4); |
919 | 8289b279 | blueswir1 | break;
|
920 | 8289b279 | blueswir1 | case INDEX_op_qemu_ld32u:
|
921 | f5ef6aac | blueswir1 | tcg_out_qemu_ld(s, args, 2);
|
922 | 8289b279 | blueswir1 | break;
|
923 | 8289b279 | blueswir1 | case INDEX_op_qemu_ld32s:
|
924 | f5ef6aac | blueswir1 | tcg_out_qemu_ld(s, args, 2 | 4); |
925 | 8289b279 | blueswir1 | break;
|
926 | 8289b279 | blueswir1 | case INDEX_op_qemu_st8:
|
927 | f5ef6aac | blueswir1 | tcg_out_qemu_st(s, args, 0);
|
928 | 8289b279 | blueswir1 | break;
|
929 | 8289b279 | blueswir1 | case INDEX_op_qemu_st16:
|
930 | f5ef6aac | blueswir1 | tcg_out_qemu_st(s, args, 1);
|
931 | 8289b279 | blueswir1 | break;
|
932 | 8289b279 | blueswir1 | case INDEX_op_qemu_st32:
|
933 | f5ef6aac | blueswir1 | tcg_out_qemu_st(s, args, 2);
|
934 | 8289b279 | blueswir1 | break;
|
935 | 8289b279 | blueswir1 | |
936 | 8289b279 | blueswir1 | #if defined(__sparc_v9__) && !defined(__sparc_v8plus__)
|
937 | 8289b279 | blueswir1 | case INDEX_op_movi_i64:
|
938 | 8289b279 | blueswir1 | tcg_out_movi(s, TCG_TYPE_I64, args[0], args[1]); |
939 | 8289b279 | blueswir1 | break;
|
940 | 53cd9273 | blueswir1 | case INDEX_op_ld32s_i64:
|
941 | 53cd9273 | blueswir1 | tcg_out_ldst(s, args[0], args[1], args[2], LDSW); |
942 | 53cd9273 | blueswir1 | break;
|
943 | 8289b279 | blueswir1 | case INDEX_op_ld_i64:
|
944 | 8289b279 | blueswir1 | tcg_out_ldst(s, args[0], args[1], args[2], LDX); |
945 | 8289b279 | blueswir1 | break;
|
946 | 8289b279 | blueswir1 | case INDEX_op_st_i64:
|
947 | 8289b279 | blueswir1 | tcg_out_ldst(s, args[0], args[1], args[2], STX); |
948 | 8289b279 | blueswir1 | break;
|
949 | 8289b279 | blueswir1 | case INDEX_op_shl_i64:
|
950 | 8289b279 | blueswir1 | c = SHIFT_SLLX; |
951 | 8289b279 | blueswir1 | goto gen_arith32;
|
952 | 8289b279 | blueswir1 | case INDEX_op_shr_i64:
|
953 | 8289b279 | blueswir1 | c = SHIFT_SRLX; |
954 | 8289b279 | blueswir1 | goto gen_arith32;
|
955 | 8289b279 | blueswir1 | case INDEX_op_sar_i64:
|
956 | 8289b279 | blueswir1 | c = SHIFT_SRAX; |
957 | 8289b279 | blueswir1 | goto gen_arith32;
|
958 | 8289b279 | blueswir1 | case INDEX_op_mul_i64:
|
959 | 8289b279 | blueswir1 | c = ARITH_MULX; |
960 | 8289b279 | blueswir1 | goto gen_arith32;
|
961 | 8289b279 | blueswir1 | case INDEX_op_div2_i64:
|
962 | 53cd9273 | blueswir1 | c = ARITH_SDIVX; |
963 | 8289b279 | blueswir1 | goto gen_arith32;
|
964 | 8289b279 | blueswir1 | case INDEX_op_divu2_i64:
|
965 | 8289b279 | blueswir1 | c = ARITH_UDIVX; |
966 | 8289b279 | blueswir1 | goto gen_arith32;
|
967 | 8289b279 | blueswir1 | |
968 | 8289b279 | blueswir1 | case INDEX_op_brcond_i64:
|
969 | f5ef6aac | blueswir1 | tcg_out_brcond(s, args[2], args[0], args[1], const_args[1], |
970 | f5ef6aac | blueswir1 | args[3]);
|
971 | 8289b279 | blueswir1 | break;
|
972 | 8289b279 | blueswir1 | case INDEX_op_qemu_ld64:
|
973 | f5ef6aac | blueswir1 | tcg_out_qemu_ld(s, args, 3);
|
974 | 8289b279 | blueswir1 | break;
|
975 | 8289b279 | blueswir1 | case INDEX_op_qemu_st64:
|
976 | f5ef6aac | blueswir1 | tcg_out_qemu_st(s, args, 3);
|
977 | 8289b279 | blueswir1 | break;
|
978 | 8289b279 | blueswir1 | |
979 | 8289b279 | blueswir1 | #endif
|
980 | 53cd9273 | blueswir1 | gen_arith32:
|
981 | 53cd9273 | blueswir1 | if (const_args[2]) { |
982 | 53cd9273 | blueswir1 | tcg_out_arithi(s, args[0], args[1], args[2], c); |
983 | 53cd9273 | blueswir1 | } else {
|
984 | 53cd9273 | blueswir1 | tcg_out_arith(s, args[0], args[1], args[2], c); |
985 | 53cd9273 | blueswir1 | } |
986 | 53cd9273 | blueswir1 | break;
|
987 | 53cd9273 | blueswir1 | |
988 | 8289b279 | blueswir1 | default:
|
989 | 8289b279 | blueswir1 | fprintf(stderr, "unknown opcode 0x%x\n", opc);
|
990 | 8289b279 | blueswir1 | tcg_abort(); |
991 | 8289b279 | blueswir1 | } |
992 | 8289b279 | blueswir1 | } |
993 | 8289b279 | blueswir1 | |
994 | 8289b279 | blueswir1 | static const TCGTargetOpDef sparc_op_defs[] = { |
995 | 8289b279 | blueswir1 | { INDEX_op_exit_tb, { } }, |
996 | b3db8758 | blueswir1 | { INDEX_op_goto_tb, { } }, |
997 | 8289b279 | blueswir1 | { INDEX_op_call, { "ri" } },
|
998 | 8289b279 | blueswir1 | { INDEX_op_jmp, { "ri" } },
|
999 | 8289b279 | blueswir1 | { INDEX_op_br, { } }, |
1000 | 8289b279 | blueswir1 | |
1001 | 8289b279 | blueswir1 | { INDEX_op_mov_i32, { "r", "r" } }, |
1002 | 8289b279 | blueswir1 | { INDEX_op_movi_i32, { "r" } },
|
1003 | 8289b279 | blueswir1 | { INDEX_op_ld8u_i32, { "r", "r" } }, |
1004 | 8289b279 | blueswir1 | { INDEX_op_ld8s_i32, { "r", "r" } }, |
1005 | 8289b279 | blueswir1 | { INDEX_op_ld16u_i32, { "r", "r" } }, |
1006 | 8289b279 | blueswir1 | { INDEX_op_ld16s_i32, { "r", "r" } }, |
1007 | 8289b279 | blueswir1 | { INDEX_op_ld_i32, { "r", "r" } }, |
1008 | 8289b279 | blueswir1 | { INDEX_op_st8_i32, { "r", "r" } }, |
1009 | 8289b279 | blueswir1 | { INDEX_op_st16_i32, { "r", "r" } }, |
1010 | 8289b279 | blueswir1 | { INDEX_op_st_i32, { "r", "r" } }, |
1011 | 8289b279 | blueswir1 | |
1012 | 53cd9273 | blueswir1 | { INDEX_op_add_i32, { "r", "r", "rJ" } }, |
1013 | 53cd9273 | blueswir1 | { INDEX_op_mul_i32, { "r", "r", "rJ" } }, |
1014 | 8289b279 | blueswir1 | { INDEX_op_div2_i32, { "r", "r", "0", "1", "r" } }, |
1015 | 8289b279 | blueswir1 | { INDEX_op_divu2_i32, { "r", "r", "0", "1", "r" } }, |
1016 | 53cd9273 | blueswir1 | { INDEX_op_sub_i32, { "r", "r", "rJ" } }, |
1017 | 53cd9273 | blueswir1 | { INDEX_op_and_i32, { "r", "r", "rJ" } }, |
1018 | 53cd9273 | blueswir1 | { INDEX_op_or_i32, { "r", "r", "rJ" } }, |
1019 | 53cd9273 | blueswir1 | { INDEX_op_xor_i32, { "r", "r", "rJ" } }, |
1020 | 8289b279 | blueswir1 | |
1021 | 53cd9273 | blueswir1 | { INDEX_op_shl_i32, { "r", "r", "rJ" } }, |
1022 | 53cd9273 | blueswir1 | { INDEX_op_shr_i32, { "r", "r", "rJ" } }, |
1023 | 53cd9273 | blueswir1 | { INDEX_op_sar_i32, { "r", "r", "rJ" } }, |
1024 | 8289b279 | blueswir1 | |
1025 | 8289b279 | blueswir1 | { INDEX_op_brcond_i32, { "r", "ri" } }, |
1026 | 8289b279 | blueswir1 | |
1027 | 8289b279 | blueswir1 | { INDEX_op_qemu_ld8u, { "r", "L" } }, |
1028 | 8289b279 | blueswir1 | { INDEX_op_qemu_ld8s, { "r", "L" } }, |
1029 | 8289b279 | blueswir1 | { INDEX_op_qemu_ld16u, { "r", "L" } }, |
1030 | 8289b279 | blueswir1 | { INDEX_op_qemu_ld16s, { "r", "L" } }, |
1031 | 8289b279 | blueswir1 | { INDEX_op_qemu_ld32u, { "r", "L" } }, |
1032 | 8289b279 | blueswir1 | { INDEX_op_qemu_ld32s, { "r", "L" } }, |
1033 | 8289b279 | blueswir1 | |
1034 | 8289b279 | blueswir1 | { INDEX_op_qemu_st8, { "L", "L" } }, |
1035 | 8289b279 | blueswir1 | { INDEX_op_qemu_st16, { "L", "L" } }, |
1036 | 8289b279 | blueswir1 | { INDEX_op_qemu_st32, { "L", "L" } }, |
1037 | 8289b279 | blueswir1 | |
1038 | 8289b279 | blueswir1 | #if defined(__sparc_v9__) && !defined(__sparc_v8plus__)
|
1039 | 8289b279 | blueswir1 | { INDEX_op_mov_i64, { "r", "r" } }, |
1040 | 8289b279 | blueswir1 | { INDEX_op_movi_i64, { "r" } },
|
1041 | 8289b279 | blueswir1 | { INDEX_op_ld8u_i64, { "r", "r" } }, |
1042 | 8289b279 | blueswir1 | { INDEX_op_ld8s_i64, { "r", "r" } }, |
1043 | 8289b279 | blueswir1 | { INDEX_op_ld16u_i64, { "r", "r" } }, |
1044 | 8289b279 | blueswir1 | { INDEX_op_ld16s_i64, { "r", "r" } }, |
1045 | 8289b279 | blueswir1 | { INDEX_op_ld32u_i64, { "r", "r" } }, |
1046 | 8289b279 | blueswir1 | { INDEX_op_ld32s_i64, { "r", "r" } }, |
1047 | 8289b279 | blueswir1 | { INDEX_op_ld_i64, { "r", "r" } }, |
1048 | 8289b279 | blueswir1 | { INDEX_op_st8_i64, { "r", "r" } }, |
1049 | 8289b279 | blueswir1 | { INDEX_op_st16_i64, { "r", "r" } }, |
1050 | 8289b279 | blueswir1 | { INDEX_op_st32_i64, { "r", "r" } }, |
1051 | 8289b279 | blueswir1 | { INDEX_op_st_i64, { "r", "r" } }, |
1052 | 8289b279 | blueswir1 | |
1053 | 53cd9273 | blueswir1 | { INDEX_op_add_i64, { "r", "r", "rJ" } }, |
1054 | 53cd9273 | blueswir1 | { INDEX_op_mul_i64, { "r", "r", "rJ" } }, |
1055 | 8289b279 | blueswir1 | { INDEX_op_div2_i64, { "r", "r", "0", "1", "r" } }, |
1056 | 8289b279 | blueswir1 | { INDEX_op_divu2_i64, { "r", "r", "0", "1", "r" } }, |
1057 | 53cd9273 | blueswir1 | { INDEX_op_sub_i64, { "r", "r", "rJ" } }, |
1058 | 53cd9273 | blueswir1 | { INDEX_op_and_i64, { "r", "r", "rJ" } }, |
1059 | 53cd9273 | blueswir1 | { INDEX_op_or_i64, { "r", "r", "rJ" } }, |
1060 | 53cd9273 | blueswir1 | { INDEX_op_xor_i64, { "r", "r", "rJ" } }, |
1061 | 8289b279 | blueswir1 | |
1062 | 53cd9273 | blueswir1 | { INDEX_op_shl_i64, { "r", "r", "rJ" } }, |
1063 | 53cd9273 | blueswir1 | { INDEX_op_shr_i64, { "r", "r", "rJ" } }, |
1064 | 53cd9273 | blueswir1 | { INDEX_op_sar_i64, { "r", "r", "rJ" } }, |
1065 | 8289b279 | blueswir1 | |
1066 | 8289b279 | blueswir1 | { INDEX_op_brcond_i64, { "r", "ri" } }, |
1067 | 8289b279 | blueswir1 | #endif
|
1068 | 8289b279 | blueswir1 | { -1 },
|
1069 | 8289b279 | blueswir1 | }; |
1070 | 8289b279 | blueswir1 | |
1071 | 8289b279 | blueswir1 | void tcg_target_init(TCGContext *s)
|
1072 | 8289b279 | blueswir1 | { |
1073 | 8289b279 | blueswir1 | tcg_regset_set32(tcg_target_available_regs[TCG_TYPE_I32], 0, 0xffffffff); |
1074 | 8289b279 | blueswir1 | #if defined(__sparc_v9__) && !defined(__sparc_v8plus__)
|
1075 | 8289b279 | blueswir1 | tcg_regset_set32(tcg_target_available_regs[TCG_TYPE_I64], 0, 0xffffffff); |
1076 | 8289b279 | blueswir1 | #endif
|
1077 | 8289b279 | blueswir1 | tcg_regset_set32(tcg_target_call_clobber_regs, 0,
|
1078 | b3db8758 | blueswir1 | (1 << TCG_REG_G1) |
|
1079 | b3db8758 | blueswir1 | (1 << TCG_REG_G2) |
|
1080 | b3db8758 | blueswir1 | (1 << TCG_REG_G3) |
|
1081 | b3db8758 | blueswir1 | (1 << TCG_REG_G4) |
|
1082 | b3db8758 | blueswir1 | (1 << TCG_REG_G5) |
|
1083 | b3db8758 | blueswir1 | (1 << TCG_REG_G6) |
|
1084 | b3db8758 | blueswir1 | (1 << TCG_REG_G7) |
|
1085 | 8289b279 | blueswir1 | (1 << TCG_REG_O0) |
|
1086 | 8289b279 | blueswir1 | (1 << TCG_REG_O1) |
|
1087 | 8289b279 | blueswir1 | (1 << TCG_REG_O2) |
|
1088 | 8289b279 | blueswir1 | (1 << TCG_REG_O3) |
|
1089 | 8289b279 | blueswir1 | (1 << TCG_REG_O4) |
|
1090 | 8289b279 | blueswir1 | (1 << TCG_REG_O5) |
|
1091 | 8289b279 | blueswir1 | (1 << TCG_REG_O7));
|
1092 | 8289b279 | blueswir1 | |
1093 | 8289b279 | blueswir1 | tcg_regset_clear(s->reserved_regs); |
1094 | 8289b279 | blueswir1 | tcg_regset_set_reg(s->reserved_regs, TCG_REG_G0); |
1095 | 53cd9273 | blueswir1 | tcg_regset_set_reg(s->reserved_regs, TCG_REG_I5); // for internal use
|
1096 | 8289b279 | blueswir1 | tcg_regset_set_reg(s->reserved_regs, TCG_REG_I6); |
1097 | 8289b279 | blueswir1 | tcg_regset_set_reg(s->reserved_regs, TCG_REG_I7); |
1098 | 8289b279 | blueswir1 | tcg_regset_set_reg(s->reserved_regs, TCG_REG_O6); |
1099 | 8289b279 | blueswir1 | tcg_regset_set_reg(s->reserved_regs, TCG_REG_O7); |
1100 | 8289b279 | blueswir1 | tcg_add_target_add_op_defs(sparc_op_defs); |
1101 | 8289b279 | blueswir1 | } |