Revision 703eaf37
| b/target-mips/translate.c | ||
|---|---|---|
| 2190 | 2190 |
case 20: |
| 2191 | 2191 |
switch (sel) {
|
| 2192 | 2192 |
case 0: |
| 2193 |
/* 64 bit MMU only */
|
|
| 2193 |
#ifdef TARGET_MIPS64
|
|
| 2194 | 2194 |
gen_op_mfc0_xcontext(); |
| 2195 | 2195 |
rn = "XContext"; |
| 2196 | 2196 |
break; |
| 2197 |
#endif |
|
| 2197 | 2198 |
default: |
| 2198 | 2199 |
goto die; |
| 2199 | 2200 |
} |
| ... | ... | |
| 2788 | 2789 |
case 20: |
| 2789 | 2790 |
switch (sel) {
|
| 2790 | 2791 |
case 0: |
| 2791 |
/* 64 bit MMU only */
|
|
| 2792 |
#ifdef TARGET_MIPS64
|
|
| 2792 | 2793 |
/* Nothing writable in lower 32 bits */ |
| 2793 | 2794 |
rn = "XContext"; |
| 2794 | 2795 |
break; |
| 2796 |
#endif |
|
| 2795 | 2797 |
default: |
| 2796 | 2798 |
goto die; |
| 2797 | 2799 |
} |
| ... | ... | |
| 3377 | 3379 |
case 20: |
| 3378 | 3380 |
switch (sel) {
|
| 3379 | 3381 |
case 0: |
| 3380 |
/* 64 bit MMU only */
|
|
| 3382 |
#ifdef TARGET_MIPS64
|
|
| 3381 | 3383 |
gen_op_dmfc0_xcontext(); |
| 3382 | 3384 |
rn = "XContext"; |
| 3383 | 3385 |
break; |
| 3386 |
#endif |
|
| 3384 | 3387 |
default: |
| 3385 | 3388 |
goto die; |
| 3386 | 3389 |
} |
| ... | ... | |
| 3966 | 3969 |
case 20: |
| 3967 | 3970 |
switch (sel) {
|
| 3968 | 3971 |
case 0: |
| 3969 |
/* 64 bit MMU only */
|
|
| 3972 |
#ifdef TARGET_MIPS64
|
|
| 3970 | 3973 |
gen_op_dmtc0_xcontext(); |
| 3971 | 3974 |
rn = "XContext"; |
| 3972 | 3975 |
break; |
| 3976 |
#endif |
|
| 3973 | 3977 |
default: |
| 3974 | 3978 |
goto die; |
| 3975 | 3979 |
} |
Also available in: Unified diff