root / hw / omap_synctimer.c @ 7063f49f
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1 | 011d87d0 | cmchao | /*
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2 | 011d87d0 | cmchao | * TI OMAP2 32kHz sync timer emulation.
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3 | 011d87d0 | cmchao | *
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4 | 011d87d0 | cmchao | * Copyright (C) 2007-2008 Nokia Corporation
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5 | 011d87d0 | cmchao | * Written by Andrzej Zaborowski <andrew@openedhand.com>
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6 | 011d87d0 | cmchao | *
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7 | 011d87d0 | cmchao | * This program is free software; you can redistribute it and/or
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8 | 011d87d0 | cmchao | * modify it under the terms of the GNU General Public License as
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9 | 011d87d0 | cmchao | * published by the Free Software Foundation; either version 2 or
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10 | 011d87d0 | cmchao | * (at your option) any later version of the License.
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11 | 011d87d0 | cmchao | *
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12 | 011d87d0 | cmchao | * This program is distributed in the hope that it will be useful,
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13 | 011d87d0 | cmchao | * but WITHOUT ANY WARRANTY; without even the implied warranty of
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14 | 011d87d0 | cmchao | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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15 | 011d87d0 | cmchao | * GNU General Public License for more details.
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16 | 011d87d0 | cmchao | *
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17 | 011d87d0 | cmchao | * You should have received a copy of the GNU General Public License along
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18 | 011d87d0 | cmchao | * with this program; if not, see <http://www.gnu.org/licenses/>.
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19 | 011d87d0 | cmchao | */
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20 | 011d87d0 | cmchao | #include "hw.h" |
21 | 011d87d0 | cmchao | #include "qemu-timer.h" |
22 | 011d87d0 | cmchao | #include "omap.h" |
23 | 011d87d0 | cmchao | struct omap_synctimer_s {
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24 | 011d87d0 | cmchao | uint32_t val; |
25 | 011d87d0 | cmchao | uint16_t readh; |
26 | 011d87d0 | cmchao | }; |
27 | 011d87d0 | cmchao | |
28 | 011d87d0 | cmchao | /* 32-kHz Sync Timer of the OMAP2 */
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29 | 011d87d0 | cmchao | static uint32_t omap_synctimer_read(struct omap_synctimer_s *s) { |
30 | 011d87d0 | cmchao | return muldiv64(qemu_get_clock(vm_clock), 0x8000, get_ticks_per_sec()); |
31 | 011d87d0 | cmchao | } |
32 | 011d87d0 | cmchao | |
33 | 011d87d0 | cmchao | void omap_synctimer_reset(struct omap_synctimer_s *s) |
34 | 011d87d0 | cmchao | { |
35 | 011d87d0 | cmchao | s->val = omap_synctimer_read(s); |
36 | 011d87d0 | cmchao | } |
37 | 011d87d0 | cmchao | |
38 | 011d87d0 | cmchao | static uint32_t omap_synctimer_readw(void *opaque, target_phys_addr_t addr) |
39 | 011d87d0 | cmchao | { |
40 | 011d87d0 | cmchao | struct omap_synctimer_s *s = (struct omap_synctimer_s *) opaque; |
41 | 011d87d0 | cmchao | |
42 | 011d87d0 | cmchao | switch (addr) {
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43 | 011d87d0 | cmchao | case 0x00: /* 32KSYNCNT_REV */ |
44 | 011d87d0 | cmchao | return 0x21; |
45 | 011d87d0 | cmchao | |
46 | 011d87d0 | cmchao | case 0x10: /* CR */ |
47 | 011d87d0 | cmchao | return omap_synctimer_read(s) - s->val;
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48 | 011d87d0 | cmchao | } |
49 | 011d87d0 | cmchao | |
50 | 011d87d0 | cmchao | OMAP_BAD_REG(addr); |
51 | 011d87d0 | cmchao | return 0; |
52 | 011d87d0 | cmchao | } |
53 | 011d87d0 | cmchao | |
54 | 011d87d0 | cmchao | static uint32_t omap_synctimer_readh(void *opaque, target_phys_addr_t addr) |
55 | 011d87d0 | cmchao | { |
56 | 011d87d0 | cmchao | struct omap_synctimer_s *s = (struct omap_synctimer_s *) opaque; |
57 | 011d87d0 | cmchao | uint32_t ret; |
58 | 011d87d0 | cmchao | |
59 | 011d87d0 | cmchao | if (addr & 2) |
60 | 011d87d0 | cmchao | return s->readh;
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61 | 011d87d0 | cmchao | else {
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62 | 011d87d0 | cmchao | ret = omap_synctimer_readw(opaque, addr); |
63 | 011d87d0 | cmchao | s->readh = ret >> 16;
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64 | 011d87d0 | cmchao | return ret & 0xffff; |
65 | 011d87d0 | cmchao | } |
66 | 011d87d0 | cmchao | } |
67 | 011d87d0 | cmchao | |
68 | 011d87d0 | cmchao | static CPUReadMemoryFunc * const omap_synctimer_readfn[] = { |
69 | 011d87d0 | cmchao | omap_badwidth_read32, |
70 | 011d87d0 | cmchao | omap_synctimer_readh, |
71 | 011d87d0 | cmchao | omap_synctimer_readw, |
72 | 011d87d0 | cmchao | }; |
73 | 011d87d0 | cmchao | |
74 | 011d87d0 | cmchao | static void omap_synctimer_write(void *opaque, target_phys_addr_t addr, |
75 | 011d87d0 | cmchao | uint32_t value) |
76 | 011d87d0 | cmchao | { |
77 | 011d87d0 | cmchao | OMAP_BAD_REG(addr); |
78 | 011d87d0 | cmchao | } |
79 | 011d87d0 | cmchao | |
80 | 011d87d0 | cmchao | static CPUWriteMemoryFunc * const omap_synctimer_writefn[] = { |
81 | 011d87d0 | cmchao | omap_badwidth_write32, |
82 | 011d87d0 | cmchao | omap_synctimer_write, |
83 | 011d87d0 | cmchao | omap_synctimer_write, |
84 | 011d87d0 | cmchao | }; |
85 | 011d87d0 | cmchao | |
86 | 011d87d0 | cmchao | struct omap_synctimer_s *omap_synctimer_init(struct omap_target_agent_s *ta, |
87 | 011d87d0 | cmchao | struct omap_mpu_state_s *mpu, omap_clk fclk, omap_clk iclk)
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88 | 011d87d0 | cmchao | { |
89 | 011d87d0 | cmchao | struct omap_synctimer_s *s = qemu_mallocz(sizeof(*s)); |
90 | 011d87d0 | cmchao | |
91 | 011d87d0 | cmchao | omap_synctimer_reset(s); |
92 | 011d87d0 | cmchao | omap_l4_attach(ta, 0, l4_register_io_memory(
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93 | 011d87d0 | cmchao | omap_synctimer_readfn, omap_synctimer_writefn, s)); |
94 | 011d87d0 | cmchao | |
95 | 011d87d0 | cmchao | return s;
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96 | 011d87d0 | cmchao | } |