Statistics
| Branch: | Revision:

root / hw / virtio-pci.c @ 70cca6d8

History | View | Annotate | Download (18 kB)

1
/*
2
 * Virtio PCI Bindings
3
 *
4
 * Copyright IBM, Corp. 2007
5
 * Copyright (c) 2009 CodeSourcery
6
 *
7
 * Authors:
8
 *  Anthony Liguori   <aliguori@us.ibm.com>
9
 *  Paul Brook        <paul@codesourcery.com>
10
 *
11
 * This work is licensed under the terms of the GNU GPL, version 2.  See
12
 * the COPYING file in the top-level directory.
13
 *
14
 */
15

    
16
#include <inttypes.h>
17

    
18
#include "virtio.h"
19
#include "pci.h"
20
#include "sysemu.h"
21
#include "msix.h"
22
#include "net.h"
23
#include "loader.h"
24

    
25
/* from Linux's linux/virtio_pci.h */
26

    
27
/* A 32-bit r/o bitmask of the features supported by the host */
28
#define VIRTIO_PCI_HOST_FEATURES        0
29

    
30
/* A 32-bit r/w bitmask of features activated by the guest */
31
#define VIRTIO_PCI_GUEST_FEATURES       4
32

    
33
/* A 32-bit r/w PFN for the currently selected queue */
34
#define VIRTIO_PCI_QUEUE_PFN            8
35

    
36
/* A 16-bit r/o queue size for the currently selected queue */
37
#define VIRTIO_PCI_QUEUE_NUM            12
38

    
39
/* A 16-bit r/w queue selector */
40
#define VIRTIO_PCI_QUEUE_SEL            14
41

    
42
/* A 16-bit r/w queue notifier */
43
#define VIRTIO_PCI_QUEUE_NOTIFY         16
44

    
45
/* An 8-bit device status register.  */
46
#define VIRTIO_PCI_STATUS               18
47

    
48
/* An 8-bit r/o interrupt status register.  Reading the value will return the
49
 * current contents of the ISR and will also clear it.  This is effectively
50
 * a read-and-acknowledge. */
51
#define VIRTIO_PCI_ISR                  19
52

    
53
/* MSI-X registers: only enabled if MSI-X is enabled. */
54
/* A 16-bit vector for configuration changes. */
55
#define VIRTIO_MSI_CONFIG_VECTOR        20
56
/* A 16-bit vector for selected queue notifications. */
57
#define VIRTIO_MSI_QUEUE_VECTOR         22
58

    
59
/* Config space size */
60
#define VIRTIO_PCI_CONFIG_NOMSI         20
61
#define VIRTIO_PCI_CONFIG_MSI           24
62
#define VIRTIO_PCI_REGION_SIZE(dev)     (msix_present(dev) ? \
63
                                         VIRTIO_PCI_CONFIG_MSI : \
64
                                         VIRTIO_PCI_CONFIG_NOMSI)
65

    
66
/* The remaining space is defined by each driver as the per-driver
67
 * configuration space */
68
#define VIRTIO_PCI_CONFIG(dev)          (msix_enabled(dev) ? \
69
                                         VIRTIO_PCI_CONFIG_MSI : \
70
                                         VIRTIO_PCI_CONFIG_NOMSI)
71

    
72
/* Virtio ABI version, if we increment this, we break the guest driver. */
73
#define VIRTIO_PCI_ABI_VERSION          0
74

    
75
/* How many bits to shift physical queue address written to QUEUE_PFN.
76
 * 12 is historical, and due to x86 page size. */
77
#define VIRTIO_PCI_QUEUE_ADDR_SHIFT    12
78

    
79
/* QEMU doesn't strictly need write barriers since everything runs in
80
 * lock-step.  We'll leave the calls to wmb() in though to make it obvious for
81
 * KVM or if kqemu gets SMP support.
82
 */
83
#define wmb() do { } while (0)
84

    
85
/* PCI bindings.  */
86

    
87
typedef struct {
88
    PCIDevice pci_dev;
89
    VirtIODevice *vdev;
90
    uint32_t addr;
91
    uint32_t class_code;
92
    uint32_t nvectors;
93
    DriveInfo *dinfo;
94
    NICConf nic;
95
} VirtIOPCIProxy;
96

    
97
/* virtio device */
98

    
99
static void virtio_pci_notify(void *opaque, uint16_t vector)
100
{
101
    VirtIOPCIProxy *proxy = opaque;
102
    if (msix_enabled(&proxy->pci_dev))
103
        msix_notify(&proxy->pci_dev, vector);
104
    else
105
        qemu_set_irq(proxy->pci_dev.irq[0], proxy->vdev->isr & 1);
106
}
107

    
108
static void virtio_pci_save_config(void * opaque, QEMUFile *f)
109
{
110
    VirtIOPCIProxy *proxy = opaque;
111
    pci_device_save(&proxy->pci_dev, f);
112
    msix_save(&proxy->pci_dev, f);
113
    if (msix_present(&proxy->pci_dev))
114
        qemu_put_be16(f, proxy->vdev->config_vector);
115
}
116

    
117
static void virtio_pci_save_queue(void * opaque, int n, QEMUFile *f)
118
{
119
    VirtIOPCIProxy *proxy = opaque;
120
    if (msix_present(&proxy->pci_dev))
121
        qemu_put_be16(f, virtio_queue_vector(proxy->vdev, n));
122
}
123

    
124
static int virtio_pci_load_config(void * opaque, QEMUFile *f)
125
{
126
    VirtIOPCIProxy *proxy = opaque;
127
    int ret;
128
    ret = pci_device_load(&proxy->pci_dev, f);
129
    if (ret) {
130
        return ret;
131
    }
132
    msix_load(&proxy->pci_dev, f);
133
    if (msix_present(&proxy->pci_dev)) {
134
        qemu_get_be16s(f, &proxy->vdev->config_vector);
135
    } else {
136
        proxy->vdev->config_vector = VIRTIO_NO_VECTOR;
137
    }
138
    if (proxy->vdev->config_vector != VIRTIO_NO_VECTOR) {
139
        return msix_vector_use(&proxy->pci_dev, proxy->vdev->config_vector);
140
    }
141
    return 0;
142
}
143

    
144
static int virtio_pci_load_queue(void * opaque, int n, QEMUFile *f)
145
{
146
    VirtIOPCIProxy *proxy = opaque;
147
    uint16_t vector;
148
    if (msix_present(&proxy->pci_dev)) {
149
        qemu_get_be16s(f, &vector);
150
    } else {
151
        vector = VIRTIO_NO_VECTOR;
152
    }
153
    virtio_queue_set_vector(proxy->vdev, n, vector);
154
    if (vector != VIRTIO_NO_VECTOR) {
155
        return msix_vector_use(&proxy->pci_dev, vector);
156
    }
157
    return 0;
158
}
159

    
160
static void virtio_pci_reset(DeviceState *d)
161
{
162
    VirtIOPCIProxy *proxy = container_of(d, VirtIOPCIProxy, pci_dev.qdev);
163
    virtio_reset(proxy->vdev);
164
    msix_reset(&proxy->pci_dev);
165
}
166

    
167
static void virtio_ioport_write(void *opaque, uint32_t addr, uint32_t val)
168
{
169
    VirtIOPCIProxy *proxy = opaque;
170
    VirtIODevice *vdev = proxy->vdev;
171
    target_phys_addr_t pa;
172

    
173
    switch (addr) {
174
    case VIRTIO_PCI_GUEST_FEATURES:
175
        /* Guest does not negotiate properly?  We have to assume nothing. */
176
        if (val & (1 << VIRTIO_F_BAD_FEATURE)) {
177
            if (vdev->bad_features)
178
                val = vdev->bad_features(vdev);
179
            else
180
                val = 0;
181
        }
182
        if (vdev->set_features)
183
            vdev->set_features(vdev, val);
184
        vdev->features = val;
185
        break;
186
    case VIRTIO_PCI_QUEUE_PFN:
187
        pa = (target_phys_addr_t)val << VIRTIO_PCI_QUEUE_ADDR_SHIFT;
188
        if (pa == 0) {
189
            virtio_reset(proxy->vdev);
190
            msix_unuse_all_vectors(&proxy->pci_dev);
191
        }
192
        else
193
            virtio_queue_set_addr(vdev, vdev->queue_sel, pa);
194
        break;
195
    case VIRTIO_PCI_QUEUE_SEL:
196
        if (val < VIRTIO_PCI_QUEUE_MAX)
197
            vdev->queue_sel = val;
198
        break;
199
    case VIRTIO_PCI_QUEUE_NOTIFY:
200
        virtio_queue_notify(vdev, val);
201
        break;
202
    case VIRTIO_PCI_STATUS:
203
        vdev->status = val & 0xFF;
204
        if (vdev->status == 0) {
205
            virtio_reset(proxy->vdev);
206
            msix_unuse_all_vectors(&proxy->pci_dev);
207
        }
208
        break;
209
    case VIRTIO_MSI_CONFIG_VECTOR:
210
        msix_vector_unuse(&proxy->pci_dev, vdev->config_vector);
211
        /* Make it possible for guest to discover an error took place. */
212
        if (msix_vector_use(&proxy->pci_dev, val) < 0)
213
            val = VIRTIO_NO_VECTOR;
214
        vdev->config_vector = val;
215
        break;
216
    case VIRTIO_MSI_QUEUE_VECTOR:
217
        msix_vector_unuse(&proxy->pci_dev,
218
                          virtio_queue_vector(vdev, vdev->queue_sel));
219
        /* Make it possible for guest to discover an error took place. */
220
        if (msix_vector_use(&proxy->pci_dev, val) < 0)
221
            val = VIRTIO_NO_VECTOR;
222
        virtio_queue_set_vector(vdev, vdev->queue_sel, val);
223
        break;
224
    default:
225
        fprintf(stderr, "%s: unexpected address 0x%x value 0x%x\n",
226
                __func__, addr, val);
227
        break;
228
    }
229
}
230

    
231
static uint32_t virtio_ioport_read(VirtIOPCIProxy *proxy, uint32_t addr)
232
{
233
    VirtIODevice *vdev = proxy->vdev;
234
    uint32_t ret = 0xFFFFFFFF;
235

    
236
    switch (addr) {
237
    case VIRTIO_PCI_HOST_FEATURES:
238
        ret = vdev->get_features(vdev);
239
        ret |= (1 << VIRTIO_F_NOTIFY_ON_EMPTY);
240
        ret |= (1 << VIRTIO_RING_F_INDIRECT_DESC);
241
        ret |= (1 << VIRTIO_F_BAD_FEATURE);
242
        break;
243
    case VIRTIO_PCI_GUEST_FEATURES:
244
        ret = vdev->features;
245
        break;
246
    case VIRTIO_PCI_QUEUE_PFN:
247
        ret = virtio_queue_get_addr(vdev, vdev->queue_sel)
248
              >> VIRTIO_PCI_QUEUE_ADDR_SHIFT;
249
        break;
250
    case VIRTIO_PCI_QUEUE_NUM:
251
        ret = virtio_queue_get_num(vdev, vdev->queue_sel);
252
        break;
253
    case VIRTIO_PCI_QUEUE_SEL:
254
        ret = vdev->queue_sel;
255
        break;
256
    case VIRTIO_PCI_STATUS:
257
        ret = vdev->status;
258
        break;
259
    case VIRTIO_PCI_ISR:
260
        /* reading from the ISR also clears it. */
261
        ret = vdev->isr;
262
        vdev->isr = 0;
263
        qemu_set_irq(proxy->pci_dev.irq[0], 0);
264
        break;
265
    case VIRTIO_MSI_CONFIG_VECTOR:
266
        ret = vdev->config_vector;
267
        break;
268
    case VIRTIO_MSI_QUEUE_VECTOR:
269
        ret = virtio_queue_vector(vdev, vdev->queue_sel);
270
        break;
271
    default:
272
        break;
273
    }
274

    
275
    return ret;
276
}
277

    
278
static uint32_t virtio_pci_config_readb(void *opaque, uint32_t addr)
279
{
280
    VirtIOPCIProxy *proxy = opaque;
281
    uint32_t config = VIRTIO_PCI_CONFIG(&proxy->pci_dev);
282
    addr -= proxy->addr;
283
    if (addr < config)
284
        return virtio_ioport_read(proxy, addr);
285
    addr -= config;
286
    return virtio_config_readb(proxy->vdev, addr);
287
}
288

    
289
static uint32_t virtio_pci_config_readw(void *opaque, uint32_t addr)
290
{
291
    VirtIOPCIProxy *proxy = opaque;
292
    uint32_t config = VIRTIO_PCI_CONFIG(&proxy->pci_dev);
293
    addr -= proxy->addr;
294
    if (addr < config)
295
        return virtio_ioport_read(proxy, addr);
296
    addr -= config;
297
    return virtio_config_readw(proxy->vdev, addr);
298
}
299

    
300
static uint32_t virtio_pci_config_readl(void *opaque, uint32_t addr)
301
{
302
    VirtIOPCIProxy *proxy = opaque;
303
    uint32_t config = VIRTIO_PCI_CONFIG(&proxy->pci_dev);
304
    addr -= proxy->addr;
305
    if (addr < config)
306
        return virtio_ioport_read(proxy, addr);
307
    addr -= config;
308
    return virtio_config_readl(proxy->vdev, addr);
309
}
310

    
311
static void virtio_pci_config_writeb(void *opaque, uint32_t addr, uint32_t val)
312
{
313
    VirtIOPCIProxy *proxy = opaque;
314
    uint32_t config = VIRTIO_PCI_CONFIG(&proxy->pci_dev);
315
    addr -= proxy->addr;
316
    if (addr < config) {
317
        virtio_ioport_write(proxy, addr, val);
318
        return;
319
    }
320
    addr -= config;
321
    virtio_config_writeb(proxy->vdev, addr, val);
322
}
323

    
324
static void virtio_pci_config_writew(void *opaque, uint32_t addr, uint32_t val)
325
{
326
    VirtIOPCIProxy *proxy = opaque;
327
    uint32_t config = VIRTIO_PCI_CONFIG(&proxy->pci_dev);
328
    addr -= proxy->addr;
329
    if (addr < config) {
330
        virtio_ioport_write(proxy, addr, val);
331
        return;
332
    }
333
    addr -= config;
334
    virtio_config_writew(proxy->vdev, addr, val);
335
}
336

    
337
static void virtio_pci_config_writel(void *opaque, uint32_t addr, uint32_t val)
338
{
339
    VirtIOPCIProxy *proxy = opaque;
340
    uint32_t config = VIRTIO_PCI_CONFIG(&proxy->pci_dev);
341
    addr -= proxy->addr;
342
    if (addr < config) {
343
        virtio_ioport_write(proxy, addr, val);
344
        return;
345
    }
346
    addr -= config;
347
    virtio_config_writel(proxy->vdev, addr, val);
348
}
349

    
350
static void virtio_map(PCIDevice *pci_dev, int region_num,
351
                       pcibus_t addr, pcibus_t size, int type)
352
{
353
    VirtIOPCIProxy *proxy = container_of(pci_dev, VirtIOPCIProxy, pci_dev);
354
    VirtIODevice *vdev = proxy->vdev;
355
    unsigned config_len = VIRTIO_PCI_REGION_SIZE(pci_dev) + vdev->config_len;
356

    
357
    proxy->addr = addr;
358

    
359
    register_ioport_write(addr, config_len, 1, virtio_pci_config_writeb, proxy);
360
    register_ioport_write(addr, config_len, 2, virtio_pci_config_writew, proxy);
361
    register_ioport_write(addr, config_len, 4, virtio_pci_config_writel, proxy);
362
    register_ioport_read(addr, config_len, 1, virtio_pci_config_readb, proxy);
363
    register_ioport_read(addr, config_len, 2, virtio_pci_config_readw, proxy);
364
    register_ioport_read(addr, config_len, 4, virtio_pci_config_readl, proxy);
365

    
366
    if (vdev->config_len)
367
        vdev->get_config(vdev, vdev->config);
368
}
369

    
370
static void virtio_write_config(PCIDevice *pci_dev, uint32_t address,
371
                                uint32_t val, int len)
372
{
373
    VirtIOPCIProxy *proxy = DO_UPCAST(VirtIOPCIProxy, pci_dev, pci_dev);
374

    
375
    if (PCI_COMMAND == address) {
376
        if (!(val & PCI_COMMAND_MASTER)) {
377
            proxy->vdev->status &= !VIRTIO_CONFIG_S_DRIVER_OK;
378
        }
379
    }
380

    
381
    pci_default_write_config(pci_dev, address, val, len);
382
    msix_write_config(pci_dev, address, val, len);
383
}
384

    
385
static const VirtIOBindings virtio_pci_bindings = {
386
    .notify = virtio_pci_notify,
387
    .save_config = virtio_pci_save_config,
388
    .load_config = virtio_pci_load_config,
389
    .save_queue = virtio_pci_save_queue,
390
    .load_queue = virtio_pci_load_queue,
391
};
392

    
393
static void virtio_init_pci(VirtIOPCIProxy *proxy, VirtIODevice *vdev,
394
                            uint16_t vendor, uint16_t device,
395
                            uint16_t class_code, uint8_t pif)
396
{
397
    uint8_t *config;
398
    uint32_t size;
399

    
400
    proxy->vdev = vdev;
401

    
402
    config = proxy->pci_dev.config;
403
    pci_config_set_vendor_id(config, vendor);
404
    pci_config_set_device_id(config, device);
405

    
406
    config[0x08] = VIRTIO_PCI_ABI_VERSION;
407

    
408
    config[0x09] = pif;
409
    pci_config_set_class(config, class_code);
410
    config[PCI_HEADER_TYPE] = PCI_HEADER_TYPE_NORMAL;
411

    
412
    config[0x2c] = vendor & 0xFF;
413
    config[0x2d] = (vendor >> 8) & 0xFF;
414
    config[0x2e] = vdev->device_id & 0xFF;
415
    config[0x2f] = (vdev->device_id >> 8) & 0xFF;
416

    
417
    config[0x3d] = 1;
418

    
419
    if (vdev->nvectors && !msix_init(&proxy->pci_dev, vdev->nvectors, 1, 0)) {
420
        pci_register_bar(&proxy->pci_dev, 1,
421
                         msix_bar_size(&proxy->pci_dev),
422
                         PCI_BASE_ADDRESS_SPACE_MEMORY,
423
                         msix_mmio_map);
424
    } else
425
        vdev->nvectors = 0;
426

    
427
    proxy->pci_dev.config_write = virtio_write_config;
428

    
429
    size = VIRTIO_PCI_REGION_SIZE(&proxy->pci_dev) + vdev->config_len;
430
    if (size & (size-1))
431
        size = 1 << qemu_fls(size);
432

    
433
    pci_register_bar(&proxy->pci_dev, 0, size, PCI_BASE_ADDRESS_SPACE_IO,
434
                           virtio_map);
435

    
436
    virtio_bind_device(vdev, &virtio_pci_bindings, proxy);
437
}
438

    
439
static int virtio_blk_init_pci(PCIDevice *pci_dev)
440
{
441
    VirtIOPCIProxy *proxy = DO_UPCAST(VirtIOPCIProxy, pci_dev, pci_dev);
442
    VirtIODevice *vdev;
443

    
444
    if (proxy->class_code != PCI_CLASS_STORAGE_SCSI &&
445
        proxy->class_code != PCI_CLASS_STORAGE_OTHER)
446
        proxy->class_code = PCI_CLASS_STORAGE_SCSI;
447

    
448
    if (!proxy->dinfo) {
449
        qemu_error("virtio-blk-pci: drive property not set\n");
450
        return -1;
451
    }
452
    vdev = virtio_blk_init(&pci_dev->qdev, proxy->dinfo);
453
    vdev->nvectors = proxy->nvectors;
454
    virtio_init_pci(proxy, vdev,
455
                    PCI_VENDOR_ID_REDHAT_QUMRANET,
456
                    PCI_DEVICE_ID_VIRTIO_BLOCK,
457
                    proxy->class_code, 0x00);
458
    /* make the actual value visible */
459
    proxy->nvectors = vdev->nvectors;
460
    return 0;
461
}
462

    
463
static int virtio_exit_pci(PCIDevice *pci_dev)
464
{
465
    return msix_uninit(pci_dev);
466
}
467

    
468
static int virtio_blk_exit_pci(PCIDevice *pci_dev)
469
{
470
    VirtIOPCIProxy *proxy = DO_UPCAST(VirtIOPCIProxy, pci_dev, pci_dev);
471

    
472
    drive_uninit(proxy->dinfo);
473
    return virtio_exit_pci(pci_dev);
474
}
475

    
476
static int virtio_console_init_pci(PCIDevice *pci_dev)
477
{
478
    VirtIOPCIProxy *proxy = DO_UPCAST(VirtIOPCIProxy, pci_dev, pci_dev);
479
    VirtIODevice *vdev;
480

    
481
    if (proxy->class_code != PCI_CLASS_COMMUNICATION_OTHER &&
482
        proxy->class_code != PCI_CLASS_DISPLAY_OTHER && /* qemu 0.10 */
483
        proxy->class_code != PCI_CLASS_OTHERS)          /* qemu-kvm  */
484
        proxy->class_code = PCI_CLASS_COMMUNICATION_OTHER;
485

    
486
    vdev = virtio_console_init(&pci_dev->qdev);
487
    if (!vdev) {
488
        return -1;
489
    }
490
    virtio_init_pci(proxy, vdev,
491
                    PCI_VENDOR_ID_REDHAT_QUMRANET,
492
                    PCI_DEVICE_ID_VIRTIO_CONSOLE,
493
                    proxy->class_code, 0x00);
494
    return 0;
495
}
496

    
497
static int virtio_net_init_pci(PCIDevice *pci_dev)
498
{
499
    VirtIOPCIProxy *proxy = DO_UPCAST(VirtIOPCIProxy, pci_dev, pci_dev);
500
    VirtIODevice *vdev;
501

    
502
    vdev = virtio_net_init(&pci_dev->qdev, &proxy->nic);
503

    
504
    vdev->nvectors = proxy->nvectors;
505
    virtio_init_pci(proxy, vdev,
506
                    PCI_VENDOR_ID_REDHAT_QUMRANET,
507
                    PCI_DEVICE_ID_VIRTIO_NET,
508
                    PCI_CLASS_NETWORK_ETHERNET,
509
                    0x00);
510

    
511
    /* make the actual value visible */
512
    proxy->nvectors = vdev->nvectors;
513

    
514
    if (!pci_dev->qdev.hotplugged) {
515
        static int loaded = 0;
516
        if (!loaded) {
517
            rom_add_option("pxe-virtio.bin");
518
            loaded = 1;
519
        }
520
    }
521
    return 0;
522
}
523

    
524
static int virtio_net_exit_pci(PCIDevice *pci_dev)
525
{
526
    VirtIOPCIProxy *proxy = DO_UPCAST(VirtIOPCIProxy, pci_dev, pci_dev);
527

    
528
    virtio_net_exit(proxy->vdev);
529
    return virtio_exit_pci(pci_dev);
530
}
531

    
532
static int virtio_balloon_init_pci(PCIDevice *pci_dev)
533
{
534
    VirtIOPCIProxy *proxy = DO_UPCAST(VirtIOPCIProxy, pci_dev, pci_dev);
535
    VirtIODevice *vdev;
536

    
537
    vdev = virtio_balloon_init(&pci_dev->qdev);
538
    virtio_init_pci(proxy, vdev,
539
                    PCI_VENDOR_ID_REDHAT_QUMRANET,
540
                    PCI_DEVICE_ID_VIRTIO_BALLOON,
541
                    PCI_CLASS_MEMORY_RAM,
542
                    0x00);
543
    return 0;
544
}
545

    
546
static PCIDeviceInfo virtio_info[] = {
547
    {
548
        .qdev.name = "virtio-blk-pci",
549
        .qdev.size = sizeof(VirtIOPCIProxy),
550
        .init      = virtio_blk_init_pci,
551
        .exit      = virtio_blk_exit_pci,
552
        .qdev.props = (Property[]) {
553
            DEFINE_PROP_HEX32("class", VirtIOPCIProxy, class_code, 0),
554
            DEFINE_PROP_DRIVE("drive", VirtIOPCIProxy, dinfo),
555
            DEFINE_PROP_UINT32("vectors", VirtIOPCIProxy, nvectors, 2),
556
            DEFINE_PROP_END_OF_LIST(),
557
        },
558
        .qdev.reset = virtio_pci_reset,
559
    },{
560
        .qdev.name  = "virtio-net-pci",
561
        .qdev.size  = sizeof(VirtIOPCIProxy),
562
        .init       = virtio_net_init_pci,
563
        .exit       = virtio_net_exit_pci,
564
        .qdev.props = (Property[]) {
565
            DEFINE_PROP_UINT32("vectors", VirtIOPCIProxy, nvectors, 3),
566
            DEFINE_NIC_PROPERTIES(VirtIOPCIProxy, nic),
567
            DEFINE_PROP_END_OF_LIST(),
568
        },
569
        .qdev.reset = virtio_pci_reset,
570
    },{
571
        .qdev.name = "virtio-console-pci",
572
        .qdev.size = sizeof(VirtIOPCIProxy),
573
        .init      = virtio_console_init_pci,
574
        .exit      = virtio_exit_pci,
575
        .qdev.props = (Property[]) {
576
            DEFINE_PROP_HEX32("class", VirtIOPCIProxy, class_code, 0),
577
            DEFINE_PROP_END_OF_LIST(),
578
        },
579
        .qdev.reset = virtio_pci_reset,
580
    },{
581
        .qdev.name = "virtio-balloon-pci",
582
        .qdev.size = sizeof(VirtIOPCIProxy),
583
        .init      = virtio_balloon_init_pci,
584
        .exit      = virtio_exit_pci,
585
        .qdev.reset = virtio_pci_reset,
586
    },{
587
        /* end of list */
588
    }
589
};
590

    
591
static void virtio_pci_register_devices(void)
592
{
593
    pci_qdev_register_many(virtio_info);
594
}
595

    
596
device_init(virtio_pci_register_devices)