root / target-ppc / op_helper.c @ 70ead434
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/*
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* PowerPC emulation helpers for qemu.
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*
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* Copyright (c) 2003-2005 Jocelyn Mayer
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*
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* This library is free software; you can redistribute it and/or
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* modify it under the terms of the GNU Lesser General Public
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* License as published by the Free Software Foundation; either
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* version 2 of the License, or (at your option) any later version.
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*
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* This library is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
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* Lesser General Public License for more details.
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*
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* You should have received a copy of the GNU Lesser General Public
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* License along with this library; if not, write to the Free Software
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* Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
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*/
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#include "exec.h" |
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#define MEMSUFFIX _raw
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#include "op_helper_mem.h" |
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#if !defined(CONFIG_USER_ONLY)
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#define MEMSUFFIX _user
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#include "op_helper_mem.h" |
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#define MEMSUFFIX _kernel
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#include "op_helper_mem.h" |
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#endif
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//#define DEBUG_OP
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//#define DEBUG_EXCEPTIONS
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//#define FLUSH_ALL_TLBS
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#define Ts0 (long)((target_long)T0) |
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#define Ts1 (long)((target_long)T1) |
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#define Ts2 (long)((target_long)T2) |
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/*****************************************************************************/
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/* Exceptions processing helpers */
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void cpu_loop_exit(void) |
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{
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longjmp(env->jmp_env, 1);
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} |
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void do_raise_exception_err (uint32_t exception, int error_code) |
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{
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#if 0
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printf("Raise exception %3x code : %d\n", exception, error_code);
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#endif
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switch (exception) {
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case EXCP_PROGRAM:
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if (error_code == EXCP_FP && msr_fe0 == 0 && msr_fe1 == 0) |
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return;
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break;
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default:
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break;
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} |
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env->exception_index = exception; |
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env->error_code = error_code; |
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cpu_loop_exit(); |
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} |
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void do_raise_exception (uint32_t exception)
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{
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do_raise_exception_err(exception, 0);
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} |
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/*****************************************************************************/
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/* Fixed point operations helpers */
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void do_addo (void) |
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{
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T2 = T0; |
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T0 += T1; |
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if (likely(!((T2 ^ T1 ^ (-1)) & (T2 ^ T0) & (1 << 31)))) { |
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xer_ov = 0;
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} else {
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xer_so = 1;
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xer_ov = 1;
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} |
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} |
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void do_addco (void) |
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{
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T2 = T0; |
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T0 += T1; |
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if (likely(T0 >= T2)) {
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xer_ca = 0;
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} else {
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xer_ca = 1;
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} |
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if (likely(!((T2 ^ T1 ^ (-1)) & (T2 ^ T0) & (1 << 31)))) { |
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xer_ov = 0;
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} else {
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xer_so = 1;
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xer_ov = 1;
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} |
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} |
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void do_adde (void) |
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{
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T2 = T0; |
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T0 += T1 + xer_ca; |
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if (likely(!(T0 < T2 || (xer_ca == 1 && T0 == T2)))) { |
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xer_ca = 0;
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} else {
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xer_ca = 1;
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} |
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} |
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void do_addeo (void) |
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{
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T2 = T0; |
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T0 += T1 + xer_ca; |
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if (likely(!(T0 < T2 || (xer_ca == 1 && T0 == T2)))) { |
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xer_ca = 0;
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} else {
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xer_ca = 1;
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} |
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if (likely(!((T2 ^ T1 ^ (-1)) & (T2 ^ T0) & (1 << 31)))) { |
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xer_ov = 0;
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} else {
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xer_so = 1;
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xer_ov = 1;
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} |
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} |
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void do_addmeo (void) |
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{
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T1 = T0; |
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T0 += xer_ca + (-1);
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if (likely(!(T1 & (T1 ^ T0) & (1 << 31)))) { |
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xer_ov = 0;
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} else {
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xer_so = 1;
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xer_ov = 1;
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} |
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if (likely(T1 != 0)) |
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xer_ca = 1;
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} |
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void do_addzeo (void) |
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{
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T1 = T0; |
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T0 += xer_ca; |
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if (likely(!((T1 ^ (-1)) & (T1 ^ T0) & (1 << 31)))) { |
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xer_ov = 0;
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} else {
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xer_so = 1;
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xer_ov = 1;
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} |
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if (likely(T0 >= T1)) {
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xer_ca = 0;
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} else {
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xer_ca = 1;
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} |
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} |
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void do_divwo (void) |
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{
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if (likely(!((Ts0 == INT32_MIN && Ts1 == -1) || Ts1 == 0))) { |
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xer_ov = 0;
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T0 = (Ts0 / Ts1); |
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} else {
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xer_so = 1;
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xer_ov = 1;
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T0 = (-1) * ((uint32_t)T0 >> 31); |
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} |
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} |
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void do_divwuo (void) |
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{
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if (likely((uint32_t)T1 != 0)) { |
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xer_ov = 0;
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T0 = (uint32_t)T0 / (uint32_t)T1; |
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} else {
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xer_so = 1;
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xer_ov = 1;
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T0 = 0;
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} |
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} |
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void do_mullwo (void) |
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{
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int64_t res = (int64_t)Ts0 * (int64_t)Ts1; |
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if (likely((int32_t)res == res)) {
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xer_ov = 0;
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} else {
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xer_ov = 1;
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xer_so = 1;
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} |
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T0 = (int32_t)res; |
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} |
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void do_nego (void) |
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{
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if (likely(T0 != INT32_MIN)) {
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xer_ov = 0;
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T0 = -Ts0; |
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} else {
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xer_ov = 1;
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xer_so = 1;
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} |
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} |
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void do_subfo (void) |
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{
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T2 = T0; |
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T0 = T1 - T0; |
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if (likely(!(((~T2) ^ T1 ^ (-1)) & ((~T2) ^ T0) & (1 << 31)))) { |
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xer_ov = 0;
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} else {
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xer_so = 1;
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xer_ov = 1;
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} |
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RETURN(); |
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} |
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void do_subfco (void) |
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{
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T2 = T0; |
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T0 = T1 - T0; |
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if (likely(T0 > T1)) {
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xer_ca = 0;
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} else {
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xer_ca = 1;
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} |
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if (likely(!(((~T2) ^ T1 ^ (-1)) & ((~T2) ^ T0) & (1 << 31)))) { |
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xer_ov = 0;
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} else {
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xer_so = 1;
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xer_ov = 1;
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} |
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} |
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void do_subfe (void) |
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{
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T0 = T1 + ~T0 + xer_ca; |
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if (likely(T0 >= T1 && (xer_ca == 0 || T0 != T1))) { |
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xer_ca = 0;
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} else {
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xer_ca = 1;
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} |
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} |
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void do_subfeo (void) |
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{
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T2 = T0; |
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T0 = T1 + ~T0 + xer_ca; |
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if (likely(!((~T2 ^ T1 ^ (-1)) & (~T2 ^ T0) & (1 << 31)))) { |
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xer_ov = 0;
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} else {
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xer_so = 1;
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xer_ov = 1;
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} |
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if (likely(T0 >= T1 && (xer_ca == 0 || T0 != T1))) { |
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xer_ca = 0;
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} else {
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xer_ca = 1;
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} |
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} |
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void do_subfmeo (void) |
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{
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T1 = T0; |
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T0 = ~T0 + xer_ca - 1;
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if (likely(!(~T1 & (~T1 ^ T0) & (1 << 31)))) { |
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xer_ov = 0;
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} else {
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xer_so = 1;
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xer_ov = 1;
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} |
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if (likely(T1 != -1)) |
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xer_ca = 1;
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} |
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void do_subfzeo (void) |
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{
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T1 = T0; |
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T0 = ~T0 + xer_ca; |
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if (likely(!((~T1 ^ (-1)) & ((~T1) ^ T0) & (1 << 31)))) { |
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xer_ov = 0;
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} else {
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xer_ov = 1;
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xer_so = 1;
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} |
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if (likely(T0 >= ~T1)) {
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xer_ca = 0;
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} else {
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xer_ca = 1;
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} |
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} |
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/* shift right arithmetic helper */
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void do_sraw (void) |
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{
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int32_t ret; |
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if (likely(!(T1 & 0x20UL))) { |
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if (likely(T1 != 0)) { |
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ret = (int32_t)T0 >> (T1 & 0x1fUL);
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if (likely(ret >= 0 || ((int32_t)T0 & ((1 << T1) - 1)) == 0)) { |
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xer_ca = 0;
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} else {
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xer_ca = 1;
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} |
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} else {
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ret = T0; |
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xer_ca = 0;
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} |
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} else {
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ret = (-1) * ((uint32_t)T0 >> 31); |
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if (likely(ret >= 0 || ((uint32_t)T0 & ~0x80000000UL) == 0)) { |
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xer_ca = 0;
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} else {
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xer_ca = 1;
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} |
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} |
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T0 = ret; |
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} |
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/*****************************************************************************/
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/* Floating point operations helpers */
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void do_fctiw (void) |
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{
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union {
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double d;
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uint64_t i; |
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} p; |
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/* XXX: higher bits are not supposed to be significant.
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* to make tests easier, return the same as a real PowerPC 750 (aka G3)
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*/
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p.i = float64_to_int32(FT0, &env->fp_status); |
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p.i |= 0xFFF80000ULL << 32; |
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FT0 = p.d; |
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} |
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void do_fctiwz (void) |
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{
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union {
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double d;
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uint64_t i; |
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} p; |
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/* XXX: higher bits are not supposed to be significant.
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* to make tests easier, return the same as a real PowerPC 750 (aka G3)
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*/
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p.i = float64_to_int32_round_to_zero(FT0, &env->fp_status); |
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p.i |= 0xFFF80000ULL << 32; |
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FT0 = p.d; |
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} |
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|
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void do_fnmadd (void) |
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{
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FT0 = float64_mul(FT0, FT1, &env->fp_status); |
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FT0 = float64_add(FT0, FT2, &env->fp_status); |
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if (likely(!isnan(FT0)))
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FT0 = float64_chs(FT0); |
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} |
| 362 |
|
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void do_fnmsub (void) |
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{
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FT0 = float64_mul(FT0, FT1, &env->fp_status); |
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FT0 = float64_sub(FT0, FT2, &env->fp_status); |
| 367 |
if (likely(!isnan(FT0)))
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FT0 = float64_chs(FT0); |
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} |
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|
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void do_fsqrt (void) |
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{
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FT0 = float64_sqrt(FT0, &env->fp_status); |
| 374 |
} |
| 375 |
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void do_fres (void) |
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{
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union {
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double d;
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uint64_t i; |
| 381 |
} p; |
| 382 |
|
| 383 |
if (likely(isnormal(FT0))) {
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FT0 = (float)(1.0 / FT0); |
| 385 |
} else {
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p.d = FT0; |
| 387 |
if (p.i == 0x8000000000000000ULL) { |
| 388 |
p.i = 0xFFF0000000000000ULL;
|
| 389 |
} else if (p.i == 0x0000000000000000ULL) { |
| 390 |
p.i = 0x7FF0000000000000ULL;
|
| 391 |
} else if (isnan(FT0)) { |
| 392 |
p.i = 0x7FF8000000000000ULL;
|
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} else if (FT0 < 0.0) { |
| 394 |
p.i = 0x8000000000000000ULL;
|
| 395 |
} else {
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| 396 |
p.i = 0x0000000000000000ULL;
|
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} |
| 398 |
FT0 = p.d; |
| 399 |
} |
| 400 |
} |
| 401 |
|
| 402 |
void do_frsqrte (void) |
| 403 |
{
|
| 404 |
union {
|
| 405 |
double d;
|
| 406 |
uint64_t i; |
| 407 |
} p; |
| 408 |
|
| 409 |
if (likely(isnormal(FT0) && FT0 > 0.0)) { |
| 410 |
FT0 = float64_sqrt(FT0, &env->fp_status); |
| 411 |
FT0 = float32_div(1.0, FT0, &env->fp_status); |
| 412 |
} else {
|
| 413 |
p.d = FT0; |
| 414 |
if (p.i == 0x8000000000000000ULL) { |
| 415 |
p.i = 0xFFF0000000000000ULL;
|
| 416 |
} else if (p.i == 0x0000000000000000ULL) { |
| 417 |
p.i = 0x7FF0000000000000ULL;
|
| 418 |
} else if (isnan(FT0)) { |
| 419 |
if (!(p.i & 0x0008000000000000ULL)) |
| 420 |
p.i |= 0x000FFFFFFFFFFFFFULL;
|
| 421 |
} else if (FT0 < 0) { |
| 422 |
p.i = 0x7FF8000000000000ULL;
|
| 423 |
} else {
|
| 424 |
p.i = 0x0000000000000000ULL;
|
| 425 |
} |
| 426 |
FT0 = p.d; |
| 427 |
} |
| 428 |
} |
| 429 |
|
| 430 |
void do_fsel (void) |
| 431 |
{
|
| 432 |
if (FT0 >= 0) |
| 433 |
FT0 = FT1; |
| 434 |
else
|
| 435 |
FT0 = FT2; |
| 436 |
} |
| 437 |
|
| 438 |
void do_fcmpu (void) |
| 439 |
{
|
| 440 |
if (likely(!isnan(FT0) && !isnan(FT1))) {
|
| 441 |
if (float64_lt(FT0, FT1, &env->fp_status)) {
|
| 442 |
T0 = 0x08UL;
|
| 443 |
} else if (!float64_le(FT0, FT1, &env->fp_status)) { |
| 444 |
T0 = 0x04UL;
|
| 445 |
} else {
|
| 446 |
T0 = 0x02UL;
|
| 447 |
} |
| 448 |
} else {
|
| 449 |
T0 = 0x01UL;
|
| 450 |
env->fpscr[4] |= 0x1; |
| 451 |
env->fpscr[6] |= 0x1; |
| 452 |
} |
| 453 |
env->fpscr[3] = T0;
|
| 454 |
} |
| 455 |
|
| 456 |
void do_fcmpo (void) |
| 457 |
{
|
| 458 |
env->fpscr[4] &= ~0x1; |
| 459 |
if (likely(!isnan(FT0) && !isnan(FT1))) {
|
| 460 |
if (float64_lt(FT0, FT1, &env->fp_status)) {
|
| 461 |
T0 = 0x08UL;
|
| 462 |
} else if (!float64_le(FT0, FT1, &env->fp_status)) { |
| 463 |
T0 = 0x04UL;
|
| 464 |
} else {
|
| 465 |
T0 = 0x02UL;
|
| 466 |
} |
| 467 |
} else {
|
| 468 |
T0 = 0x01UL;
|
| 469 |
env->fpscr[4] |= 0x1; |
| 470 |
/* I don't know how to test "quiet" nan... */
|
| 471 |
if (0 /* || ! quiet_nan(...) */) { |
| 472 |
env->fpscr[6] |= 0x1; |
| 473 |
if (!(env->fpscr[1] & 0x8)) |
| 474 |
env->fpscr[4] |= 0x8; |
| 475 |
} else {
|
| 476 |
env->fpscr[4] |= 0x8; |
| 477 |
} |
| 478 |
} |
| 479 |
env->fpscr[3] = T0;
|
| 480 |
} |
| 481 |
|
| 482 |
void do_rfi (void) |
| 483 |
{
|
| 484 |
env->nip = env->spr[SPR_SRR0] & ~0x00000003;
|
| 485 |
T0 = env->spr[SPR_SRR1] & ~0xFFFF0000UL;
|
| 486 |
do_store_msr(env, T0); |
| 487 |
#if defined (DEBUG_OP)
|
| 488 |
dump_rfi(); |
| 489 |
#endif
|
| 490 |
env->interrupt_request |= CPU_INTERRUPT_EXITTB; |
| 491 |
} |
| 492 |
|
| 493 |
void do_tw (uint32_t cmp, int flags) |
| 494 |
{
|
| 495 |
if (!likely(!((Ts0 < (int32_t)cmp && (flags & 0x10)) || |
| 496 |
(Ts0 > (int32_t)cmp && (flags & 0x08)) ||
|
| 497 |
(Ts0 == (int32_t)cmp && (flags & 0x04)) ||
|
| 498 |
(T0 < cmp && (flags & 0x02)) ||
|
| 499 |
(T0 > cmp && (flags & 0x01)))))
|
| 500 |
do_raise_exception_err(EXCP_PROGRAM, EXCP_TRAP); |
| 501 |
} |
| 502 |
|
| 503 |
/* Instruction cache invalidation helper */
|
| 504 |
void do_icbi (void) |
| 505 |
{
|
| 506 |
uint32_t tmp; |
| 507 |
/* Invalidate one cache line :
|
| 508 |
* PowerPC specification says this is to be treated like a load
|
| 509 |
* (not a fetch) by the MMU. To be sure it will be so,
|
| 510 |
* do the load "by hand".
|
| 511 |
*/
|
| 512 |
#if defined(TARGET_PPC64)
|
| 513 |
if (!msr_sf)
|
| 514 |
T0 &= 0xFFFFFFFFULL;
|
| 515 |
#endif
|
| 516 |
tmp = ldl_kernel(T0); |
| 517 |
T0 &= ~(ICACHE_LINE_SIZE - 1);
|
| 518 |
tb_invalidate_page_range(T0, T0 + ICACHE_LINE_SIZE); |
| 519 |
} |
| 520 |
|
| 521 |
/*****************************************************************************/
|
| 522 |
/* MMU related helpers */
|
| 523 |
/* TLB invalidation helpers */
|
| 524 |
void do_tlbia (void) |
| 525 |
{
|
| 526 |
tlb_flush(env, 1);
|
| 527 |
} |
| 528 |
|
| 529 |
void do_tlbie (void) |
| 530 |
{
|
| 531 |
#if !defined(FLUSH_ALL_TLBS)
|
| 532 |
tlb_flush_page(env, T0); |
| 533 |
#else
|
| 534 |
do_tlbia(); |
| 535 |
#endif
|
| 536 |
} |
| 537 |
|
| 538 |
/*****************************************************************************/
|
| 539 |
/* Softmmu support */
|
| 540 |
#if !defined (CONFIG_USER_ONLY)
|
| 541 |
|
| 542 |
#define MMUSUFFIX _mmu
|
| 543 |
#define GETPC() (__builtin_return_address(0)) |
| 544 |
|
| 545 |
#define SHIFT 0 |
| 546 |
#include "softmmu_template.h" |
| 547 |
|
| 548 |
#define SHIFT 1 |
| 549 |
#include "softmmu_template.h" |
| 550 |
|
| 551 |
#define SHIFT 2 |
| 552 |
#include "softmmu_template.h" |
| 553 |
|
| 554 |
#define SHIFT 3 |
| 555 |
#include "softmmu_template.h" |
| 556 |
|
| 557 |
/* try to fill the TLB and return an exception if error. If retaddr is
|
| 558 |
NULL, it means that the function was called in C code (i.e. not
|
| 559 |
from generated code or from helper.c) */
|
| 560 |
/* XXX: fix it to restore all registers */
|
| 561 |
void tlb_fill (target_ulong addr, int is_write, int is_user, void *retaddr) |
| 562 |
{
|
| 563 |
TranslationBlock *tb; |
| 564 |
CPUState *saved_env; |
| 565 |
target_phys_addr_t pc; |
| 566 |
int ret;
|
| 567 |
|
| 568 |
/* XXX: hack to restore env in all cases, even if not called from
|
| 569 |
generated code */
|
| 570 |
saved_env = env; |
| 571 |
env = cpu_single_env; |
| 572 |
ret = cpu_ppc_handle_mmu_fault(env, addr, is_write, is_user, 1);
|
| 573 |
if (!likely(ret == 0)) { |
| 574 |
if (likely(retaddr)) {
|
| 575 |
/* now we have a real cpu fault */
|
| 576 |
pc = (target_phys_addr_t)retaddr; |
| 577 |
tb = tb_find_pc(pc); |
| 578 |
if (likely(tb)) {
|
| 579 |
/* the PC is inside the translated code. It means that we have
|
| 580 |
a virtual CPU fault */
|
| 581 |
cpu_restore_state(tb, env, pc, NULL);
|
| 582 |
} |
| 583 |
} |
| 584 |
do_raise_exception_err(env->exception_index, env->error_code); |
| 585 |
} |
| 586 |
env = saved_env; |
| 587 |
} |
| 588 |
#endif /* !CONFIG_USER_ONLY */ |
| 589 |
|