Revision 7162bdea target-ppc/translate_init.c
| b/target-ppc/translate_init.c | ||
|---|---|---|
| 6479 | 6479 |
POWERPC_FLAG_BUS_CLK; |
| 6480 | 6480 |
} |
| 6481 | 6481 |
|
| 6482 |
static void init_proc_e600 (CPUPPCState *env) |
|
| 6483 |
{
|
|
| 6484 |
gen_spr_ne_601(env); |
|
| 6485 |
gen_spr_7xx(env); |
|
| 6486 |
/* Time base */ |
|
| 6487 |
gen_tbl(env); |
|
| 6488 |
/* 74xx specific SPR */ |
|
| 6489 |
gen_spr_74xx(env); |
|
| 6490 |
/* XXX : not implemented */ |
|
| 6491 |
spr_register(env, SPR_UBAMR, "UBAMR", |
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| 6492 |
&spr_read_ureg, SPR_NOACCESS, |
|
| 6493 |
&spr_read_ureg, SPR_NOACCESS, |
|
| 6494 |
0x00000000); |
|
| 6495 |
/* XXX : not implemented */ |
|
| 6496 |
spr_register(env, SPR_LDSTCR, "LDSTCR", |
|
| 6497 |
SPR_NOACCESS, SPR_NOACCESS, |
|
| 6498 |
&spr_read_generic, &spr_write_generic, |
|
| 6499 |
0x00000000); |
|
| 6500 |
/* XXX : not implemented */ |
|
| 6501 |
spr_register(env, SPR_ICTRL, "ICTRL", |
|
| 6502 |
SPR_NOACCESS, SPR_NOACCESS, |
|
| 6503 |
&spr_read_generic, &spr_write_generic, |
|
| 6504 |
0x00000000); |
|
| 6505 |
/* XXX : not implemented */ |
|
| 6506 |
spr_register(env, SPR_MSSSR0, "MSSSR0", |
|
| 6507 |
SPR_NOACCESS, SPR_NOACCESS, |
|
| 6508 |
&spr_read_generic, &spr_write_generic, |
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| 6509 |
0x00000000); |
|
| 6510 |
/* XXX : not implemented */ |
|
| 6511 |
spr_register(env, SPR_PMC5, "PMC5", |
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| 6512 |
SPR_NOACCESS, SPR_NOACCESS, |
|
| 6513 |
&spr_read_generic, &spr_write_generic, |
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| 6514 |
0x00000000); |
|
| 6515 |
/* XXX : not implemented */ |
|
| 6516 |
spr_register(env, SPR_UPMC5, "UPMC5", |
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| 6517 |
&spr_read_ureg, SPR_NOACCESS, |
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| 6518 |
&spr_read_ureg, SPR_NOACCESS, |
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| 6519 |
0x00000000); |
|
| 6520 |
/* XXX : not implemented */ |
|
| 6521 |
spr_register(env, SPR_PMC6, "PMC6", |
|
| 6522 |
SPR_NOACCESS, SPR_NOACCESS, |
|
| 6523 |
&spr_read_generic, &spr_write_generic, |
|
| 6524 |
0x00000000); |
|
| 6525 |
/* XXX : not implemented */ |
|
| 6526 |
spr_register(env, SPR_UPMC6, "UPMC6", |
|
| 6527 |
&spr_read_ureg, SPR_NOACCESS, |
|
| 6528 |
&spr_read_ureg, SPR_NOACCESS, |
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| 6529 |
0x00000000); |
|
| 6530 |
/* SPRGs */ |
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| 6531 |
spr_register(env, SPR_SPRG4, "SPRG4", |
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| 6532 |
SPR_NOACCESS, SPR_NOACCESS, |
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| 6533 |
&spr_read_generic, &spr_write_generic, |
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| 6534 |
0x00000000); |
|
| 6535 |
spr_register(env, SPR_USPRG4, "USPRG4", |
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| 6536 |
&spr_read_ureg, SPR_NOACCESS, |
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| 6537 |
&spr_read_ureg, SPR_NOACCESS, |
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| 6538 |
0x00000000); |
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| 6539 |
spr_register(env, SPR_SPRG5, "SPRG5", |
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| 6540 |
SPR_NOACCESS, SPR_NOACCESS, |
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| 6541 |
&spr_read_generic, &spr_write_generic, |
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| 6542 |
0x00000000); |
|
| 6543 |
spr_register(env, SPR_USPRG5, "USPRG5", |
|
| 6544 |
&spr_read_ureg, SPR_NOACCESS, |
|
| 6545 |
&spr_read_ureg, SPR_NOACCESS, |
|
| 6546 |
0x00000000); |
|
| 6547 |
spr_register(env, SPR_SPRG6, "SPRG6", |
|
| 6548 |
SPR_NOACCESS, SPR_NOACCESS, |
|
| 6549 |
&spr_read_generic, &spr_write_generic, |
|
| 6550 |
0x00000000); |
|
| 6551 |
spr_register(env, SPR_USPRG6, "USPRG6", |
|
| 6552 |
&spr_read_ureg, SPR_NOACCESS, |
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| 6553 |
&spr_read_ureg, SPR_NOACCESS, |
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| 6554 |
0x00000000); |
|
| 6555 |
spr_register(env, SPR_SPRG7, "SPRG7", |
|
| 6556 |
SPR_NOACCESS, SPR_NOACCESS, |
|
| 6557 |
&spr_read_generic, &spr_write_generic, |
|
| 6558 |
0x00000000); |
|
| 6559 |
spr_register(env, SPR_USPRG7, "USPRG7", |
|
| 6560 |
&spr_read_ureg, SPR_NOACCESS, |
|
| 6561 |
&spr_read_ureg, SPR_NOACCESS, |
|
| 6562 |
0x00000000); |
|
| 6563 |
/* Memory management */ |
|
| 6564 |
gen_low_BATs(env); |
|
| 6565 |
gen_high_BATs(env); |
|
| 6566 |
gen_74xx_soft_tlb(env, 128, 2); |
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| 6567 |
init_excp_7450(env); |
|
| 6568 |
env->dcache_line_size = 32; |
|
| 6569 |
env->icache_line_size = 32; |
|
| 6570 |
/* Allocate hardware IRQ controller */ |
|
| 6571 |
ppc6xx_irq_init(env); |
|
| 6572 |
} |
|
| 6573 |
|
|
| 6574 |
POWERPC_FAMILY(e600)(ObjectClass *oc, void *data) |
|
| 6575 |
{
|
|
| 6576 |
DeviceClass *dc = DEVICE_CLASS(oc); |
|
| 6577 |
PowerPCCPUClass *pcc = POWERPC_CPU_CLASS(oc); |
|
| 6578 |
|
|
| 6579 |
dc->desc = "PowerPC e600"; |
|
| 6580 |
pcc->init_proc = init_proc_e600; |
|
| 6581 |
pcc->check_pow = check_pow_hid0_74xx; |
|
| 6582 |
pcc->insns_flags = PPC_INSNS_BASE | PPC_STRING | PPC_MFTB | |
|
| 6583 |
PPC_FLOAT | PPC_FLOAT_FSEL | PPC_FLOAT_FRES | |
|
| 6584 |
PPC_FLOAT_FSQRT | PPC_FLOAT_FRSQRTE | |
|
| 6585 |
PPC_FLOAT_STFIWX | |
|
| 6586 |
PPC_CACHE | PPC_CACHE_ICBI | |
|
| 6587 |
PPC_CACHE_DCBA | PPC_CACHE_DCBZ | |
|
| 6588 |
PPC_MEM_SYNC | PPC_MEM_EIEIO | |
|
| 6589 |
PPC_MEM_TLBIE | PPC_MEM_TLBSYNC | |
|
| 6590 |
PPC_MEM_TLBIA | PPC_74xx_TLB | |
|
| 6591 |
PPC_SEGMENT | PPC_EXTERN | |
|
| 6592 |
PPC_ALTIVEC; |
|
| 6593 |
pcc->insns_flags2 = PPC_NONE; |
|
| 6594 |
pcc->msr_mask = 0x000000000205FF77ULL; |
|
| 6595 |
pcc->mmu_model = POWERPC_MMU_32B; |
|
| 6596 |
#if defined(CONFIG_SOFTMMU) |
|
| 6597 |
pcc->handle_mmu_fault = ppc_hash32_handle_mmu_fault; |
|
| 6598 |
#endif |
|
| 6599 |
pcc->excp_model = POWERPC_EXCP_74xx; |
|
| 6600 |
pcc->bus_model = PPC_FLAGS_INPUT_6xx; |
|
| 6601 |
pcc->bfd_mach = bfd_mach_ppc_7400; |
|
| 6602 |
pcc->flags = POWERPC_FLAG_VRE | POWERPC_FLAG_SE | |
|
| 6603 |
POWERPC_FLAG_BE | POWERPC_FLAG_PMM | |
|
| 6604 |
POWERPC_FLAG_BUS_CLK; |
|
| 6605 |
} |
|
| 6606 |
|
|
| 6482 | 6607 |
#if defined (TARGET_PPC64) |
| 6483 | 6608 |
#if defined(CONFIG_USER_ONLY) |
| 6484 | 6609 |
#define POWERPC970_HID5_INIT 0x00000080 |
Also available in: Unified diff