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/*
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* QEMU PC System Emulator
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*
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* Copyright (c) 2003-2004 Fabrice Bellard
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*
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* Permission is hereby granted, free of charge, to any person obtaining a copy
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* of this software and associated documentation files (the "Software"), to deal
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* in the Software without restriction, including without limitation the rights
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* to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
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* copies of the Software, and to permit persons to whom the Software is
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* furnished to do so, subject to the following conditions:
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*
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* The above copyright notice and this permission notice shall be included in
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* all copies or substantial portions of the Software.
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*
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* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
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* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
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* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
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* THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
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* LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
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* OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
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* THE SOFTWARE.
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*/
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#include "vl.h" |
25 |
|
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/* output Bochs bios info messages */
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//#define DEBUG_BIOS
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#define BIOS_FILENAME "bios.bin" |
30 |
#define VGABIOS_FILENAME "vgabios.bin" |
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#define VGABIOS_CIRRUS_FILENAME "vgabios-cirrus.bin" |
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#define LINUX_BOOT_FILENAME "linux_boot.bin" |
33 |
|
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#define KERNEL_LOAD_ADDR 0x00100000 |
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#define INITRD_LOAD_ADDR 0x00400000 |
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#define KERNEL_PARAMS_ADDR 0x00090000 |
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#define KERNEL_CMDLINE_ADDR 0x00099000 |
38 |
|
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int speaker_data_on;
|
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int dummy_refresh_clock;
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static fdctrl_t *floppy_controller;
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static RTCState *rtc_state;
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static PITState *pit;
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|
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static void ioport80_write(void *opaque, uint32_t addr, uint32_t data) |
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{ |
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} |
48 |
|
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/* MSDOS compatibility mode FPU exception support */
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/* XXX: add IGNNE support */
|
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void cpu_set_ferr(CPUX86State *s)
|
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{ |
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pic_set_irq(13, 1); |
54 |
} |
55 |
|
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static void ioportF0_write(void *opaque, uint32_t addr, uint32_t data) |
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{ |
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pic_set_irq(13, 0); |
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} |
60 |
|
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/* TSC handling */
|
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|
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uint64_t cpu_get_tsc(CPUX86State *env) |
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{ |
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return qemu_get_clock(vm_clock);
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} |
67 |
|
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/* PC cmos mappings */
|
69 |
|
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#define REG_EQUIPMENT_BYTE 0x14 |
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#define REG_IBM_CENTURY_BYTE 0x32 |
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#define REG_IBM_PS2_CENTURY_BYTE 0x37 |
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|
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|
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static inline int to_bcd(RTCState *s, int a) |
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{ |
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return ((a / 10) << 4) | (a % 10); |
78 |
} |
79 |
|
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static int cmos_get_fd_drive_type(int fd0) |
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{ |
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int val;
|
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|
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switch (fd0) {
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case 0: |
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/* 1.44 Mb 3"5 drive */
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val = 4;
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break;
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case 1: |
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/* 2.88 Mb 3"5 drive */
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val = 5;
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break;
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case 2: |
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/* 1.2 Mb 5"5 drive */
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val = 2;
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break;
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default:
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val = 0;
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break;
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} |
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return val;
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} |
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|
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static void cmos_init_hd(int type_ofs, int info_ofs, BlockDriverState *hd) |
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{ |
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RTCState *s = rtc_state; |
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int cylinders, heads, sectors;
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bdrv_get_geometry_hint(hd, &cylinders, &heads, §ors); |
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rtc_set_memory(s, type_ofs, 47);
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rtc_set_memory(s, info_ofs, cylinders); |
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rtc_set_memory(s, info_ofs + 1, cylinders >> 8); |
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rtc_set_memory(s, info_ofs + 2, heads);
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rtc_set_memory(s, info_ofs + 3, 0xff); |
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rtc_set_memory(s, info_ofs + 4, 0xff); |
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rtc_set_memory(s, info_ofs + 5, 0xc0 | ((heads > 8) << 3)); |
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rtc_set_memory(s, info_ofs + 6, cylinders);
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rtc_set_memory(s, info_ofs + 7, cylinders >> 8); |
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rtc_set_memory(s, info_ofs + 8, sectors);
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} |
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|
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/* hd_table must contain 4 block drivers */
|
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static void cmos_init(int ram_size, int boot_device, BlockDriverState **hd_table) |
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{ |
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RTCState *s = rtc_state; |
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int val;
|
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int fd0, fd1, nb;
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time_t ti; |
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struct tm *tm;
|
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int i;
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|
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/* set the CMOS date */
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time(&ti); |
133 |
if (rtc_utc)
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tm = gmtime(&ti); |
135 |
else
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tm = localtime(&ti); |
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rtc_set_date(s, tm); |
138 |
|
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val = to_bcd(s, (tm->tm_year / 100) + 19); |
140 |
rtc_set_memory(s, REG_IBM_CENTURY_BYTE, val); |
141 |
rtc_set_memory(s, REG_IBM_PS2_CENTURY_BYTE, val); |
142 |
|
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/* various important CMOS locations needed by PC/Bochs bios */
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|
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/* memory size */
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val = 640; /* base memory in K */ |
147 |
rtc_set_memory(s, 0x15, val);
|
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rtc_set_memory(s, 0x16, val >> 8); |
149 |
|
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val = (ram_size / 1024) - 1024; |
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if (val > 65535) |
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val = 65535;
|
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rtc_set_memory(s, 0x17, val);
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rtc_set_memory(s, 0x18, val >> 8); |
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rtc_set_memory(s, 0x30, val);
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rtc_set_memory(s, 0x31, val >> 8); |
157 |
|
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if (ram_size > (16 * 1024 * 1024)) |
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val = (ram_size / 65536) - ((16 * 1024 * 1024) / 65536); |
160 |
else
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val = 0;
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if (val > 65535) |
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val = 65535;
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rtc_set_memory(s, 0x34, val);
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rtc_set_memory(s, 0x35, val >> 8); |
166 |
|
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switch(boot_device) {
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case 'a': |
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case 'b': |
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rtc_set_memory(s, 0x3d, 0x01); /* floppy boot */ |
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break;
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default:
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case 'c': |
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rtc_set_memory(s, 0x3d, 0x02); /* hard drive boot */ |
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break;
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case 'd': |
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rtc_set_memory(s, 0x3d, 0x03); /* CD-ROM boot */ |
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break;
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} |
180 |
|
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/* floppy type */
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|
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fd0 = fdctrl_get_drive_type(floppy_controller, 0);
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fd1 = fdctrl_get_drive_type(floppy_controller, 1);
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val = (cmos_get_fd_drive_type(fd0) << 4) | cmos_get_fd_drive_type(fd1);
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rtc_set_memory(s, 0x10, val);
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val = 0;
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nb = 0;
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if (fd0 < 3) |
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nb++; |
193 |
if (fd1 < 3) |
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nb++; |
195 |
switch (nb) {
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case 0: |
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break;
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case 1: |
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val |= 0x01; /* 1 drive, ready for boot */ |
200 |
break;
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case 2: |
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val |= 0x41; /* 2 drives, ready for boot */ |
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break;
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} |
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val |= 0x02; /* FPU is there */ |
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val |= 0x04; /* PS/2 mouse installed */ |
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rtc_set_memory(s, REG_EQUIPMENT_BYTE, val); |
208 |
|
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/* hard drives */
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|
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rtc_set_memory(s, 0x12, (hd_table[0] ? 0xf0 : 0) | (hd_table[1] ? 0x0f : 0)); |
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if (hd_table[0]) |
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cmos_init_hd(0x19, 0x1b, hd_table[0]); |
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if (hd_table[1]) |
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cmos_init_hd(0x1a, 0x24, hd_table[1]); |
216 |
|
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val = 0;
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for (i = 0; i < 4; i++) { |
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if (hd_table[i]) {
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int cylinders, heads, sectors, translation;
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/* NOTE: bdrv_get_geometry_hint() returns the physical
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geometry. It is always such that: 1 <= sects <= 63, 1
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<= heads <= 16, 1 <= cylinders <= 16383. The BIOS
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geometry can be different if a translation is done. */
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translation = bdrv_get_translation_hint(hd_table[i]); |
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if (translation == BIOS_ATA_TRANSLATION_AUTO) {
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bdrv_get_geometry_hint(hd_table[i], &cylinders, &heads, §ors); |
228 |
if (cylinders <= 1024 && heads <= 16 && sectors <= 63) { |
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/* No translation. */
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translation = 0;
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} else {
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/* LBA translation. */
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translation = 1;
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} |
235 |
} else {
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translation--; |
237 |
} |
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val |= translation << (i * 2);
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} |
240 |
} |
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rtc_set_memory(s, 0x39, val);
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|
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/* Disable check of 0x55AA signature on the last two bytes of
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first sector of disk. XXX: make it the default ? */
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// rtc_set_memory(s, 0x38, 1);
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} |
247 |
|
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static void speaker_ioport_write(void *opaque, uint32_t addr, uint32_t val) |
249 |
{ |
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speaker_data_on = (val >> 1) & 1; |
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pit_set_gate(pit, 2, val & 1); |
252 |
} |
253 |
|
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static uint32_t speaker_ioport_read(void *opaque, uint32_t addr) |
255 |
{ |
256 |
int out;
|
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out = pit_get_out(pit, 2, qemu_get_clock(vm_clock));
|
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dummy_refresh_clock ^= 1;
|
259 |
return (speaker_data_on << 1) | pit_get_gate(pit, 2) | (out << 5) | |
260 |
(dummy_refresh_clock << 4);
|
261 |
} |
262 |
|
263 |
static void ioport92_write(void *opaque, uint32_t addr, uint32_t val) |
264 |
{ |
265 |
cpu_x86_set_a20(cpu_single_env, (val >> 1) & 1); |
266 |
/* XXX: bit 0 is fast reset */
|
267 |
} |
268 |
|
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static uint32_t ioport92_read(void *opaque, uint32_t addr) |
270 |
{ |
271 |
return ((cpu_single_env->a20_mask >> 20) & 1) << 1; |
272 |
} |
273 |
|
274 |
/***********************************************************/
|
275 |
/* Bochs BIOS debug ports */
|
276 |
|
277 |
void bochs_bios_write(void *opaque, uint32_t addr, uint32_t val) |
278 |
{ |
279 |
static const char shutdown_str[8] = "Shutdown"; |
280 |
static int shutdown_index = 0; |
281 |
|
282 |
switch(addr) {
|
283 |
/* Bochs BIOS messages */
|
284 |
case 0x400: |
285 |
case 0x401: |
286 |
fprintf(stderr, "BIOS panic at rombios.c, line %d\n", val);
|
287 |
exit(1);
|
288 |
case 0x402: |
289 |
case 0x403: |
290 |
#ifdef DEBUG_BIOS
|
291 |
fprintf(stderr, "%c", val);
|
292 |
#endif
|
293 |
break;
|
294 |
case 0x8900: |
295 |
/* same as Bochs power off */
|
296 |
if (val == shutdown_str[shutdown_index]) {
|
297 |
shutdown_index++; |
298 |
if (shutdown_index == 8) { |
299 |
shutdown_index = 0;
|
300 |
qemu_system_shutdown_request(); |
301 |
} |
302 |
} else {
|
303 |
shutdown_index = 0;
|
304 |
} |
305 |
break;
|
306 |
|
307 |
/* LGPL'ed VGA BIOS messages */
|
308 |
case 0x501: |
309 |
case 0x502: |
310 |
fprintf(stderr, "VGA BIOS panic, line %d\n", val);
|
311 |
exit(1);
|
312 |
case 0x500: |
313 |
case 0x503: |
314 |
#ifdef DEBUG_BIOS
|
315 |
fprintf(stderr, "%c", val);
|
316 |
#endif
|
317 |
break;
|
318 |
} |
319 |
} |
320 |
|
321 |
void bochs_bios_init(void) |
322 |
{ |
323 |
register_ioport_write(0x400, 1, 2, bochs_bios_write, NULL); |
324 |
register_ioport_write(0x401, 1, 2, bochs_bios_write, NULL); |
325 |
register_ioport_write(0x402, 1, 1, bochs_bios_write, NULL); |
326 |
register_ioport_write(0x403, 1, 1, bochs_bios_write, NULL); |
327 |
register_ioport_write(0x8900, 1, 1, bochs_bios_write, NULL); |
328 |
|
329 |
register_ioport_write(0x501, 1, 2, bochs_bios_write, NULL); |
330 |
register_ioport_write(0x502, 1, 2, bochs_bios_write, NULL); |
331 |
register_ioport_write(0x500, 1, 1, bochs_bios_write, NULL); |
332 |
register_ioport_write(0x503, 1, 1, bochs_bios_write, NULL); |
333 |
} |
334 |
|
335 |
|
336 |
int load_kernel(const char *filename, uint8_t *addr, |
337 |
uint8_t *real_addr) |
338 |
{ |
339 |
int fd, size;
|
340 |
int setup_sects;
|
341 |
|
342 |
fd = open(filename, O_RDONLY | O_BINARY); |
343 |
if (fd < 0) |
344 |
return -1; |
345 |
|
346 |
/* load 16 bit code */
|
347 |
if (read(fd, real_addr, 512) != 512) |
348 |
goto fail;
|
349 |
setup_sects = real_addr[0x1F1];
|
350 |
if (!setup_sects)
|
351 |
setup_sects = 4;
|
352 |
if (read(fd, real_addr + 512, setup_sects * 512) != |
353 |
setup_sects * 512)
|
354 |
goto fail;
|
355 |
|
356 |
/* load 32 bit code */
|
357 |
size = read(fd, addr, 16 * 1024 * 1024); |
358 |
if (size < 0) |
359 |
goto fail;
|
360 |
close(fd); |
361 |
return size;
|
362 |
fail:
|
363 |
close(fd); |
364 |
return -1; |
365 |
} |
366 |
|
367 |
static const int ide_iobase[2] = { 0x1f0, 0x170 }; |
368 |
static const int ide_iobase2[2] = { 0x3f6, 0x376 }; |
369 |
static const int ide_irq[2] = { 14, 15 }; |
370 |
|
371 |
#define NE2000_NB_MAX 6 |
372 |
|
373 |
static int ne2000_io[NE2000_NB_MAX] = { 0x300, 0x320, 0x340, 0x360, 0x280, 0x380 }; |
374 |
static int ne2000_irq[NE2000_NB_MAX] = { 9, 10, 11, 3, 4, 5 }; |
375 |
|
376 |
static int serial_io[MAX_SERIAL_PORTS] = { 0x3f8, 0x2f8, 0x3e8, 0x2e8 }; |
377 |
static int serial_irq[MAX_SERIAL_PORTS] = { 4, 3, 4, 3 }; |
378 |
|
379 |
static int parallel_io[MAX_PARALLEL_PORTS] = { 0x378, 0x278, 0x3bc }; |
380 |
static int parallel_irq[MAX_PARALLEL_PORTS] = { 7, 7, 7 }; |
381 |
|
382 |
/* PC hardware initialisation */
|
383 |
void pc_init(int ram_size, int vga_ram_size, int boot_device, |
384 |
DisplayState *ds, const char **fd_filename, int snapshot, |
385 |
const char *kernel_filename, const char *kernel_cmdline, |
386 |
const char *initrd_filename) |
387 |
{ |
388 |
char buf[1024]; |
389 |
int ret, linux_boot, initrd_size, i, nb_nics1;
|
390 |
unsigned long bios_offset, vga_bios_offset; |
391 |
int bios_size, isa_bios_size;
|
392 |
PCIBus *pci_bus; |
393 |
|
394 |
linux_boot = (kernel_filename != NULL);
|
395 |
|
396 |
/* allocate RAM */
|
397 |
cpu_register_physical_memory(0, ram_size, 0); |
398 |
|
399 |
/* BIOS load */
|
400 |
bios_offset = ram_size + vga_ram_size; |
401 |
vga_bios_offset = bios_offset + 256 * 1024; |
402 |
|
403 |
snprintf(buf, sizeof(buf), "%s/%s", bios_dir, BIOS_FILENAME); |
404 |
bios_size = get_image_size(buf); |
405 |
if (bios_size <= 0 || |
406 |
(bios_size % 65536) != 0 || |
407 |
bios_size > (256 * 1024)) { |
408 |
goto bios_error;
|
409 |
} |
410 |
ret = load_image(buf, phys_ram_base + bios_offset); |
411 |
if (ret != bios_size) {
|
412 |
bios_error:
|
413 |
fprintf(stderr, "qemu: could not load PC bios '%s'\n", buf);
|
414 |
exit(1);
|
415 |
} |
416 |
|
417 |
/* VGA BIOS load */
|
418 |
if (cirrus_vga_enabled) {
|
419 |
snprintf(buf, sizeof(buf), "%s/%s", bios_dir, VGABIOS_CIRRUS_FILENAME); |
420 |
} else {
|
421 |
snprintf(buf, sizeof(buf), "%s/%s", bios_dir, VGABIOS_FILENAME); |
422 |
} |
423 |
ret = load_image(buf, phys_ram_base + vga_bios_offset); |
424 |
|
425 |
/* setup basic memory access */
|
426 |
cpu_register_physical_memory(0xc0000, 0x10000, |
427 |
vga_bios_offset | IO_MEM_ROM); |
428 |
|
429 |
/* map the last 128KB of the BIOS in ISA space */
|
430 |
isa_bios_size = bios_size; |
431 |
if (isa_bios_size > (128 * 1024)) |
432 |
isa_bios_size = 128 * 1024; |
433 |
cpu_register_physical_memory(0xd0000, (192 * 1024) - isa_bios_size, |
434 |
IO_MEM_UNASSIGNED); |
435 |
cpu_register_physical_memory(0x100000 - isa_bios_size,
|
436 |
isa_bios_size, |
437 |
(bios_offset + bios_size - isa_bios_size) | IO_MEM_ROM); |
438 |
/* map all the bios at the top of memory */
|
439 |
cpu_register_physical_memory((uint32_t)(-bios_size), |
440 |
bios_size, bios_offset | IO_MEM_ROM); |
441 |
|
442 |
bochs_bios_init(); |
443 |
|
444 |
if (linux_boot) {
|
445 |
uint8_t bootsect[512];
|
446 |
uint8_t old_bootsect[512];
|
447 |
|
448 |
if (bs_table[0] == NULL) { |
449 |
fprintf(stderr, "A disk image must be given for 'hda' when booting a Linux kernel\n");
|
450 |
exit(1);
|
451 |
} |
452 |
snprintf(buf, sizeof(buf), "%s/%s", bios_dir, LINUX_BOOT_FILENAME); |
453 |
ret = load_image(buf, bootsect); |
454 |
if (ret != sizeof(bootsect)) { |
455 |
fprintf(stderr, "qemu: could not load linux boot sector '%s'\n",
|
456 |
buf); |
457 |
exit(1);
|
458 |
} |
459 |
|
460 |
if (bdrv_read(bs_table[0], 0, old_bootsect, 1) >= 0) { |
461 |
/* copy the MSDOS partition table */
|
462 |
memcpy(bootsect + 0x1be, old_bootsect + 0x1be, 0x40); |
463 |
} |
464 |
|
465 |
bdrv_set_boot_sector(bs_table[0], bootsect, sizeof(bootsect)); |
466 |
|
467 |
/* now we can load the kernel */
|
468 |
ret = load_kernel(kernel_filename, |
469 |
phys_ram_base + KERNEL_LOAD_ADDR, |
470 |
phys_ram_base + KERNEL_PARAMS_ADDR); |
471 |
if (ret < 0) { |
472 |
fprintf(stderr, "qemu: could not load kernel '%s'\n",
|
473 |
kernel_filename); |
474 |
exit(1);
|
475 |
} |
476 |
|
477 |
/* load initrd */
|
478 |
initrd_size = 0;
|
479 |
if (initrd_filename) {
|
480 |
initrd_size = load_image(initrd_filename, phys_ram_base + INITRD_LOAD_ADDR); |
481 |
if (initrd_size < 0) { |
482 |
fprintf(stderr, "qemu: could not load initial ram disk '%s'\n",
|
483 |
initrd_filename); |
484 |
exit(1);
|
485 |
} |
486 |
} |
487 |
if (initrd_size > 0) { |
488 |
stl_raw(phys_ram_base + KERNEL_PARAMS_ADDR + 0x218, INITRD_LOAD_ADDR);
|
489 |
stl_raw(phys_ram_base + KERNEL_PARAMS_ADDR + 0x21c, initrd_size);
|
490 |
} |
491 |
pstrcpy(phys_ram_base + KERNEL_CMDLINE_ADDR, 4096,
|
492 |
kernel_cmdline); |
493 |
stw_raw(phys_ram_base + KERNEL_PARAMS_ADDR + 0x20, 0xA33F); |
494 |
stw_raw(phys_ram_base + KERNEL_PARAMS_ADDR + 0x22,
|
495 |
KERNEL_CMDLINE_ADDR - KERNEL_PARAMS_ADDR); |
496 |
/* loader type */
|
497 |
stw_raw(phys_ram_base + KERNEL_PARAMS_ADDR + 0x210, 0x01); |
498 |
} |
499 |
|
500 |
if (pci_enabled) {
|
501 |
pci_bus = i440fx_init(); |
502 |
piix3_init(pci_bus); |
503 |
} else {
|
504 |
pci_bus = NULL;
|
505 |
} |
506 |
|
507 |
/* init basic PC hardware */
|
508 |
register_ioport_write(0x80, 1, 1, ioport80_write, NULL); |
509 |
|
510 |
register_ioport_write(0xf0, 1, 1, ioportF0_write, NULL); |
511 |
|
512 |
if (cirrus_vga_enabled) {
|
513 |
if (pci_enabled) {
|
514 |
pci_cirrus_vga_init(pci_bus, |
515 |
ds, phys_ram_base + ram_size, ram_size, |
516 |
vga_ram_size); |
517 |
} else {
|
518 |
isa_cirrus_vga_init(ds, phys_ram_base + ram_size, ram_size, |
519 |
vga_ram_size); |
520 |
} |
521 |
} else {
|
522 |
vga_initialize(pci_bus, ds, phys_ram_base + ram_size, ram_size, |
523 |
vga_ram_size); |
524 |
} |
525 |
|
526 |
rtc_state = rtc_init(0x70, 8); |
527 |
register_ioport_read(0x61, 1, 1, speaker_ioport_read, NULL); |
528 |
register_ioport_write(0x61, 1, 1, speaker_ioport_write, NULL); |
529 |
|
530 |
register_ioport_read(0x92, 1, 1, ioport92_read, NULL); |
531 |
register_ioport_write(0x92, 1, 1, ioport92_write, NULL); |
532 |
|
533 |
if (pci_enabled)
|
534 |
apic_init(cpu_single_env); |
535 |
pic_init(); |
536 |
pit = pit_init(0x40, 0); |
537 |
|
538 |
for(i = 0; i < MAX_SERIAL_PORTS; i++) { |
539 |
if (serial_hds[i]) {
|
540 |
serial_init(serial_io[i], serial_irq[i], serial_hds[i]); |
541 |
} |
542 |
} |
543 |
|
544 |
for(i = 0; i < MAX_PARALLEL_PORTS; i++) { |
545 |
if (parallel_hds[i]) {
|
546 |
parallel_init(parallel_io[i], parallel_irq[i], parallel_hds[i]); |
547 |
} |
548 |
} |
549 |
|
550 |
if (pci_enabled) {
|
551 |
for(i = 0; i < nb_nics; i++) { |
552 |
pci_ne2000_init(pci_bus, &nd_table[i]); |
553 |
} |
554 |
pci_piix3_ide_init(pci_bus, bs_table); |
555 |
} else {
|
556 |
nb_nics1 = nb_nics; |
557 |
if (nb_nics1 > NE2000_NB_MAX)
|
558 |
nb_nics1 = NE2000_NB_MAX; |
559 |
for(i = 0; i < nb_nics1; i++) { |
560 |
isa_ne2000_init(ne2000_io[i], ne2000_irq[i], &nd_table[i]); |
561 |
} |
562 |
|
563 |
for(i = 0; i < 2; i++) { |
564 |
isa_ide_init(ide_iobase[i], ide_iobase2[i], ide_irq[i], |
565 |
bs_table[2 * i], bs_table[2 * i + 1]); |
566 |
} |
567 |
} |
568 |
|
569 |
kbd_init(); |
570 |
DMA_init(0);
|
571 |
|
572 |
if (audio_enabled) {
|
573 |
AUD_init(); |
574 |
#ifdef USE_SB16
|
575 |
if (sb16_enabled)
|
576 |
SB16_init (); |
577 |
#endif
|
578 |
#ifdef CONFIG_ADLIB
|
579 |
if (adlib_enabled)
|
580 |
Adlib_init (); |
581 |
#endif
|
582 |
#ifdef USE_GUS
|
583 |
if (gus_enabled)
|
584 |
GUS_init (); |
585 |
#endif
|
586 |
} |
587 |
|
588 |
floppy_controller = fdctrl_init(6, 2, 0, 0x3f0, fd_table); |
589 |
|
590 |
cmos_init(ram_size, boot_device, bs_table); |
591 |
|
592 |
/* must be done after all PCI devices are instanciated */
|
593 |
/* XXX: should be done in the Bochs BIOS */
|
594 |
if (pci_enabled) {
|
595 |
pci_bios_init(); |
596 |
} |
597 |
} |