Revision 722bfec3
b/target-s390x/fpu_helper.c | ||
---|---|---|
581 | 581 |
env->fregs[f1 + 1].ll = x.ll.lower; |
582 | 582 |
} |
583 | 583 |
|
584 |
/* 64-bit FP multiply and add RM */ |
|
585 |
void HELPER(madb)(CPUS390XState *env, uint32_t f1, uint64_t a2, uint32_t f3) |
|
584 |
/* 32-bit FP multiply and add */ |
|
585 |
uint64_t HELPER(maeb)(CPUS390XState *env, uint64_t f1, |
|
586 |
uint64_t f2, uint64_t f3) |
|
586 | 587 |
{ |
587 |
CPU_DoubleU v2; |
|
588 |
|
|
589 |
HELPER_LOG("%s: f1 %d a2 0x%lx f3 %d\n", __func__, f1, a2, f3); |
|
590 |
v2.ll = cpu_ldq_data(env, a2); |
|
591 |
env->fregs[f1].d = float64_add(env->fregs[f1].d, |
|
592 |
float64_mul(v2.d, env->fregs[f3].d, |
|
593 |
&env->fpu_status), |
|
594 |
&env->fpu_status); |
|
588 |
float32 ret = float32_muladd(f2, f3, f1, 0, &env->fpu_status); |
|
589 |
handle_exceptions(env, GETPC()); |
|
590 |
return ret; |
|
595 | 591 |
} |
596 | 592 |
|
597 |
/* 64-bit FP multiply and add RR */ |
|
598 |
void HELPER(madbr)(CPUS390XState *env, uint32_t f1, uint32_t f3, uint32_t f2) |
|
593 |
/* 64-bit FP multiply and add */ |
|
594 |
uint64_t HELPER(madb)(CPUS390XState *env, uint64_t f1, |
|
595 |
uint64_t f2, uint64_t f3) |
|
599 | 596 |
{ |
600 |
HELPER_LOG("%s: f1 %d f2 %d f3 %d\n", __func__, f1, f2, f3); |
|
601 |
env->fregs[f1].d = float64_add(float64_mul(env->fregs[f2].d, |
|
602 |
env->fregs[f3].d, |
|
603 |
&env->fpu_status), |
|
604 |
env->fregs[f1].d, &env->fpu_status); |
|
597 |
float64 ret = float64_muladd(f2, f3, f1, 0, &env->fpu_status); |
|
598 |
handle_exceptions(env, GETPC()); |
|
599 |
return ret; |
|
605 | 600 |
} |
606 | 601 |
|
607 |
/* 64-bit FP multiply and subtract RR */ |
|
608 |
void HELPER(msdbr)(CPUS390XState *env, uint32_t f1, uint32_t f3, uint32_t f2) |
|
602 |
/* 32-bit FP multiply and subtract */ |
|
603 |
uint64_t HELPER(mseb)(CPUS390XState *env, uint64_t f1, |
|
604 |
uint64_t f2, uint64_t f3) |
|
609 | 605 |
{ |
610 |
HELPER_LOG("%s: f1 %d f2 %d f3 %d\n", __func__, f1, f2, f3); |
|
611 |
env->fregs[f1].d = float64_sub(float64_mul(env->fregs[f2].d, |
|
612 |
env->fregs[f3].d, |
|
613 |
&env->fpu_status), |
|
614 |
env->fregs[f1].d, &env->fpu_status); |
|
606 |
float32 ret = float32_muladd(f2, f3, f1, float_muladd_negate_c, |
|
607 |
&env->fpu_status); |
|
608 |
handle_exceptions(env, GETPC()); |
|
609 |
return ret; |
|
615 | 610 |
} |
616 | 611 |
|
617 |
/* 32-bit FP multiply and add RR */ |
|
618 |
void HELPER(maebr)(CPUS390XState *env, uint32_t f1, uint32_t f3, uint32_t f2) |
|
612 |
/* 64-bit FP multiply and subtract */ |
|
613 |
uint64_t HELPER(msdb)(CPUS390XState *env, uint64_t f1, |
|
614 |
uint64_t f2, uint64_t f3) |
|
619 | 615 |
{ |
620 |
env->fregs[f1].l.upper = float32_add(env->fregs[f1].l.upper, |
|
621 |
float32_mul(env->fregs[f2].l.upper, |
|
622 |
env->fregs[f3].l.upper, |
|
623 |
&env->fpu_status), |
|
624 |
&env->fpu_status); |
|
616 |
float64 ret = float64_muladd(f2, f3, f1, float_muladd_negate_c, |
|
617 |
&env->fpu_status); |
|
618 |
handle_exceptions(env, GETPC()); |
|
619 |
return ret; |
|
625 | 620 |
} |
626 | 621 |
|
627 | 622 |
/* test data class 32-bit */ |
b/target-s390x/helper.h | ||
---|---|---|
74 | 74 |
DEF_HELPER_4(cfebr, i32, env, i32, i32, i32) |
75 | 75 |
DEF_HELPER_4(cfdbr, i32, env, i32, i32, i32) |
76 | 76 |
DEF_HELPER_4(cfxbr, i32, env, i32, i32, i32) |
77 |
DEF_HELPER_4(madb, void, env, i32, i64, i32)
|
|
78 |
DEF_HELPER_4(maebr, void, env, i32, i32, i32)
|
|
79 |
DEF_HELPER_4(madbr, void, env, i32, i32, i32)
|
|
80 |
DEF_HELPER_4(msdbr, void, env, i32, i32, i32)
|
|
77 |
DEF_HELPER_4(maeb, i64, env, i64, i64, i64)
|
|
78 |
DEF_HELPER_4(madb, i64, env, i64, i64, i64)
|
|
79 |
DEF_HELPER_4(mseb, i64, env, i64, i64, i64)
|
|
80 |
DEF_HELPER_4(msdb, i64, env, i64, i64, i64)
|
|
81 | 81 |
DEF_HELPER_FLAGS_3(tceb, TCG_CALL_NO_WG_SE, i32, env, i32, i64) |
82 | 82 |
DEF_HELPER_FLAGS_3(tcdb, TCG_CALL_NO_WG_SE, i32, env, i32, i64) |
83 | 83 |
DEF_HELPER_FLAGS_3(tcxb, TCG_CALL_NO_WG_SE, i32, env, i32, i64) |
b/target-s390x/insn-data.def | ||
---|---|---|
391 | 391 |
C(0xc201, MSFI, RIL_a, GIE, r1_o, i2, new, r1_32, mul, 0) |
392 | 392 |
C(0xc200, MSGFI, RIL_a, GIE, r1_o, i2, r1, 0, mul, 0) |
393 | 393 |
|
394 |
/* MULTIPLY AND ADD */ |
|
395 |
C(0xb30e, MAEBR, RRD, Z, e1, e2, new, e1, maeb, 0) |
|
396 |
C(0xb31e, MADBR, RRD, Z, f1_o, f2_o, f1, 0, madb, 0) |
|
397 |
C(0xed0e, MAEB, RXF, Z, e1, m2_32u, new, e1, maeb, 0) |
|
398 |
C(0xed1e, MADB, RXF, Z, f1_o, m2_64, f1, 0, madb, 0) |
|
399 |
/* MULTIPLY AND SUBTRACT */ |
|
400 |
C(0xb30f, MSEBR, RRD, Z, e1, e2, new, e1, mseb, 0) |
|
401 |
C(0xb31f, MSDBR, RRD, Z, f1_o, f2_o, f1, 0, msdb, 0) |
|
402 |
C(0xed0f, MSEB, RXF, Z, e1, m2_32u, new, e1, mseb, 0) |
|
403 |
C(0xed1f, MSDB, RXF, Z, f1_o, m2_64, f1, 0, msdb, 0) |
|
404 |
|
|
394 | 405 |
/* OR */ |
395 | 406 |
C(0x1600, OR, RR_a, Z, r1, r2, new, r1_32, or, nz32) |
396 | 407 |
C(0xb9f6, ORK, RRF_a, DO, r2, r3, new, r1_32, or, nz32) |
b/target-s390x/translate.c | ||
---|---|---|
990 | 990 |
static void disas_ed(CPUS390XState *env, DisasContext *s, int op, int r1, |
991 | 991 |
int x2, int b2, int d2, int r1b) |
992 | 992 |
{ |
993 |
TCGv_i32 tmp_r1, tmp32;
|
|
993 |
TCGv_i32 tmp_r1; |
|
994 | 994 |
TCGv_i64 addr; |
995 | 995 |
addr = get_address(s, x2, b2, d2); |
996 | 996 |
tmp_r1 = tcg_const_i32(r1); |
... | ... | |
1010 | 1010 |
gen_helper_tcxb(cc_op, cpu_env, tmp_r1, addr); |
1011 | 1011 |
set_cc_static(s); |
1012 | 1012 |
break; |
1013 |
case 0x1e: /* MADB R1,R3,D2(X2,B2) [RXF] */ |
|
1014 |
/* for RXF insns, r1 is R3 and r1b is R1 */ |
|
1015 |
tmp32 = tcg_const_i32(r1b); |
|
1016 |
potential_page_fault(s); |
|
1017 |
gen_helper_madb(cpu_env, tmp32, addr, tmp_r1); |
|
1018 |
tcg_temp_free_i32(tmp32); |
|
1019 |
break; |
|
1020 | 1013 |
default: |
1021 | 1014 |
LOG_DISAS("illegal ed operation 0x%x\n", op); |
1022 | 1015 |
gen_illegal_opcode(s); |
... | ... | |
1439 | 1432 |
case 0x15: /* SQBDR R1,R2 [RRE] */ |
1440 | 1433 |
FP_HELPER(sqdbr); |
1441 | 1434 |
break; |
1442 |
case 0xe: /* MAEBR R1,R3,R2 [RRF] */ |
|
1443 |
case 0x1e: /* MADBR R1,R3,R2 [RRF] */ |
|
1444 |
case 0x1f: /* MSDBR R1,R3,R2 [RRF] */ |
|
1445 |
/* for RRF insns, m3 is R1, r1 is R3, and r2 is R2 */ |
|
1446 |
tmp32_1 = tcg_const_i32(m3); |
|
1447 |
tmp32_2 = tcg_const_i32(r2); |
|
1448 |
tmp32_3 = tcg_const_i32(r1); |
|
1449 |
switch (op) { |
|
1450 |
case 0xe: |
|
1451 |
gen_helper_maebr(cpu_env, tmp32_1, tmp32_3, tmp32_2); |
|
1452 |
break; |
|
1453 |
case 0x1e: |
|
1454 |
gen_helper_madbr(cpu_env, tmp32_1, tmp32_3, tmp32_2); |
|
1455 |
break; |
|
1456 |
case 0x1f: |
|
1457 |
gen_helper_msdbr(cpu_env, tmp32_1, tmp32_3, tmp32_2); |
|
1458 |
break; |
|
1459 |
default: |
|
1460 |
tcg_abort(); |
|
1461 |
} |
|
1462 |
tcg_temp_free_i32(tmp32_1); |
|
1463 |
tcg_temp_free_i32(tmp32_2); |
|
1464 |
tcg_temp_free_i32(tmp32_3); |
|
1465 |
break; |
|
1466 | 1435 |
case 0x40: /* LPXBR R1,R2 [RRE] */ |
1467 | 1436 |
FP_HELPER_CC(lpxbr); |
1468 | 1437 |
break; |
... | ... | |
2837 | 2806 |
return NO_EXIT; |
2838 | 2807 |
} |
2839 | 2808 |
|
2809 |
static ExitStatus op_maeb(DisasContext *s, DisasOps *o) |
|
2810 |
{ |
|
2811 |
TCGv_i64 r3 = load_freg32_i64(get_field(s->fields, r3)); |
|
2812 |
gen_helper_maeb(o->out, cpu_env, o->in1, o->in2, r3); |
|
2813 |
tcg_temp_free_i64(r3); |
|
2814 |
return NO_EXIT; |
|
2815 |
} |
|
2816 |
|
|
2817 |
static ExitStatus op_madb(DisasContext *s, DisasOps *o) |
|
2818 |
{ |
|
2819 |
int r3 = get_field(s->fields, r3); |
|
2820 |
gen_helper_madb(o->out, cpu_env, o->in1, o->in2, fregs[r3]); |
|
2821 |
return NO_EXIT; |
|
2822 |
} |
|
2823 |
|
|
2824 |
static ExitStatus op_mseb(DisasContext *s, DisasOps *o) |
|
2825 |
{ |
|
2826 |
TCGv_i64 r3 = load_freg32_i64(get_field(s->fields, r3)); |
|
2827 |
gen_helper_mseb(o->out, cpu_env, o->in1, o->in2, r3); |
|
2828 |
tcg_temp_free_i64(r3); |
|
2829 |
return NO_EXIT; |
|
2830 |
} |
|
2831 |
|
|
2832 |
static ExitStatus op_msdb(DisasContext *s, DisasOps *o) |
|
2833 |
{ |
|
2834 |
int r3 = get_field(s->fields, r3); |
|
2835 |
gen_helper_msdb(o->out, cpu_env, o->in1, o->in2, fregs[r3]); |
|
2836 |
return NO_EXIT; |
|
2837 |
} |
|
2838 |
|
|
2840 | 2839 |
static ExitStatus op_nabs(DisasContext *s, DisasOps *o) |
2841 | 2840 |
{ |
2842 | 2841 |
gen_helper_nabs_i64(o->out, o->in2); |
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