Archipelago » qemu

    init_task_state(ts);

    ts->info = info;

    env->opaque = ts;

#if defined(TARGET_SPARC)

    {

    jmp_buf jmp_env;                                                    \

    int exception_index;                                                \

                                                                        \

    void *next_cpu; /* next CPU sharing TB cache */                     \

    int cpu_index; /* CPU index (informative) */                        \

    int running; /* Nonzero if cpu is currently running(usermode).  */  \

                    if (ret == EXCP_DEBUG)

                        cpu_handle_debug_exception(env);

                    break;

                    /* if user mode only, we simulate a fake exception

                       which will be handled outside the cpu execution

                       loop */

#endif

                    ret = env->exception_index;

                    break;

#if defined(TARGET_I386)

                    /* simulate a real cpu exception. On i386, it can

                       trigger new exceptions, but we do not handle

#elif defined(TARGET_M68K)

                    do_interrupt(0);

#endif

                }

                env->exception_index = -1;

            }

    memset(ts, 0, sizeof(TaskState));

    env->opaque = ts;

    ts->used = 1;

#if defined(TARGET_I386)

    cpu_x86_set_cpl(env, 3);

    init_task_state(ts);

    ts->info = info;

    env->opaque = ts;

#if defined(TARGET_I386)

    cpu_x86_set_cpl(env, 3);

    env->wim = 1;

    env->regwptr = env->regbase + (env->cwp * 16);

#if defined(CONFIG_USER_ONLY)

#ifdef TARGET_SPARC64

    env->cleanwin = env->nwindows - 2;

    env->cansave = env->nwindows - 2;

    env = cpu_init("qemu32");

    cpu_x86_set_cpl(env, 3);

    env->cr[0] = CR0_PG_MASK | CR0_WP_MASK | CR0_PE_MASK;