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1 | 87ecb68b | pbrook | #ifndef QEMU_SH_H
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2 | 87ecb68b | pbrook | #define QEMU_SH_H
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3 | 87ecb68b | pbrook | /* Definitions for SH board emulation. */
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4 | 87ecb68b | pbrook | |
5 | 703243a0 | balrog | #include "sh_intc.h" |
6 | 703243a0 | balrog | |
7 | 5c16736a | balrog | #define A7ADDR(x) ((x) & 0x1fffffff) |
8 | 5c16736a | balrog | #define P4ADDR(x) ((x) | 0xe0000000) |
9 | 5c16736a | balrog | |
10 | 87ecb68b | pbrook | /* sh7750.c */
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11 | 87ecb68b | pbrook | struct SH7750State;
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12 | 87ecb68b | pbrook | |
13 | 87ecb68b | pbrook | struct SH7750State *sh7750_init(CPUState * cpu);
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14 | 87ecb68b | pbrook | |
15 | 87ecb68b | pbrook | typedef struct { |
16 | 87ecb68b | pbrook | /* The callback will be triggered if any of the designated lines change */
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17 | 87ecb68b | pbrook | uint16_t portamask_trigger; |
18 | 87ecb68b | pbrook | uint16_t portbmask_trigger; |
19 | 87ecb68b | pbrook | /* Return 0 if no action was taken */
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20 | 87ecb68b | pbrook | int (*port_change_cb) (uint16_t porta, uint16_t portb,
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21 | 87ecb68b | pbrook | uint16_t * periph_pdtra, |
22 | 87ecb68b | pbrook | uint16_t * periph_portdira, |
23 | 87ecb68b | pbrook | uint16_t * periph_pdtrb, |
24 | 87ecb68b | pbrook | uint16_t * periph_portdirb); |
25 | 87ecb68b | pbrook | } sh7750_io_device; |
26 | 87ecb68b | pbrook | |
27 | 87ecb68b | pbrook | int sh7750_register_io_device(struct SH7750State *s, |
28 | 87ecb68b | pbrook | sh7750_io_device * device); |
29 | 87ecb68b | pbrook | /* sh_timer.c */
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30 | 87ecb68b | pbrook | #define TMU012_FEAT_TOCR (1 << 0) |
31 | 87ecb68b | pbrook | #define TMU012_FEAT_3CHAN (1 << 1) |
32 | 87ecb68b | pbrook | #define TMU012_FEAT_EXTCLK (1 << 2) |
33 | 703243a0 | balrog | void tmu012_init(target_phys_addr_t base, int feat, uint32_t freq, |
34 | 96e2fc41 | aurel32 | qemu_irq ch0_irq, qemu_irq ch1_irq, |
35 | 96e2fc41 | aurel32 | qemu_irq ch2_irq0, qemu_irq ch2_irq1); |
36 | 703243a0 | balrog | |
37 | 87ecb68b | pbrook | |
38 | 87ecb68b | pbrook | /* sh_serial.c */
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39 | 87ecb68b | pbrook | #define SH_SERIAL_FEAT_SCIF (1 << 0) |
40 | 87ecb68b | pbrook | void sh_serial_init (target_phys_addr_t base, int feat, |
41 | bf5b7423 | aurel32 | uint32_t freq, CharDriverState *chr, |
42 | 4e7ed2d1 | aurel32 | qemu_irq eri_source, |
43 | 4e7ed2d1 | aurel32 | qemu_irq rxi_source, |
44 | 4e7ed2d1 | aurel32 | qemu_irq txi_source, |
45 | 4e7ed2d1 | aurel32 | qemu_irq tei_source, |
46 | 4e7ed2d1 | aurel32 | qemu_irq bri_source); |
47 | 87ecb68b | pbrook | |
48 | c6d86a33 | balrog | /* sh7750.c */
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49 | c6d86a33 | balrog | qemu_irq sh7750_irl(struct SH7750State *s);
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50 | c6d86a33 | balrog | |
51 | 87ecb68b | pbrook | /* tc58128.c */
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52 | 7ccfb2eb | blueswir1 | int tc58128_init(struct SH7750State *s, const char *zone1, const char *zone2); |
53 | 87ecb68b | pbrook | |
54 | a4a771c0 | balrog | /* ide.c */
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55 | a4a771c0 | balrog | void mmio_ide_init(target_phys_addr_t membase, target_phys_addr_t membase2,
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56 | a4a771c0 | balrog | qemu_irq irq, int shift,
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57 | a4a771c0 | balrog | BlockDriverState *hd0, BlockDriverState *hd1); |
58 | 87ecb68b | pbrook | #endif |