Revision 73cfd29f hw/etraxfs_pic.c
| b/hw/etraxfs_pic.c | ||
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{
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} |
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static void irq_handler(void *opaque, int irq, int level) |
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{
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struct fs_pic_state *fs = (void *)opaque; |
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irq -= 1; |
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fs->regs[R_R_VECT] &= ~(1 << irq); |
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fs->regs[R_R_VECT] |= (!!level << irq); |
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pic_update(fs); |
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} |
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static void nmi_handler(void *opaque, int irq, int level) |
| 132 | 122 |
{
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struct fs_pic_state *fs = (void *)opaque; |
| ... | ... | |
| 146 | 136 |
cpu_reset_interrupt(env, CPU_INTERRUPT_NMI); |
| 147 | 137 |
} |
| 148 | 138 |
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static void guru_handler(void *opaque, int irq, int level)
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static void irq_handler(void *opaque, int irq, int level)
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{
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hw_error("%s unsupported exception\n", __func__);
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struct fs_pic_state *fs = (void *)opaque; |
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if (irq >= 30) |
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return nmi_handler(opaque, irq, level); |
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irq -= 1; |
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fs->regs[R_R_VECT] &= ~(1 << irq); |
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fs->regs[R_R_VECT] |= (!!level << irq); |
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pic_update(fs); |
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} |
| 153 | 151 |
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struct etraxfs_pic *etraxfs_pic_init(CPUState *env, target_phys_addr_t base)
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qemu_irq *etraxfs_pic_init(CPUState *env, target_phys_addr_t base)
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{
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struct fs_pic_state *fs = NULL; |
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struct etraxfs_pic *pic = NULL;
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qemu_irq *irq;
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int intr_vect_regs; |
| 159 | 157 |
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pic = qemu_mallocz(sizeof *pic); |
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pic->internal = fs = qemu_mallocz(sizeof *fs); |
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fs = qemu_mallocz(sizeof *fs); |
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fs->env = env; |
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pic->irq = qemu_allocate_irqs(irq_handler, fs, 30); |
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pic->nmi = qemu_allocate_irqs(nmi_handler, fs, 2); |
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pic->guru = qemu_allocate_irqs(guru_handler, fs, 1); |
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irq = qemu_allocate_irqs(irq_handler, fs, 32); |
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intr_vect_regs = cpu_register_io_memory(0, pic_read, pic_write, fs); |
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cpu_register_physical_memory(base, R_MAX * 4, intr_vect_regs); |
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return pic; |
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return irq; |
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} |
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