Revision 77831c20 hw/nseries.c
| b/hw/nseries.c | ||
|---|---|---|
| 134 | 134 |
static void n8x0_gpio_setup(struct n800_s *s) |
| 135 | 135 |
{
|
| 136 | 136 |
qemu_irq *mmc_cs = qemu_allocate_irqs(n800_mmc_cs_cb, s->cpu->mmc, 1); |
| 137 |
omap2_gpio_out_set(s->cpu->gpif, N8X0_MMC_CS_GPIO, mmc_cs[0]);
|
|
| 137 |
qdev_connect_gpio_out(s->cpu->gpio, N8X0_MMC_CS_GPIO, mmc_cs[0]);
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|
| 138 | 138 |
|
| 139 |
qemu_irq_lower(omap2_gpio_in_get(s->cpu->gpif, N800_BAT_COVER_GPIO)[0]);
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|
| 139 |
qemu_irq_lower(qdev_get_gpio_in(s->cpu->gpio, N800_BAT_COVER_GPIO));
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|
| 140 | 140 |
} |
| 141 | 141 |
|
| 142 | 142 |
#define MAEMO_CAL_HEADER(...) \ |
| ... | ... | |
| 168 | 168 |
omap_gpmc_attach(s->cpu->gpmc, N8X0_ONENAND_CS, 0, onenand_base_update, |
| 169 | 169 |
onenand_base_unmap, |
| 170 | 170 |
(s->nand = onenand_init(0xec4800, 1, |
| 171 |
omap2_gpio_in_get(s->cpu->gpif,
|
|
| 172 |
N8X0_ONENAND_GPIO)[0])));
|
|
| 171 |
qdev_get_gpio_in(s->cpu->gpio,
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| 172 |
N8X0_ONENAND_GPIO)))); |
|
| 173 | 173 |
otp_region = onenand_raw_otp(s->nand); |
| 174 | 174 |
|
| 175 | 175 |
memcpy(otp_region + 0x000, n8x0_cal_wlan_mac, sizeof(n8x0_cal_wlan_mac)); |
| ... | ... | |
| 180 | 180 |
static void n8x0_i2c_setup(struct n800_s *s) |
| 181 | 181 |
{
|
| 182 | 182 |
DeviceState *dev; |
| 183 |
qemu_irq tmp_irq = omap2_gpio_in_get(s->cpu->gpif, N8X0_TMP105_GPIO)[0];
|
|
| 183 |
qemu_irq tmp_irq = qdev_get_gpio_in(s->cpu->gpio, N8X0_TMP105_GPIO);
|
|
| 184 | 184 |
|
| 185 | 185 |
/* Attach the CPU on one end of our I2C bus. */ |
| 186 | 186 |
s->i2c = omap_i2c_bus(s->cpu->i2c[0]); |
| ... | ... | |
| 249 | 249 |
/* XXX: are the three pins inverted inside the chip between the |
| 250 | 250 |
* tsc and the cpu (N4111)? */ |
| 251 | 251 |
qemu_irq penirq = NULL; /* NC */ |
| 252 |
qemu_irq kbirq = omap2_gpio_in_get(s->cpu->gpif, N800_TSC_KP_IRQ_GPIO)[0];
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|
| 253 |
qemu_irq dav = omap2_gpio_in_get(s->cpu->gpif, N800_TSC_TS_GPIO)[0];
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| 252 |
qemu_irq kbirq = qdev_get_gpio_in(s->cpu->gpio, N800_TSC_KP_IRQ_GPIO);
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| 253 |
qemu_irq dav = qdev_get_gpio_in(s->cpu->gpio, N800_TSC_TS_GPIO);
|
|
| 254 | 254 |
|
| 255 | 255 |
s->ts.chip = tsc2301_init(penirq, kbirq, dav); |
| 256 | 256 |
s->ts.opaque = s->ts.chip->opaque; |
| ... | ... | |
| 269 | 269 |
|
| 270 | 270 |
static void n810_tsc_setup(struct n800_s *s) |
| 271 | 271 |
{
|
| 272 |
qemu_irq pintdav = omap2_gpio_in_get(s->cpu->gpif, N810_TSC_TS_GPIO)[0];
|
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| 272 |
qemu_irq pintdav = qdev_get_gpio_in(s->cpu->gpio, N810_TSC_TS_GPIO);
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| 273 | 273 |
|
| 274 | 274 |
s->ts.opaque = tsc2005_init(pintdav); |
| 275 | 275 |
s->ts.txrx = tsc2005_txrx; |
| ... | ... | |
| 361 | 361 |
|
| 362 | 362 |
static void n810_kbd_setup(struct n800_s *s) |
| 363 | 363 |
{
|
| 364 |
qemu_irq kbd_irq = omap2_gpio_in_get(s->cpu->gpif, N810_KEYBOARD_GPIO)[0];
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| 364 |
qemu_irq kbd_irq = qdev_get_gpio_in(s->cpu->gpio, N810_KEYBOARD_GPIO);
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| 365 | 365 |
DeviceState *dev; |
| 366 | 366 |
int i; |
| 367 | 367 |
|
| ... | ... | |
| 726 | 726 |
|
| 727 | 727 |
static void n8x0_cbus_setup(struct n800_s *s) |
| 728 | 728 |
{
|
| 729 |
qemu_irq dat_out = omap2_gpio_in_get(s->cpu->gpif, N8X0_CBUS_DAT_GPIO)[0];
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| 730 |
qemu_irq retu_irq = omap2_gpio_in_get(s->cpu->gpif, N8X0_RETU_GPIO)[0];
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| 731 |
qemu_irq tahvo_irq = omap2_gpio_in_get(s->cpu->gpif, N8X0_TAHVO_GPIO)[0];
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| 729 |
qemu_irq dat_out = qdev_get_gpio_in(s->cpu->gpio, N8X0_CBUS_DAT_GPIO);
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| 730 |
qemu_irq retu_irq = qdev_get_gpio_in(s->cpu->gpio, N8X0_RETU_GPIO);
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| 731 |
qemu_irq tahvo_irq = qdev_get_gpio_in(s->cpu->gpio, N8X0_TAHVO_GPIO);
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| 732 | 732 |
|
| 733 | 733 |
CBus *cbus = cbus_init(dat_out); |
| 734 | 734 |
|
| 735 |
omap2_gpio_out_set(s->cpu->gpif, N8X0_CBUS_CLK_GPIO, cbus->clk);
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| 736 |
omap2_gpio_out_set(s->cpu->gpif, N8X0_CBUS_DAT_GPIO, cbus->dat);
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| 737 |
omap2_gpio_out_set(s->cpu->gpif, N8X0_CBUS_SEL_GPIO, cbus->sel);
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| 735 |
qdev_connect_gpio_out(s->cpu->gpio, N8X0_CBUS_CLK_GPIO, cbus->clk);
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| 736 |
qdev_connect_gpio_out(s->cpu->gpio, N8X0_CBUS_DAT_GPIO, cbus->dat);
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| 737 |
qdev_connect_gpio_out(s->cpu->gpio, N8X0_CBUS_SEL_GPIO, cbus->sel);
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| 738 | 738 |
|
| 739 | 739 |
cbus_attach(cbus, s->retu = retu_init(retu_irq, 1)); |
| 740 | 740 |
cbus_attach(cbus, s->tahvo = tahvo_init(tahvo_irq, 1)); |
| ... | ... | |
| 743 | 743 |
static void n8x0_uart_setup(struct n800_s *s) |
| 744 | 744 |
{
|
| 745 | 745 |
CharDriverState *radio = uart_hci_init( |
| 746 |
omap2_gpio_in_get(s->cpu->gpif, |
|
| 747 |
N8X0_BT_HOST_WKUP_GPIO)[0]); |
|
| 746 |
qdev_get_gpio_in(s->cpu->gpio, N8X0_BT_HOST_WKUP_GPIO)); |
|
| 748 | 747 |
|
| 749 |
omap2_gpio_out_set(s->cpu->gpif, N8X0_BT_RESET_GPIO,
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| 748 |
qdev_connect_gpio_out(s->cpu->gpio, N8X0_BT_RESET_GPIO,
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|
| 750 | 749 |
csrhci_pins_get(radio)[csrhci_pin_reset]); |
| 751 |
omap2_gpio_out_set(s->cpu->gpif, N8X0_BT_WKUP_GPIO,
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|
| 750 |
qdev_connect_gpio_out(s->cpu->gpio, N8X0_BT_WKUP_GPIO,
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|
| 752 | 751 |
csrhci_pins_get(radio)[csrhci_pin_wakeup]); |
| 753 | 752 |
|
| 754 | 753 |
omap_uart_attach(s->cpu->uart[BT_UART], radio); |
| ... | ... | |
| 763 | 762 |
|
| 764 | 763 |
static void n8x0_usb_setup(struct n800_s *s) |
| 765 | 764 |
{
|
| 766 |
qemu_irq tusb_irq = omap2_gpio_in_get(s->cpu->gpif, N8X0_TUSB_INT_GPIO)[0];
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| 765 |
qemu_irq tusb_irq = qdev_get_gpio_in(s->cpu->gpio, N8X0_TUSB_INT_GPIO);
|
|
| 767 | 766 |
qemu_irq tusb_pwr = qemu_allocate_irqs(n8x0_usb_power_cb, s, 1)[0]; |
| 768 | 767 |
TUSBState *tusb = tusb6010_init(tusb_irq); |
| 769 | 768 |
|
| ... | ... | |
| 774 | 773 |
tusb6010_sync_io(tusb), NULL, NULL, tusb); |
| 775 | 774 |
|
| 776 | 775 |
s->usb = tusb; |
| 777 |
omap2_gpio_out_set(s->cpu->gpif, N8X0_TUSB_ENABLE_GPIO, tusb_pwr);
|
|
| 776 |
qdev_connect_gpio_out(s->cpu->gpio, N8X0_TUSB_ENABLE_GPIO, tusb_pwr);
|
|
| 778 | 777 |
} |
| 779 | 778 |
|
| 780 | 779 |
/* Setup done before the main bootloader starts by some early setup code |
| ... | ... | |
| 1020 | 1019 |
|
| 1021 | 1020 |
/* If the machine has a slided keyboard, open it */ |
| 1022 | 1021 |
if (s->kbd) |
| 1023 |
qemu_irq_raise(omap2_gpio_in_get(s->cpu->gpif, N810_SLIDE_GPIO)[0]);
|
|
| 1022 |
qemu_irq_raise(qdev_get_gpio_in(s->cpu->gpio, N810_SLIDE_GPIO));
|
|
| 1024 | 1023 |
} |
| 1025 | 1024 |
|
| 1026 | 1025 |
#define OMAP_TAG_NOKIA_BT 0x4e01 |
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