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/*
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* gdb server stub
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*
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* Copyright (c) 2003-2005 Fabrice Bellard
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*
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* This library is free software; you can redistribute it and/or
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* modify it under the terms of the GNU Lesser General Public
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* License as published by the Free Software Foundation; either
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* version 2 of the License, or (at your option) any later version.
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*
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* This library is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
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* Lesser General Public License for more details.
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*
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* You should have received a copy of the GNU Lesser General Public
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* License along with this library; if not, write to the Free Software
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* Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
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*/
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#include "config.h" |
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#ifdef CONFIG_USER_ONLY
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#include <stdlib.h> |
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#include <stdio.h> |
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#include <stdarg.h> |
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#include <string.h> |
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#include <errno.h> |
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#include <unistd.h> |
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#include <fcntl.h> |
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#include "qemu.h" |
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#else
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#include "qemu-common.h" |
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#include "qemu-char.h" |
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#include "sysemu.h" |
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#include "gdbstub.h" |
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#endif
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#include "qemu_socket.h" |
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#ifdef _WIN32
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/* XXX: these constants may be independent of the host ones even for Unix */
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#ifndef SIGTRAP
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#define SIGTRAP 5 |
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#endif
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#ifndef SIGINT
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#define SIGINT 2 |
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#endif
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#else
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#include <signal.h> |
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#endif
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//#define DEBUG_GDB
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enum RSState {
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RS_IDLE, |
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RS_GETLINE, |
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RS_CHKSUM1, |
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RS_CHKSUM2, |
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RS_SYSCALL, |
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}; |
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typedef struct GDBState { |
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CPUState *env; /* current CPU */
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enum RSState state; /* parsing state */ |
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char line_buf[4096]; |
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int line_buf_index;
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int line_csum;
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uint8_t last_packet[4100];
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int last_packet_len;
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#ifdef CONFIG_USER_ONLY
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int fd;
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int running_state;
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#else
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CharDriverState *chr; |
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#endif
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} GDBState; |
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/* By default use no IRQs and no timers while single stepping so as to
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* make single stepping like an ICE HW step.
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*/
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static int sstep_flags = SSTEP_ENABLE|SSTEP_NOIRQ|SSTEP_NOTIMER; |
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#ifdef CONFIG_USER_ONLY
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/* XXX: This is not thread safe. Do we care? */
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static int gdbserver_fd = -1; |
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/* XXX: remove this hack. */
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static GDBState gdbserver_state;
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static int get_char(GDBState *s) |
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{ |
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uint8_t ch; |
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int ret;
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for(;;) {
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ret = recv(s->fd, &ch, 1, 0); |
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if (ret < 0) { |
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if (errno != EINTR && errno != EAGAIN)
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return -1; |
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} else if (ret == 0) { |
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return -1; |
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} else {
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break;
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} |
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} |
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return ch;
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} |
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#endif
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/* GDB stub state for use by semihosting syscalls. */
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static GDBState *gdb_syscall_state;
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static gdb_syscall_complete_cb gdb_current_syscall_cb;
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enum {
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GDB_SYS_UNKNOWN, |
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GDB_SYS_ENABLED, |
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GDB_SYS_DISABLED, |
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} gdb_syscall_mode; |
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/* If gdb is connected when the first semihosting syscall occurs then use
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remote gdb syscalls. Otherwise use native file IO. */
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int use_gdb_syscalls(void) |
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{ |
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if (gdb_syscall_mode == GDB_SYS_UNKNOWN) {
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gdb_syscall_mode = (gdb_syscall_state ? GDB_SYS_ENABLED |
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: GDB_SYS_DISABLED); |
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} |
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return gdb_syscall_mode == GDB_SYS_ENABLED;
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} |
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/* Resume execution. */
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static inline void gdb_continue(GDBState *s) |
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{ |
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#ifdef CONFIG_USER_ONLY
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s->running_state = 1;
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#else
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vm_start(); |
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#endif
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} |
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static void put_buffer(GDBState *s, const uint8_t *buf, int len) |
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{ |
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#ifdef CONFIG_USER_ONLY
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int ret;
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while (len > 0) { |
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ret = send(s->fd, buf, len, 0);
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if (ret < 0) { |
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if (errno != EINTR && errno != EAGAIN)
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return;
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} else {
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buf += ret; |
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len -= ret; |
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} |
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} |
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#else
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qemu_chr_write(s->chr, buf, len); |
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#endif
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} |
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static inline int fromhex(int v) |
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{ |
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if (v >= '0' && v <= '9') |
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return v - '0'; |
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else if (v >= 'A' && v <= 'F') |
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return v - 'A' + 10; |
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else if (v >= 'a' && v <= 'f') |
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return v - 'a' + 10; |
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else
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return 0; |
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} |
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static inline int tohex(int v) |
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{ |
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if (v < 10) |
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return v + '0'; |
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else
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return v - 10 + 'a'; |
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} |
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static void memtohex(char *buf, const uint8_t *mem, int len) |
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{ |
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int i, c;
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char *q;
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q = buf; |
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for(i = 0; i < len; i++) { |
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c = mem[i]; |
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*q++ = tohex(c >> 4);
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*q++ = tohex(c & 0xf);
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} |
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*q = '\0';
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} |
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static void hextomem(uint8_t *mem, const char *buf, int len) |
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{ |
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int i;
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for(i = 0; i < len; i++) { |
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mem[i] = (fromhex(buf[0]) << 4) | fromhex(buf[1]); |
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buf += 2;
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} |
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} |
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/* return -1 if error, 0 if OK */
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static int put_packet(GDBState *s, char *buf) |
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{ |
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int len, csum, i;
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uint8_t *p; |
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#ifdef DEBUG_GDB
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printf("reply='%s'\n", buf);
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#endif
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for(;;) {
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p = s->last_packet; |
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*(p++) = '$';
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len = strlen(buf); |
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memcpy(p, buf, len); |
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p += len; |
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csum = 0;
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for(i = 0; i < len; i++) { |
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csum += buf[i]; |
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} |
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*(p++) = '#';
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*(p++) = tohex((csum >> 4) & 0xf); |
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*(p++) = tohex((csum) & 0xf);
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s->last_packet_len = p - s->last_packet; |
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put_buffer(s, (uint8_t *)s->last_packet, s->last_packet_len); |
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#ifdef CONFIG_USER_ONLY
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i = get_char(s); |
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if (i < 0) |
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return -1; |
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if (i == '+') |
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break;
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#else
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break;
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#endif
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} |
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return 0; |
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} |
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#if defined(TARGET_I386)
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#ifdef TARGET_X86_64
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static const uint8_t gdb_x86_64_regs[16] = { |
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R_EAX, R_EBX, R_ECX, R_EDX, R_ESI, R_EDI, R_EBP, R_ESP, |
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8, 9, 10, 11, 12, 13, 14, 15, |
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}; |
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#endif
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static int cpu_gdb_read_registers(CPUState *env, uint8_t *mem_buf) |
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{ |
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int i, fpus, nb_regs;
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uint8_t *p; |
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p = mem_buf; |
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#ifdef TARGET_X86_64
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if (env->hflags & HF_CS64_MASK) {
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nb_regs = 16;
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for(i = 0; i < 16; i++) { |
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*(uint64_t *)p = tswap64(env->regs[gdb_x86_64_regs[i]]); |
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p += 8;
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} |
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*(uint64_t *)p = tswap64(env->eip); |
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p += 8;
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} else
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#endif
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{ |
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nb_regs = 8;
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for(i = 0; i < 8; i++) { |
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*(uint32_t *)p = tswap32(env->regs[i]); |
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p += 4;
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} |
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*(uint32_t *)p = tswap32(env->eip); |
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p += 4;
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} |
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*(uint32_t *)p = tswap32(env->eflags); |
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p += 4;
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*(uint32_t *)p = tswap32(env->segs[R_CS].selector); |
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p += 4;
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*(uint32_t *)p = tswap32(env->segs[R_SS].selector); |
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p += 4;
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*(uint32_t *)p = tswap32(env->segs[R_DS].selector); |
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p += 4;
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*(uint32_t *)p = tswap32(env->segs[R_ES].selector); |
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p += 4;
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*(uint32_t *)p = tswap32(env->segs[R_FS].selector); |
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p += 4;
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*(uint32_t *)p = tswap32(env->segs[R_GS].selector); |
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p += 4;
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for(i = 0; i < 8; i++) { |
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/* XXX: convert floats */
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#ifdef USE_X86LDOUBLE
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memcpy(p, &env->fpregs[i], 10);
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#else
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memset(p, 0, 10); |
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#endif
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p += 10;
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} |
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*(uint32_t *)p = tswap32(env->fpuc); /* fctrl */
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p += 4;
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fpus = (env->fpus & ~0x3800) | (env->fpstt & 0x7) << 11; |
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*(uint32_t *)p = tswap32(fpus); /* fstat */
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p += 4;
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*(uint32_t *)p = 0; /* ftag */ |
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p += 4;
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*(uint32_t *)p = 0; /* fiseg */ |
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p += 4;
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*(uint32_t *)p = 0; /* fioff */ |
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p += 4;
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*(uint32_t *)p = 0; /* foseg */ |
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p += 4;
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*(uint32_t *)p = 0; /* fooff */ |
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p += 4;
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*(uint32_t *)p = 0; /* fop */ |
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p += 4;
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for(i = 0; i < nb_regs; i++) { |
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*(uint64_t *)p = tswap64(env->xmm_regs[i].XMM_Q(0));
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p += 8;
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*(uint64_t *)p = tswap64(env->xmm_regs[i].XMM_Q(1));
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p += 8;
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} |
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*(uint32_t *)p = tswap32(env->mxcsr); |
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p += 4;
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return p - mem_buf;
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} |
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static inline void cpu_gdb_load_seg(CPUState *env, const uint8_t **pp, |
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int sreg)
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{ |
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const uint8_t *p;
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uint32_t sel; |
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p = *pp; |
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sel = tswap32(*(uint32_t *)p); |
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p += 4;
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if (sel != env->segs[sreg].selector) {
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#if defined(CONFIG_USER_ONLY)
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cpu_x86_load_seg(env, sreg, sel); |
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#else
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/* XXX: do it with a debug function which does not raise an
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exception */
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#endif
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} |
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*pp = p; |
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} |
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static void cpu_gdb_write_registers(CPUState *env, uint8_t *mem_buf, int size) |
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{ |
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const uint8_t *p = mem_buf;
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int i, nb_regs;
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uint16_t fpus; |
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#ifdef TARGET_X86_64
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if (env->hflags & HF_CS64_MASK) {
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nb_regs = 16;
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for(i = 0; i < 16; i++) { |
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env->regs[gdb_x86_64_regs[i]] = tswap64(*(uint64_t *)p); |
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p += 8;
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} |
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env->eip = tswap64(*(uint64_t *)p); |
362 |
p += 8;
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} else
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#endif
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{ |
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nb_regs = 8;
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for(i = 0; i < 8; i++) { |
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env->regs[i] = tswap32(*(uint32_t *)p); |
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p += 4;
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} |
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env->eip = tswap32(*(uint32_t *)p); |
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p += 4;
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} |
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env->eflags = tswap32(*(uint32_t *)p); |
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p += 4;
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cpu_gdb_load_seg(env, &p, R_CS); |
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cpu_gdb_load_seg(env, &p, R_SS); |
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cpu_gdb_load_seg(env, &p, R_DS); |
379 |
cpu_gdb_load_seg(env, &p, R_ES); |
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cpu_gdb_load_seg(env, &p, R_FS); |
381 |
cpu_gdb_load_seg(env, &p, R_GS); |
382 |
|
383 |
/* FPU state */
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for(i = 0; i < 8; i++) { |
385 |
/* XXX: convert floats */
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#ifdef USE_X86LDOUBLE
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memcpy(&env->fpregs[i], p, 10);
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#endif
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p += 10;
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} |
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env->fpuc = tswap32(*(uint32_t *)p); /* fctrl */
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p += 4;
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fpus = tswap32(*(uint32_t *)p); |
394 |
p += 4;
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env->fpstt = (fpus >> 11) & 7; |
396 |
env->fpus = fpus & ~0x3800;
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p += 4 * 6; |
398 |
|
399 |
if (size >= ((p - mem_buf) + 16 * nb_regs + 4)) { |
400 |
/* SSE state */
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401 |
for(i = 0; i < nb_regs; i++) { |
402 |
env->xmm_regs[i].XMM_Q(0) = tswap64(*(uint64_t *)p);
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p += 8;
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env->xmm_regs[i].XMM_Q(1) = tswap64(*(uint64_t *)p);
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p += 8;
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406 |
} |
407 |
env->mxcsr = tswap32(*(uint32_t *)p); |
408 |
p += 4;
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409 |
} |
410 |
} |
411 |
|
412 |
#elif defined (TARGET_PPC)
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413 |
static int cpu_gdb_read_registers(CPUState *env, uint8_t *mem_buf) |
414 |
{ |
415 |
uint32_t *registers = (uint32_t *)mem_buf, tmp; |
416 |
int i;
|
417 |
|
418 |
/* fill in gprs */
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419 |
for(i = 0; i < 32; i++) { |
420 |
registers[i] = tswapl(env->gpr[i]); |
421 |
} |
422 |
/* fill in fprs */
|
423 |
for (i = 0; i < 32; i++) { |
424 |
registers[(i * 2) + 32] = tswapl(*((uint32_t *)&env->fpr[i])); |
425 |
registers[(i * 2) + 33] = tswapl(*((uint32_t *)&env->fpr[i] + 1)); |
426 |
} |
427 |
/* nip, msr, ccr, lnk, ctr, xer, mq */
|
428 |
registers[96] = tswapl(env->nip);
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429 |
registers[97] = tswapl(env->msr);
|
430 |
tmp = 0;
|
431 |
for (i = 0; i < 8; i++) |
432 |
tmp |= env->crf[i] << (32 - ((i + 1) * 4)); |
433 |
registers[98] = tswapl(tmp);
|
434 |
registers[99] = tswapl(env->lr);
|
435 |
registers[100] = tswapl(env->ctr);
|
436 |
registers[101] = tswapl(ppc_load_xer(env));
|
437 |
registers[102] = 0; |
438 |
|
439 |
return 103 * 4; |
440 |
} |
441 |
|
442 |
static void cpu_gdb_write_registers(CPUState *env, uint8_t *mem_buf, int size) |
443 |
{ |
444 |
uint32_t *registers = (uint32_t *)mem_buf; |
445 |
int i;
|
446 |
|
447 |
/* fill in gprs */
|
448 |
for (i = 0; i < 32; i++) { |
449 |
env->gpr[i] = tswapl(registers[i]); |
450 |
} |
451 |
/* fill in fprs */
|
452 |
for (i = 0; i < 32; i++) { |
453 |
*((uint32_t *)&env->fpr[i]) = tswapl(registers[(i * 2) + 32]); |
454 |
*((uint32_t *)&env->fpr[i] + 1) = tswapl(registers[(i * 2) + 33]); |
455 |
} |
456 |
/* nip, msr, ccr, lnk, ctr, xer, mq */
|
457 |
env->nip = tswapl(registers[96]);
|
458 |
ppc_store_msr(env, tswapl(registers[97]));
|
459 |
registers[98] = tswapl(registers[98]); |
460 |
for (i = 0; i < 8; i++) |
461 |
env->crf[i] = (registers[98] >> (32 - ((i + 1) * 4))) & 0xF; |
462 |
env->lr = tswapl(registers[99]);
|
463 |
env->ctr = tswapl(registers[100]);
|
464 |
ppc_store_xer(env, tswapl(registers[101]));
|
465 |
} |
466 |
#elif defined (TARGET_SPARC)
|
467 |
static int cpu_gdb_read_registers(CPUState *env, uint8_t *mem_buf) |
468 |
{ |
469 |
target_ulong *registers = (target_ulong *)mem_buf; |
470 |
int i;
|
471 |
|
472 |
/* fill in g0..g7 */
|
473 |
for(i = 0; i < 8; i++) { |
474 |
registers[i] = tswapl(env->gregs[i]); |
475 |
} |
476 |
/* fill in register window */
|
477 |
for(i = 0; i < 24; i++) { |
478 |
registers[i + 8] = tswapl(env->regwptr[i]);
|
479 |
} |
480 |
#ifndef TARGET_SPARC64
|
481 |
/* fill in fprs */
|
482 |
for (i = 0; i < 32; i++) { |
483 |
registers[i + 32] = tswapl(*((uint32_t *)&env->fpr[i]));
|
484 |
} |
485 |
/* Y, PSR, WIM, TBR, PC, NPC, FPSR, CPSR */
|
486 |
registers[64] = tswapl(env->y);
|
487 |
{ |
488 |
target_ulong tmp; |
489 |
|
490 |
tmp = GET_PSR(env); |
491 |
registers[65] = tswapl(tmp);
|
492 |
} |
493 |
registers[66] = tswapl(env->wim);
|
494 |
registers[67] = tswapl(env->tbr);
|
495 |
registers[68] = tswapl(env->pc);
|
496 |
registers[69] = tswapl(env->npc);
|
497 |
registers[70] = tswapl(env->fsr);
|
498 |
registers[71] = 0; /* csr */ |
499 |
registers[72] = 0; |
500 |
return 73 * sizeof(target_ulong); |
501 |
#else
|
502 |
/* fill in fprs */
|
503 |
for (i = 0; i < 64; i += 2) { |
504 |
uint64_t tmp; |
505 |
|
506 |
tmp = ((uint64_t)*(uint32_t *)&env->fpr[i]) << 32;
|
507 |
tmp |= *(uint32_t *)&env->fpr[i + 1];
|
508 |
registers[i / 2 + 32] = tswap64(tmp); |
509 |
} |
510 |
registers[64] = tswapl(env->pc);
|
511 |
registers[65] = tswapl(env->npc);
|
512 |
registers[66] = tswapl(((uint64_t)GET_CCR(env) << 32) | |
513 |
((env->asi & 0xff) << 24) | |
514 |
((env->pstate & 0xfff) << 8) | |
515 |
GET_CWP64(env)); |
516 |
registers[67] = tswapl(env->fsr);
|
517 |
registers[68] = tswapl(env->fprs);
|
518 |
registers[69] = tswapl(env->y);
|
519 |
return 70 * sizeof(target_ulong); |
520 |
#endif
|
521 |
} |
522 |
|
523 |
static void cpu_gdb_write_registers(CPUState *env, uint8_t *mem_buf, int size) |
524 |
{ |
525 |
target_ulong *registers = (target_ulong *)mem_buf; |
526 |
int i;
|
527 |
|
528 |
/* fill in g0..g7 */
|
529 |
for(i = 0; i < 7; i++) { |
530 |
env->gregs[i] = tswapl(registers[i]); |
531 |
} |
532 |
/* fill in register window */
|
533 |
for(i = 0; i < 24; i++) { |
534 |
env->regwptr[i] = tswapl(registers[i + 8]);
|
535 |
} |
536 |
#ifndef TARGET_SPARC64
|
537 |
/* fill in fprs */
|
538 |
for (i = 0; i < 32; i++) { |
539 |
*((uint32_t *)&env->fpr[i]) = tswapl(registers[i + 32]);
|
540 |
} |
541 |
/* Y, PSR, WIM, TBR, PC, NPC, FPSR, CPSR */
|
542 |
env->y = tswapl(registers[64]);
|
543 |
PUT_PSR(env, tswapl(registers[65]));
|
544 |
env->wim = tswapl(registers[66]);
|
545 |
env->tbr = tswapl(registers[67]);
|
546 |
env->pc = tswapl(registers[68]);
|
547 |
env->npc = tswapl(registers[69]);
|
548 |
env->fsr = tswapl(registers[70]);
|
549 |
#else
|
550 |
for (i = 0; i < 64; i += 2) { |
551 |
uint64_t tmp; |
552 |
|
553 |
tmp = tswap64(registers[i / 2 + 32]); |
554 |
*((uint32_t *)&env->fpr[i]) = tmp >> 32;
|
555 |
*((uint32_t *)&env->fpr[i + 1]) = tmp & 0xffffffff; |
556 |
} |
557 |
env->pc = tswapl(registers[64]);
|
558 |
env->npc = tswapl(registers[65]);
|
559 |
{ |
560 |
uint64_t tmp = tswapl(registers[66]);
|
561 |
|
562 |
PUT_CCR(env, tmp >> 32);
|
563 |
env->asi = (tmp >> 24) & 0xff; |
564 |
env->pstate = (tmp >> 8) & 0xfff; |
565 |
PUT_CWP64(env, tmp & 0xff);
|
566 |
} |
567 |
env->fsr = tswapl(registers[67]);
|
568 |
env->fprs = tswapl(registers[68]);
|
569 |
env->y = tswapl(registers[69]);
|
570 |
#endif
|
571 |
} |
572 |
#elif defined (TARGET_ARM)
|
573 |
static int cpu_gdb_read_registers(CPUState *env, uint8_t *mem_buf) |
574 |
{ |
575 |
int i;
|
576 |
uint8_t *ptr; |
577 |
|
578 |
ptr = mem_buf; |
579 |
/* 16 core integer registers (4 bytes each). */
|
580 |
for (i = 0; i < 16; i++) |
581 |
{ |
582 |
*(uint32_t *)ptr = tswapl(env->regs[i]); |
583 |
ptr += 4;
|
584 |
} |
585 |
/* 8 FPA registers (12 bytes each), FPS (4 bytes).
|
586 |
Not yet implemented. */
|
587 |
memset (ptr, 0, 8 * 12 + 4); |
588 |
ptr += 8 * 12 + 4; |
589 |
/* CPSR (4 bytes). */
|
590 |
*(uint32_t *)ptr = tswapl (cpsr_read(env)); |
591 |
ptr += 4;
|
592 |
|
593 |
return ptr - mem_buf;
|
594 |
} |
595 |
|
596 |
static void cpu_gdb_write_registers(CPUState *env, uint8_t *mem_buf, int size) |
597 |
{ |
598 |
int i;
|
599 |
uint8_t *ptr; |
600 |
|
601 |
ptr = mem_buf; |
602 |
/* Core integer registers. */
|
603 |
for (i = 0; i < 16; i++) |
604 |
{ |
605 |
env->regs[i] = tswapl(*(uint32_t *)ptr); |
606 |
ptr += 4;
|
607 |
} |
608 |
/* Ignore FPA regs and scr. */
|
609 |
ptr += 8 * 12 + 4; |
610 |
cpsr_write (env, tswapl(*(uint32_t *)ptr), 0xffffffff);
|
611 |
} |
612 |
#elif defined (TARGET_M68K)
|
613 |
static int cpu_gdb_read_registers(CPUState *env, uint8_t *mem_buf) |
614 |
{ |
615 |
int i;
|
616 |
uint8_t *ptr; |
617 |
CPU_DoubleU u; |
618 |
|
619 |
ptr = mem_buf; |
620 |
/* D0-D7 */
|
621 |
for (i = 0; i < 8; i++) { |
622 |
*(uint32_t *)ptr = tswapl(env->dregs[i]); |
623 |
ptr += 4;
|
624 |
} |
625 |
/* A0-A7 */
|
626 |
for (i = 0; i < 8; i++) { |
627 |
*(uint32_t *)ptr = tswapl(env->aregs[i]); |
628 |
ptr += 4;
|
629 |
} |
630 |
*(uint32_t *)ptr = tswapl(env->sr); |
631 |
ptr += 4;
|
632 |
*(uint32_t *)ptr = tswapl(env->pc); |
633 |
ptr += 4;
|
634 |
/* F0-F7. The 68881/68040 have 12-bit extended precision registers.
|
635 |
ColdFire has 8-bit double precision registers. */
|
636 |
for (i = 0; i < 8; i++) { |
637 |
u.d = env->fregs[i]; |
638 |
*(uint32_t *)ptr = tswap32(u.l.upper); |
639 |
*(uint32_t *)ptr = tswap32(u.l.lower); |
640 |
} |
641 |
/* FP control regs (not implemented). */
|
642 |
memset (ptr, 0, 3 * 4); |
643 |
ptr += 3 * 4; |
644 |
|
645 |
return ptr - mem_buf;
|
646 |
} |
647 |
|
648 |
static void cpu_gdb_write_registers(CPUState *env, uint8_t *mem_buf, int size) |
649 |
{ |
650 |
int i;
|
651 |
uint8_t *ptr; |
652 |
CPU_DoubleU u; |
653 |
|
654 |
ptr = mem_buf; |
655 |
/* D0-D7 */
|
656 |
for (i = 0; i < 8; i++) { |
657 |
env->dregs[i] = tswapl(*(uint32_t *)ptr); |
658 |
ptr += 4;
|
659 |
} |
660 |
/* A0-A7 */
|
661 |
for (i = 0; i < 8; i++) { |
662 |
env->aregs[i] = tswapl(*(uint32_t *)ptr); |
663 |
ptr += 4;
|
664 |
} |
665 |
env->sr = tswapl(*(uint32_t *)ptr); |
666 |
ptr += 4;
|
667 |
env->pc = tswapl(*(uint32_t *)ptr); |
668 |
ptr += 4;
|
669 |
/* F0-F7. The 68881/68040 have 12-bit extended precision registers.
|
670 |
ColdFire has 8-bit double precision registers. */
|
671 |
for (i = 0; i < 8; i++) { |
672 |
u.l.upper = tswap32(*(uint32_t *)ptr); |
673 |
u.l.lower = tswap32(*(uint32_t *)ptr); |
674 |
env->fregs[i] = u.d; |
675 |
} |
676 |
/* FP control regs (not implemented). */
|
677 |
ptr += 3 * 4; |
678 |
} |
679 |
#elif defined (TARGET_MIPS)
|
680 |
static int cpu_gdb_read_registers(CPUState *env, uint8_t *mem_buf) |
681 |
{ |
682 |
int i;
|
683 |
uint8_t *ptr; |
684 |
|
685 |
ptr = mem_buf; |
686 |
for (i = 0; i < 32; i++) |
687 |
{ |
688 |
*(target_ulong *)ptr = tswapl(env->gpr[env->current_tc][i]); |
689 |
ptr += sizeof(target_ulong);
|
690 |
} |
691 |
|
692 |
*(target_ulong *)ptr = (int32_t)tswap32(env->CP0_Status); |
693 |
ptr += sizeof(target_ulong);
|
694 |
|
695 |
*(target_ulong *)ptr = tswapl(env->LO[env->current_tc][0]);
|
696 |
ptr += sizeof(target_ulong);
|
697 |
|
698 |
*(target_ulong *)ptr = tswapl(env->HI[env->current_tc][0]);
|
699 |
ptr += sizeof(target_ulong);
|
700 |
|
701 |
*(target_ulong *)ptr = tswapl(env->CP0_BadVAddr); |
702 |
ptr += sizeof(target_ulong);
|
703 |
|
704 |
*(target_ulong *)ptr = (int32_t)tswap32(env->CP0_Cause); |
705 |
ptr += sizeof(target_ulong);
|
706 |
|
707 |
*(target_ulong *)ptr = tswapl(env->PC[env->current_tc]); |
708 |
ptr += sizeof(target_ulong);
|
709 |
|
710 |
if (env->CP0_Config1 & (1 << CP0C1_FP)) |
711 |
{ |
712 |
for (i = 0; i < 32; i++) |
713 |
{ |
714 |
if (env->CP0_Status & (1 << CP0St_FR)) |
715 |
*(target_ulong *)ptr = tswapl(env->fpu->fpr[i].d); |
716 |
else
|
717 |
*(target_ulong *)ptr = tswap32(env->fpu->fpr[i].w[FP_ENDIAN_IDX]); |
718 |
ptr += sizeof(target_ulong);
|
719 |
} |
720 |
|
721 |
*(target_ulong *)ptr = (int32_t)tswap32(env->fpu->fcr31); |
722 |
ptr += sizeof(target_ulong);
|
723 |
|
724 |
*(target_ulong *)ptr = (int32_t)tswap32(env->fpu->fcr0); |
725 |
ptr += sizeof(target_ulong);
|
726 |
} |
727 |
|
728 |
/* "fp", pseudo frame pointer. Not yet implemented in gdb. */
|
729 |
*(target_ulong *)ptr = 0;
|
730 |
ptr += sizeof(target_ulong);
|
731 |
|
732 |
/* Registers for embedded use, we just pad them. */
|
733 |
for (i = 0; i < 16; i++) |
734 |
{ |
735 |
*(target_ulong *)ptr = 0;
|
736 |
ptr += sizeof(target_ulong);
|
737 |
} |
738 |
|
739 |
/* Processor ID. */
|
740 |
*(target_ulong *)ptr = (int32_t)tswap32(env->CP0_PRid); |
741 |
ptr += sizeof(target_ulong);
|
742 |
|
743 |
return ptr - mem_buf;
|
744 |
} |
745 |
|
746 |
/* convert MIPS rounding mode in FCR31 to IEEE library */
|
747 |
static unsigned int ieee_rm[] = |
748 |
{ |
749 |
float_round_nearest_even, |
750 |
float_round_to_zero, |
751 |
float_round_up, |
752 |
float_round_down |
753 |
}; |
754 |
#define RESTORE_ROUNDING_MODE \
|
755 |
set_float_rounding_mode(ieee_rm[env->fpu->fcr31 & 3], &env->fpu->fp_status)
|
756 |
|
757 |
static void cpu_gdb_write_registers(CPUState *env, uint8_t *mem_buf, int size) |
758 |
{ |
759 |
int i;
|
760 |
uint8_t *ptr; |
761 |
|
762 |
ptr = mem_buf; |
763 |
for (i = 0; i < 32; i++) |
764 |
{ |
765 |
env->gpr[env->current_tc][i] = tswapl(*(target_ulong *)ptr); |
766 |
ptr += sizeof(target_ulong);
|
767 |
} |
768 |
|
769 |
env->CP0_Status = tswapl(*(target_ulong *)ptr); |
770 |
ptr += sizeof(target_ulong);
|
771 |
|
772 |
env->LO[env->current_tc][0] = tswapl(*(target_ulong *)ptr);
|
773 |
ptr += sizeof(target_ulong);
|
774 |
|
775 |
env->HI[env->current_tc][0] = tswapl(*(target_ulong *)ptr);
|
776 |
ptr += sizeof(target_ulong);
|
777 |
|
778 |
env->CP0_BadVAddr = tswapl(*(target_ulong *)ptr); |
779 |
ptr += sizeof(target_ulong);
|
780 |
|
781 |
env->CP0_Cause = tswapl(*(target_ulong *)ptr); |
782 |
ptr += sizeof(target_ulong);
|
783 |
|
784 |
env->PC[env->current_tc] = tswapl(*(target_ulong *)ptr); |
785 |
ptr += sizeof(target_ulong);
|
786 |
|
787 |
if (env->CP0_Config1 & (1 << CP0C1_FP)) |
788 |
{ |
789 |
for (i = 0; i < 32; i++) |
790 |
{ |
791 |
if (env->CP0_Status & (1 << CP0St_FR)) |
792 |
env->fpu->fpr[i].d = tswapl(*(target_ulong *)ptr); |
793 |
else
|
794 |
env->fpu->fpr[i].w[FP_ENDIAN_IDX] = tswapl(*(target_ulong *)ptr); |
795 |
ptr += sizeof(target_ulong);
|
796 |
} |
797 |
|
798 |
env->fpu->fcr31 = tswapl(*(target_ulong *)ptr) & 0xFF83FFFF;
|
799 |
ptr += sizeof(target_ulong);
|
800 |
|
801 |
/* The remaining registers are assumed to be read-only. */
|
802 |
|
803 |
/* set rounding mode */
|
804 |
RESTORE_ROUNDING_MODE; |
805 |
|
806 |
#ifndef CONFIG_SOFTFLOAT
|
807 |
/* no floating point exception for native float */
|
808 |
SET_FP_ENABLE(env->fcr31, 0);
|
809 |
#endif
|
810 |
} |
811 |
} |
812 |
#elif defined (TARGET_SH4)
|
813 |
|
814 |
/* Hint: Use "set architecture sh4" in GDB to see fpu registers */
|
815 |
|
816 |
static int cpu_gdb_read_registers(CPUState *env, uint8_t *mem_buf) |
817 |
{ |
818 |
uint32_t *ptr = (uint32_t *)mem_buf; |
819 |
int i;
|
820 |
|
821 |
#define SAVE(x) *ptr++=tswapl(x)
|
822 |
if ((env->sr & (SR_MD | SR_RB)) == (SR_MD | SR_RB)) {
|
823 |
for (i = 0; i < 8; i++) SAVE(env->gregs[i + 16]); |
824 |
} else {
|
825 |
for (i = 0; i < 8; i++) SAVE(env->gregs[i]); |
826 |
} |
827 |
for (i = 8; i < 16; i++) SAVE(env->gregs[i]); |
828 |
SAVE (env->pc); |
829 |
SAVE (env->pr); |
830 |
SAVE (env->gbr); |
831 |
SAVE (env->vbr); |
832 |
SAVE (env->mach); |
833 |
SAVE (env->macl); |
834 |
SAVE (env->sr); |
835 |
SAVE (env->fpul); |
836 |
SAVE (env->fpscr); |
837 |
for (i = 0; i < 16; i++) |
838 |
SAVE(env->fregs[i + ((env->fpscr & FPSCR_FR) ? 16 : 0)]); |
839 |
SAVE (env->ssr); |
840 |
SAVE (env->spc); |
841 |
for (i = 0; i < 8; i++) SAVE(env->gregs[i]); |
842 |
for (i = 0; i < 8; i++) SAVE(env->gregs[i + 16]); |
843 |
return ((uint8_t *)ptr - mem_buf);
|
844 |
} |
845 |
|
846 |
static void cpu_gdb_write_registers(CPUState *env, uint8_t *mem_buf, int size) |
847 |
{ |
848 |
uint32_t *ptr = (uint32_t *)mem_buf; |
849 |
int i;
|
850 |
|
851 |
#define LOAD(x) (x)=*ptr++;
|
852 |
if ((env->sr & (SR_MD | SR_RB)) == (SR_MD | SR_RB)) {
|
853 |
for (i = 0; i < 8; i++) LOAD(env->gregs[i + 16]); |
854 |
} else {
|
855 |
for (i = 0; i < 8; i++) LOAD(env->gregs[i]); |
856 |
} |
857 |
for (i = 8; i < 16; i++) LOAD(env->gregs[i]); |
858 |
LOAD (env->pc); |
859 |
LOAD (env->pr); |
860 |
LOAD (env->gbr); |
861 |
LOAD (env->vbr); |
862 |
LOAD (env->mach); |
863 |
LOAD (env->macl); |
864 |
LOAD (env->sr); |
865 |
LOAD (env->fpul); |
866 |
LOAD (env->fpscr); |
867 |
for (i = 0; i < 16; i++) |
868 |
LOAD(env->fregs[i + ((env->fpscr & FPSCR_FR) ? 16 : 0)]); |
869 |
LOAD (env->ssr); |
870 |
LOAD (env->spc); |
871 |
for (i = 0; i < 8; i++) LOAD(env->gregs[i]); |
872 |
for (i = 0; i < 8; i++) LOAD(env->gregs[i + 16]); |
873 |
} |
874 |
#elif defined (TARGET_CRIS)
|
875 |
|
876 |
static int cris_save_32 (unsigned char *d, uint32_t value) |
877 |
{ |
878 |
*d++ = (value); |
879 |
*d++ = (value >>= 8);
|
880 |
*d++ = (value >>= 8);
|
881 |
*d++ = (value >>= 8);
|
882 |
return 4; |
883 |
} |
884 |
static int cris_save_16 (unsigned char *d, uint32_t value) |
885 |
{ |
886 |
*d++ = (value); |
887 |
*d++ = (value >>= 8);
|
888 |
return 2; |
889 |
} |
890 |
static int cris_save_8 (unsigned char *d, uint32_t value) |
891 |
{ |
892 |
*d++ = (value); |
893 |
return 1; |
894 |
} |
895 |
|
896 |
/* FIXME: this will bug on archs not supporting unaligned word accesses. */
|
897 |
static int cpu_gdb_read_registers(CPUState *env, uint8_t *mem_buf) |
898 |
{ |
899 |
uint8_t *ptr = mem_buf; |
900 |
uint8_t srs; |
901 |
int i;
|
902 |
|
903 |
for (i = 0; i < 16; i++) |
904 |
ptr += cris_save_32 (ptr, env->regs[i]); |
905 |
|
906 |
srs = env->pregs[PR_SRS]; |
907 |
|
908 |
ptr += cris_save_8 (ptr, env->pregs[0]);
|
909 |
ptr += cris_save_8 (ptr, env->pregs[1]);
|
910 |
ptr += cris_save_32 (ptr, env->pregs[2]);
|
911 |
ptr += cris_save_8 (ptr, srs); |
912 |
ptr += cris_save_16 (ptr, env->pregs[4]);
|
913 |
|
914 |
for (i = 5; i < 16; i++) |
915 |
ptr += cris_save_32 (ptr, env->pregs[i]); |
916 |
|
917 |
ptr += cris_save_32 (ptr, env->pc); |
918 |
|
919 |
for (i = 0; i < 16; i++) |
920 |
ptr += cris_save_32 (ptr, env->sregs[srs][i]); |
921 |
|
922 |
return ((uint8_t *)ptr - mem_buf);
|
923 |
} |
924 |
|
925 |
static void cpu_gdb_write_registers(CPUState *env, uint8_t *mem_buf, int size) |
926 |
{ |
927 |
uint32_t *ptr = (uint32_t *)mem_buf; |
928 |
int i;
|
929 |
|
930 |
#define LOAD(x) (x)=*ptr++;
|
931 |
for (i = 0; i < 16; i++) LOAD(env->regs[i]); |
932 |
LOAD (env->pc); |
933 |
} |
934 |
#else
|
935 |
static int cpu_gdb_read_registers(CPUState *env, uint8_t *mem_buf) |
936 |
{ |
937 |
return 0; |
938 |
} |
939 |
|
940 |
static void cpu_gdb_write_registers(CPUState *env, uint8_t *mem_buf, int size) |
941 |
{ |
942 |
} |
943 |
|
944 |
#endif
|
945 |
|
946 |
static int gdb_handle_packet(GDBState *s, CPUState *env, const char *line_buf) |
947 |
{ |
948 |
const char *p; |
949 |
int ch, reg_size, type;
|
950 |
char buf[4096]; |
951 |
uint8_t mem_buf[4096];
|
952 |
uint32_t *registers; |
953 |
target_ulong addr, len; |
954 |
|
955 |
#ifdef DEBUG_GDB
|
956 |
printf("command='%s'\n", line_buf);
|
957 |
#endif
|
958 |
p = line_buf; |
959 |
ch = *p++; |
960 |
switch(ch) {
|
961 |
case '?': |
962 |
/* TODO: Make this return the correct value for user-mode. */
|
963 |
snprintf(buf, sizeof(buf), "S%02x", SIGTRAP); |
964 |
put_packet(s, buf); |
965 |
break;
|
966 |
case 'c': |
967 |
if (*p != '\0') { |
968 |
addr = strtoull(p, (char **)&p, 16); |
969 |
#if defined(TARGET_I386)
|
970 |
env->eip = addr; |
971 |
#elif defined (TARGET_PPC)
|
972 |
env->nip = addr; |
973 |
#elif defined (TARGET_SPARC)
|
974 |
env->pc = addr; |
975 |
env->npc = addr + 4;
|
976 |
#elif defined (TARGET_ARM)
|
977 |
env->regs[15] = addr;
|
978 |
#elif defined (TARGET_SH4)
|
979 |
env->pc = addr; |
980 |
#elif defined (TARGET_MIPS)
|
981 |
env->PC[env->current_tc] = addr; |
982 |
#elif defined (TARGET_CRIS)
|
983 |
env->pc = addr; |
984 |
#endif
|
985 |
} |
986 |
gdb_continue(s); |
987 |
return RS_IDLE;
|
988 |
case 's': |
989 |
if (*p != '\0') { |
990 |
addr = strtoull(p, (char **)&p, 16); |
991 |
#if defined(TARGET_I386)
|
992 |
env->eip = addr; |
993 |
#elif defined (TARGET_PPC)
|
994 |
env->nip = addr; |
995 |
#elif defined (TARGET_SPARC)
|
996 |
env->pc = addr; |
997 |
env->npc = addr + 4;
|
998 |
#elif defined (TARGET_ARM)
|
999 |
env->regs[15] = addr;
|
1000 |
#elif defined (TARGET_SH4)
|
1001 |
env->pc = addr; |
1002 |
#elif defined (TARGET_MIPS)
|
1003 |
env->PC[env->current_tc] = addr; |
1004 |
#elif defined (TARGET_CRIS)
|
1005 |
env->pc = addr; |
1006 |
#endif
|
1007 |
} |
1008 |
cpu_single_step(env, sstep_flags); |
1009 |
gdb_continue(s); |
1010 |
return RS_IDLE;
|
1011 |
case 'F': |
1012 |
{ |
1013 |
target_ulong ret; |
1014 |
target_ulong err; |
1015 |
|
1016 |
ret = strtoull(p, (char **)&p, 16); |
1017 |
if (*p == ',') { |
1018 |
p++; |
1019 |
err = strtoull(p, (char **)&p, 16); |
1020 |
} else {
|
1021 |
err = 0;
|
1022 |
} |
1023 |
if (*p == ',') |
1024 |
p++; |
1025 |
type = *p; |
1026 |
if (gdb_current_syscall_cb)
|
1027 |
gdb_current_syscall_cb(s->env, ret, err); |
1028 |
if (type == 'C') { |
1029 |
put_packet(s, "T02");
|
1030 |
} else {
|
1031 |
gdb_continue(s); |
1032 |
} |
1033 |
} |
1034 |
break;
|
1035 |
case 'g': |
1036 |
reg_size = cpu_gdb_read_registers(env, mem_buf); |
1037 |
memtohex(buf, mem_buf, reg_size); |
1038 |
put_packet(s, buf); |
1039 |
break;
|
1040 |
case 'G': |
1041 |
registers = (void *)mem_buf;
|
1042 |
len = strlen(p) / 2;
|
1043 |
hextomem((uint8_t *)registers, p, len); |
1044 |
cpu_gdb_write_registers(env, mem_buf, len); |
1045 |
put_packet(s, "OK");
|
1046 |
break;
|
1047 |
case 'm': |
1048 |
addr = strtoull(p, (char **)&p, 16); |
1049 |
if (*p == ',') |
1050 |
p++; |
1051 |
len = strtoull(p, NULL, 16); |
1052 |
if (cpu_memory_rw_debug(env, addr, mem_buf, len, 0) != 0) { |
1053 |
put_packet (s, "E14");
|
1054 |
} else {
|
1055 |
memtohex(buf, mem_buf, len); |
1056 |
put_packet(s, buf); |
1057 |
} |
1058 |
break;
|
1059 |
case 'M': |
1060 |
addr = strtoull(p, (char **)&p, 16); |
1061 |
if (*p == ',') |
1062 |
p++; |
1063 |
len = strtoull(p, (char **)&p, 16); |
1064 |
if (*p == ':') |
1065 |
p++; |
1066 |
hextomem(mem_buf, p, len); |
1067 |
if (cpu_memory_rw_debug(env, addr, mem_buf, len, 1) != 0) |
1068 |
put_packet(s, "E14");
|
1069 |
else
|
1070 |
put_packet(s, "OK");
|
1071 |
break;
|
1072 |
case 'Z': |
1073 |
type = strtoul(p, (char **)&p, 16); |
1074 |
if (*p == ',') |
1075 |
p++; |
1076 |
addr = strtoull(p, (char **)&p, 16); |
1077 |
if (*p == ',') |
1078 |
p++; |
1079 |
len = strtoull(p, (char **)&p, 16); |
1080 |
if (type == 0 || type == 1) { |
1081 |
if (cpu_breakpoint_insert(env, addr) < 0) |
1082 |
goto breakpoint_error;
|
1083 |
put_packet(s, "OK");
|
1084 |
#ifndef CONFIG_USER_ONLY
|
1085 |
} else if (type == 2) { |
1086 |
if (cpu_watchpoint_insert(env, addr) < 0) |
1087 |
goto breakpoint_error;
|
1088 |
put_packet(s, "OK");
|
1089 |
#endif
|
1090 |
} else {
|
1091 |
breakpoint_error:
|
1092 |
put_packet(s, "E22");
|
1093 |
} |
1094 |
break;
|
1095 |
case 'z': |
1096 |
type = strtoul(p, (char **)&p, 16); |
1097 |
if (*p == ',') |
1098 |
p++; |
1099 |
addr = strtoull(p, (char **)&p, 16); |
1100 |
if (*p == ',') |
1101 |
p++; |
1102 |
len = strtoull(p, (char **)&p, 16); |
1103 |
if (type == 0 || type == 1) { |
1104 |
cpu_breakpoint_remove(env, addr); |
1105 |
put_packet(s, "OK");
|
1106 |
#ifndef CONFIG_USER_ONLY
|
1107 |
} else if (type == 2) { |
1108 |
cpu_watchpoint_remove(env, addr); |
1109 |
put_packet(s, "OK");
|
1110 |
#endif
|
1111 |
} else {
|
1112 |
goto breakpoint_error;
|
1113 |
} |
1114 |
break;
|
1115 |
case 'q': |
1116 |
case 'Q': |
1117 |
/* parse any 'q' packets here */
|
1118 |
if (!strcmp(p,"qemu.sstepbits")) { |
1119 |
/* Query Breakpoint bit definitions */
|
1120 |
sprintf(buf,"ENABLE=%x,NOIRQ=%x,NOTIMER=%x",
|
1121 |
SSTEP_ENABLE, |
1122 |
SSTEP_NOIRQ, |
1123 |
SSTEP_NOTIMER); |
1124 |
put_packet(s, buf); |
1125 |
break;
|
1126 |
} else if (strncmp(p,"qemu.sstep",10) == 0) { |
1127 |
/* Display or change the sstep_flags */
|
1128 |
p += 10;
|
1129 |
if (*p != '=') { |
1130 |
/* Display current setting */
|
1131 |
sprintf(buf,"0x%x", sstep_flags);
|
1132 |
put_packet(s, buf); |
1133 |
break;
|
1134 |
} |
1135 |
p++; |
1136 |
type = strtoul(p, (char **)&p, 16); |
1137 |
sstep_flags = type; |
1138 |
put_packet(s, "OK");
|
1139 |
break;
|
1140 |
} |
1141 |
#ifdef CONFIG_LINUX_USER
|
1142 |
else if (strncmp(p, "Offsets", 7) == 0) { |
1143 |
TaskState *ts = env->opaque; |
1144 |
|
1145 |
sprintf(buf, |
1146 |
"Text=" TARGET_ABI_FMT_lx ";Data=" TARGET_ABI_FMT_lx |
1147 |
";Bss=" TARGET_ABI_FMT_lx,
|
1148 |
ts->info->code_offset, |
1149 |
ts->info->data_offset, |
1150 |
ts->info->data_offset); |
1151 |
put_packet(s, buf); |
1152 |
break;
|
1153 |
} |
1154 |
#endif
|
1155 |
/* Fall through. */
|
1156 |
default:
|
1157 |
/* put empty packet */
|
1158 |
buf[0] = '\0'; |
1159 |
put_packet(s, buf); |
1160 |
break;
|
1161 |
} |
1162 |
return RS_IDLE;
|
1163 |
} |
1164 |
|
1165 |
extern void tb_flush(CPUState *env); |
1166 |
|
1167 |
#ifndef CONFIG_USER_ONLY
|
1168 |
static void gdb_vm_stopped(void *opaque, int reason) |
1169 |
{ |
1170 |
GDBState *s = opaque; |
1171 |
char buf[256]; |
1172 |
int ret;
|
1173 |
|
1174 |
if (s->state == RS_SYSCALL)
|
1175 |
return;
|
1176 |
|
1177 |
/* disable single step if it was enable */
|
1178 |
cpu_single_step(s->env, 0);
|
1179 |
|
1180 |
if (reason == EXCP_DEBUG) {
|
1181 |
if (s->env->watchpoint_hit) {
|
1182 |
snprintf(buf, sizeof(buf), "T%02xwatch:" TARGET_FMT_lx ";", |
1183 |
SIGTRAP, |
1184 |
s->env->watchpoint[s->env->watchpoint_hit - 1].vaddr);
|
1185 |
put_packet(s, buf); |
1186 |
s->env->watchpoint_hit = 0;
|
1187 |
return;
|
1188 |
} |
1189 |
tb_flush(s->env); |
1190 |
ret = SIGTRAP; |
1191 |
} else if (reason == EXCP_INTERRUPT) { |
1192 |
ret = SIGINT; |
1193 |
} else {
|
1194 |
ret = 0;
|
1195 |
} |
1196 |
snprintf(buf, sizeof(buf), "S%02x", ret); |
1197 |
put_packet(s, buf); |
1198 |
} |
1199 |
#endif
|
1200 |
|
1201 |
/* Send a gdb syscall request.
|
1202 |
This accepts limited printf-style format specifiers, specifically:
|
1203 |
%x - target_ulong argument printed in hex.
|
1204 |
%lx - 64-bit argument printed in hex.
|
1205 |
%s - string pointer (target_ulong) and length (int) pair. */
|
1206 |
void gdb_do_syscall(gdb_syscall_complete_cb cb, char *fmt, ...) |
1207 |
{ |
1208 |
va_list va; |
1209 |
char buf[256]; |
1210 |
char *p;
|
1211 |
target_ulong addr; |
1212 |
uint64_t i64; |
1213 |
GDBState *s; |
1214 |
|
1215 |
s = gdb_syscall_state; |
1216 |
if (!s)
|
1217 |
return;
|
1218 |
gdb_current_syscall_cb = cb; |
1219 |
s->state = RS_SYSCALL; |
1220 |
#ifndef CONFIG_USER_ONLY
|
1221 |
vm_stop(EXCP_DEBUG); |
1222 |
#endif
|
1223 |
s->state = RS_IDLE; |
1224 |
va_start(va, fmt); |
1225 |
p = buf; |
1226 |
*(p++) = 'F';
|
1227 |
while (*fmt) {
|
1228 |
if (*fmt == '%') { |
1229 |
fmt++; |
1230 |
switch (*fmt++) {
|
1231 |
case 'x': |
1232 |
addr = va_arg(va, target_ulong); |
1233 |
p += sprintf(p, TARGET_FMT_lx, addr); |
1234 |
break;
|
1235 |
case 'l': |
1236 |
if (*(fmt++) != 'x') |
1237 |
goto bad_format;
|
1238 |
i64 = va_arg(va, uint64_t); |
1239 |
p += sprintf(p, "%" PRIx64, i64);
|
1240 |
break;
|
1241 |
case 's': |
1242 |
addr = va_arg(va, target_ulong); |
1243 |
p += sprintf(p, TARGET_FMT_lx "/%x", addr, va_arg(va, int)); |
1244 |
break;
|
1245 |
default:
|
1246 |
bad_format:
|
1247 |
fprintf(stderr, "gdbstub: Bad syscall format string '%s'\n",
|
1248 |
fmt - 1);
|
1249 |
break;
|
1250 |
} |
1251 |
} else {
|
1252 |
*(p++) = *(fmt++); |
1253 |
} |
1254 |
} |
1255 |
*p = 0;
|
1256 |
va_end(va); |
1257 |
put_packet(s, buf); |
1258 |
#ifdef CONFIG_USER_ONLY
|
1259 |
gdb_handlesig(s->env, 0);
|
1260 |
#else
|
1261 |
cpu_interrupt(s->env, CPU_INTERRUPT_EXIT); |
1262 |
#endif
|
1263 |
} |
1264 |
|
1265 |
static void gdb_read_byte(GDBState *s, int ch) |
1266 |
{ |
1267 |
CPUState *env = s->env; |
1268 |
int i, csum;
|
1269 |
uint8_t reply; |
1270 |
|
1271 |
#ifndef CONFIG_USER_ONLY
|
1272 |
if (s->last_packet_len) {
|
1273 |
/* Waiting for a response to the last packet. If we see the start
|
1274 |
of a new command then abandon the previous response. */
|
1275 |
if (ch == '-') { |
1276 |
#ifdef DEBUG_GDB
|
1277 |
printf("Got NACK, retransmitting\n");
|
1278 |
#endif
|
1279 |
put_buffer(s, (uint8_t *)s->last_packet, s->last_packet_len); |
1280 |
} |
1281 |
#ifdef DEBUG_GDB
|
1282 |
else if (ch == '+') |
1283 |
printf("Got ACK\n");
|
1284 |
else
|
1285 |
printf("Got '%c' when expecting ACK/NACK\n", ch);
|
1286 |
#endif
|
1287 |
if (ch == '+' || ch == '$') |
1288 |
s->last_packet_len = 0;
|
1289 |
if (ch != '$') |
1290 |
return;
|
1291 |
} |
1292 |
if (vm_running) {
|
1293 |
/* when the CPU is running, we cannot do anything except stop
|
1294 |
it when receiving a char */
|
1295 |
vm_stop(EXCP_INTERRUPT); |
1296 |
} else
|
1297 |
#endif
|
1298 |
{ |
1299 |
switch(s->state) {
|
1300 |
case RS_IDLE:
|
1301 |
if (ch == '$') { |
1302 |
s->line_buf_index = 0;
|
1303 |
s->state = RS_GETLINE; |
1304 |
} |
1305 |
break;
|
1306 |
case RS_GETLINE:
|
1307 |
if (ch == '#') { |
1308 |
s->state = RS_CHKSUM1; |
1309 |
} else if (s->line_buf_index >= sizeof(s->line_buf) - 1) { |
1310 |
s->state = RS_IDLE; |
1311 |
} else {
|
1312 |
s->line_buf[s->line_buf_index++] = ch; |
1313 |
} |
1314 |
break;
|
1315 |
case RS_CHKSUM1:
|
1316 |
s->line_buf[s->line_buf_index] = '\0';
|
1317 |
s->line_csum = fromhex(ch) << 4;
|
1318 |
s->state = RS_CHKSUM2; |
1319 |
break;
|
1320 |
case RS_CHKSUM2:
|
1321 |
s->line_csum |= fromhex(ch); |
1322 |
csum = 0;
|
1323 |
for(i = 0; i < s->line_buf_index; i++) { |
1324 |
csum += s->line_buf[i]; |
1325 |
} |
1326 |
if (s->line_csum != (csum & 0xff)) { |
1327 |
reply = '-';
|
1328 |
put_buffer(s, &reply, 1);
|
1329 |
s->state = RS_IDLE; |
1330 |
} else {
|
1331 |
reply = '+';
|
1332 |
put_buffer(s, &reply, 1);
|
1333 |
s->state = gdb_handle_packet(s, env, s->line_buf); |
1334 |
} |
1335 |
break;
|
1336 |
default:
|
1337 |
abort(); |
1338 |
} |
1339 |
} |
1340 |
} |
1341 |
|
1342 |
#ifdef CONFIG_USER_ONLY
|
1343 |
int
|
1344 |
gdb_handlesig (CPUState *env, int sig)
|
1345 |
{ |
1346 |
GDBState *s; |
1347 |
char buf[256]; |
1348 |
int n;
|
1349 |
|
1350 |
if (gdbserver_fd < 0) |
1351 |
return sig;
|
1352 |
|
1353 |
s = &gdbserver_state; |
1354 |
|
1355 |
/* disable single step if it was enabled */
|
1356 |
cpu_single_step(env, 0);
|
1357 |
tb_flush(env); |
1358 |
|
1359 |
if (sig != 0) |
1360 |
{ |
1361 |
snprintf(buf, sizeof(buf), "S%02x", sig); |
1362 |
put_packet(s, buf); |
1363 |
} |
1364 |
|
1365 |
sig = 0;
|
1366 |
s->state = RS_IDLE; |
1367 |
s->running_state = 0;
|
1368 |
while (s->running_state == 0) { |
1369 |
n = read (s->fd, buf, 256);
|
1370 |
if (n > 0) |
1371 |
{ |
1372 |
int i;
|
1373 |
|
1374 |
for (i = 0; i < n; i++) |
1375 |
gdb_read_byte (s, buf[i]); |
1376 |
} |
1377 |
else if (n == 0 || errno != EAGAIN) |
1378 |
{ |
1379 |
/* XXX: Connection closed. Should probably wait for annother
|
1380 |
connection before continuing. */
|
1381 |
return sig;
|
1382 |
} |
1383 |
} |
1384 |
return sig;
|
1385 |
} |
1386 |
|
1387 |
/* Tell the remote gdb that the process has exited. */
|
1388 |
void gdb_exit(CPUState *env, int code) |
1389 |
{ |
1390 |
GDBState *s; |
1391 |
char buf[4]; |
1392 |
|
1393 |
if (gdbserver_fd < 0) |
1394 |
return;
|
1395 |
|
1396 |
s = &gdbserver_state; |
1397 |
|
1398 |
snprintf(buf, sizeof(buf), "W%02x", code); |
1399 |
put_packet(s, buf); |
1400 |
} |
1401 |
|
1402 |
|
1403 |
static void gdb_accept(void *opaque) |
1404 |
{ |
1405 |
GDBState *s; |
1406 |
struct sockaddr_in sockaddr;
|
1407 |
socklen_t len; |
1408 |
int val, fd;
|
1409 |
|
1410 |
for(;;) {
|
1411 |
len = sizeof(sockaddr);
|
1412 |
fd = accept(gdbserver_fd, (struct sockaddr *)&sockaddr, &len);
|
1413 |
if (fd < 0 && errno != EINTR) { |
1414 |
perror("accept");
|
1415 |
return;
|
1416 |
} else if (fd >= 0) { |
1417 |
break;
|
1418 |
} |
1419 |
} |
1420 |
|
1421 |
/* set short latency */
|
1422 |
val = 1;
|
1423 |
setsockopt(fd, IPPROTO_TCP, TCP_NODELAY, (char *)&val, sizeof(val)); |
1424 |
|
1425 |
s = &gdbserver_state; |
1426 |
memset (s, 0, sizeof (GDBState)); |
1427 |
s->env = first_cpu; /* XXX: allow to change CPU */
|
1428 |
s->fd = fd; |
1429 |
|
1430 |
gdb_syscall_state = s; |
1431 |
|
1432 |
fcntl(fd, F_SETFL, O_NONBLOCK); |
1433 |
} |
1434 |
|
1435 |
static int gdbserver_open(int port) |
1436 |
{ |
1437 |
struct sockaddr_in sockaddr;
|
1438 |
int fd, val, ret;
|
1439 |
|
1440 |
fd = socket(PF_INET, SOCK_STREAM, 0);
|
1441 |
if (fd < 0) { |
1442 |
perror("socket");
|
1443 |
return -1; |
1444 |
} |
1445 |
|
1446 |
/* allow fast reuse */
|
1447 |
val = 1;
|
1448 |
setsockopt(fd, SOL_SOCKET, SO_REUSEADDR, (char *)&val, sizeof(val)); |
1449 |
|
1450 |
sockaddr.sin_family = AF_INET; |
1451 |
sockaddr.sin_port = htons(port); |
1452 |
sockaddr.sin_addr.s_addr = 0;
|
1453 |
ret = bind(fd, (struct sockaddr *)&sockaddr, sizeof(sockaddr)); |
1454 |
if (ret < 0) { |
1455 |
perror("bind");
|
1456 |
return -1; |
1457 |
} |
1458 |
ret = listen(fd, 0);
|
1459 |
if (ret < 0) { |
1460 |
perror("listen");
|
1461 |
return -1; |
1462 |
} |
1463 |
return fd;
|
1464 |
} |
1465 |
|
1466 |
int gdbserver_start(int port) |
1467 |
{ |
1468 |
gdbserver_fd = gdbserver_open(port); |
1469 |
if (gdbserver_fd < 0) |
1470 |
return -1; |
1471 |
/* accept connections */
|
1472 |
gdb_accept (NULL);
|
1473 |
return 0; |
1474 |
} |
1475 |
#else
|
1476 |
static int gdb_chr_can_receive(void *opaque) |
1477 |
{ |
1478 |
return 1; |
1479 |
} |
1480 |
|
1481 |
static void gdb_chr_receive(void *opaque, const uint8_t *buf, int size) |
1482 |
{ |
1483 |
GDBState *s = opaque; |
1484 |
int i;
|
1485 |
|
1486 |
for (i = 0; i < size; i++) { |
1487 |
gdb_read_byte(s, buf[i]); |
1488 |
} |
1489 |
} |
1490 |
|
1491 |
static void gdb_chr_event(void *opaque, int event) |
1492 |
{ |
1493 |
switch (event) {
|
1494 |
case CHR_EVENT_RESET:
|
1495 |
vm_stop(EXCP_INTERRUPT); |
1496 |
gdb_syscall_state = opaque; |
1497 |
break;
|
1498 |
default:
|
1499 |
break;
|
1500 |
} |
1501 |
} |
1502 |
|
1503 |
int gdbserver_start(const char *port) |
1504 |
{ |
1505 |
GDBState *s; |
1506 |
char gdbstub_port_name[128]; |
1507 |
int port_num;
|
1508 |
char *p;
|
1509 |
CharDriverState *chr; |
1510 |
|
1511 |
if (!port || !*port)
|
1512 |
return -1; |
1513 |
|
1514 |
port_num = strtol(port, &p, 10);
|
1515 |
if (*p == 0) { |
1516 |
/* A numeric value is interpreted as a port number. */
|
1517 |
snprintf(gdbstub_port_name, sizeof(gdbstub_port_name),
|
1518 |
"tcp::%d,nowait,nodelay,server", port_num);
|
1519 |
port = gdbstub_port_name; |
1520 |
} |
1521 |
|
1522 |
chr = qemu_chr_open(port); |
1523 |
if (!chr)
|
1524 |
return -1; |
1525 |
|
1526 |
s = qemu_mallocz(sizeof(GDBState));
|
1527 |
if (!s) {
|
1528 |
return -1; |
1529 |
} |
1530 |
s->env = first_cpu; /* XXX: allow to change CPU */
|
1531 |
s->chr = chr; |
1532 |
qemu_chr_add_handlers(chr, gdb_chr_can_receive, gdb_chr_receive, |
1533 |
gdb_chr_event, s); |
1534 |
qemu_add_vm_stop_handler(gdb_vm_stopped, s); |
1535 |
return 0; |
1536 |
} |
1537 |
#endif
|