Revision 7997d92f target-arm/translate.c
b/target-arm/translate.c | ||
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5813 | 5813 |
/* Coprocessor double register transfer. */ |
5814 | 5814 |
} else if ((insn & 0x0f000010) == 0x0e000010) { |
5815 | 5815 |
/* Additional coprocessor register transfer. */ |
5816 |
} else if ((insn & 0x0ff10010) == 0x01000000) {
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|
5816 |
} else if ((insn & 0x0ff10020) == 0x01000000) {
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5817 | 5817 |
uint32_t mask; |
5818 | 5818 |
uint32_t val; |
5819 | 5819 |
/* cps (privileged) */ |
... | ... | |
5830 | 5830 |
if (insn & (1 << 18)) |
5831 | 5831 |
val |= mask; |
5832 | 5832 |
} |
5833 |
if (insn & (1 << 14)) {
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|
5833 |
if (insn & (1 << 17)) {
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|
5834 | 5834 |
mask |= CPSR_M; |
5835 | 5835 |
val |= (insn & 0x1f); |
5836 | 5836 |
} |
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