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/*
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* MIPS emulation micro-operations for qemu.
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*
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* Copyright (c) 2004-2005 Jocelyn Mayer
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*
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* This library is free software; you can redistribute it and/or
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* modify it under the terms of the GNU Lesser General Public
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* License as published by the Free Software Foundation; either
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* version 2 of the License, or (at your option) any later version.
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*
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* This library is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
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* Lesser General Public License for more details.
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*
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* You should have received a copy of the GNU Lesser General Public
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* License along with this library; if not, write to the Free Software
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* Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
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*/
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#include "config.h" |
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#include "exec.h" |
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#define REG 1 |
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#include "op_template.c" |
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#undef REG
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#define REG 2 |
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#include "op_template.c" |
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#undef REG
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#define REG 3 |
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#include "op_template.c" |
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#undef REG
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#define REG 4 |
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#include "op_template.c" |
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#undef REG
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#define REG 5 |
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#include "op_template.c" |
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#undef REG
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#define REG 6 |
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#include "op_template.c" |
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#undef REG
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#define REG 7 |
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#include "op_template.c" |
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#undef REG
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#define REG 8 |
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#include "op_template.c" |
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#undef REG
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#define REG 9 |
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#include "op_template.c" |
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#undef REG
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#define REG 10 |
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#include "op_template.c" |
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#undef REG
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#define REG 11 |
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#include "op_template.c" |
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#undef REG
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#define REG 12 |
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#include "op_template.c" |
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#undef REG
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#define REG 13 |
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#include "op_template.c" |
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#undef REG
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#define REG 14 |
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#include "op_template.c" |
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#undef REG
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#define REG 15 |
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#include "op_template.c" |
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#undef REG
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#define REG 16 |
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#include "op_template.c" |
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#undef REG
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#define REG 17 |
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#include "op_template.c" |
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#undef REG
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#define REG 18 |
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#include "op_template.c" |
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#undef REG
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#define REG 19 |
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#include "op_template.c" |
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#undef REG
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#define REG 20 |
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#include "op_template.c" |
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#undef REG
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#define REG 21 |
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#include "op_template.c" |
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#undef REG
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#define REG 22 |
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#include "op_template.c" |
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#undef REG
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#define REG 23 |
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#include "op_template.c" |
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#undef REG
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#define REG 24 |
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#include "op_template.c" |
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#undef REG
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#define REG 25 |
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#include "op_template.c" |
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#undef REG
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#define REG 26 |
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#include "op_template.c" |
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#undef REG
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#define REG 27 |
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#include "op_template.c" |
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#undef REG
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#define REG 28 |
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#include "op_template.c" |
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#undef REG
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#define REG 29 |
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#include "op_template.c" |
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#undef REG
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#define REG 30 |
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#include "op_template.c" |
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#undef REG
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#define REG 31 |
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#include "op_template.c" |
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#undef REG
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#define TN T0
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#include "op_template.c" |
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#undef TN
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#define TN T1
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#include "op_template.c" |
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#undef TN
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#define TN T2
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#include "op_template.c" |
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#undef TN
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void op_dup_T0 (void) |
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{ |
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T2 = T0; |
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RETURN(); |
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} |
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void op_load_HI (void) |
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{ |
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T0 = env->HI; |
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RETURN(); |
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} |
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void op_store_HI (void) |
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{ |
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env->HI = T0; |
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RETURN(); |
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} |
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void op_load_LO (void) |
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{ |
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T0 = env->LO; |
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RETURN(); |
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} |
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void op_store_LO (void) |
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{ |
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env->LO = T0; |
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RETURN(); |
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} |
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/* Load and store */
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#define MEMSUFFIX _raw
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#include "op_mem.c" |
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#undef MEMSUFFIX
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#if !defined(CONFIG_USER_ONLY)
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#define MEMSUFFIX _user
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#include "op_mem.c" |
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#undef MEMSUFFIX
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#define MEMSUFFIX _kernel
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#include "op_mem.c" |
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#undef MEMSUFFIX
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#endif
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/* Arithmetic */
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void op_add (void) |
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{ |
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T0 += T1; |
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RETURN(); |
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} |
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void op_addo (void) |
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{ |
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target_ulong tmp; |
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tmp = T0; |
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T0 += T1; |
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if ((T0 >> 31) ^ (T1 >> 31) ^ (tmp >> 31)) { |
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CALL_FROM_TB1(do_raise_exception, EXCP_OVERFLOW); |
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} |
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RETURN(); |
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} |
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void op_sub (void) |
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{ |
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T0 -= T1; |
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RETURN(); |
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} |
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void op_subo (void) |
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{ |
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target_ulong tmp; |
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tmp = T0; |
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T0 = (int32_t)T0 - (int32_t)T1; |
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if (!((T0 >> 31) ^ (T1 >> 31) ^ (tmp >> 31))) { |
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CALL_FROM_TB1(do_raise_exception, EXCP_OVERFLOW); |
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} |
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RETURN(); |
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} |
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void op_mul (void) |
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{ |
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T0 = (int32_t)T0 * (int32_t)T1; |
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RETURN(); |
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} |
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void op_div (void) |
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{ |
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if (T1 != 0) { |
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env->LO = (int32_t)T0 / (int32_t)T1; |
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env->HI = (int32_t)T0 % (int32_t)T1; |
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} |
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RETURN(); |
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} |
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void op_divu (void) |
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{ |
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if (T1 != 0) { |
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env->LO = T0 / T1; |
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env->HI = T0 % T1; |
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} |
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RETURN(); |
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} |
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/* Logical */
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void op_and (void) |
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{ |
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T0 &= T1; |
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RETURN(); |
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} |
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void op_nor (void) |
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{ |
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T0 = ~(T0 | T1); |
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RETURN(); |
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} |
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void op_or (void) |
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{ |
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T0 |= T1; |
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RETURN(); |
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} |
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void op_xor (void) |
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{ |
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T0 ^= T1; |
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RETURN(); |
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} |
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void op_sll (void) |
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{ |
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T0 = T0 << T1; |
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RETURN(); |
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} |
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void op_sra (void) |
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{ |
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T0 = (int32_t)T0 >> T1; |
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RETURN(); |
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} |
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void op_srl (void) |
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{ |
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T0 = T0 >> T1; |
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RETURN(); |
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} |
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void op_sllv (void) |
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{ |
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T0 = T1 << (T0 & 0x1F);
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RETURN(); |
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} |
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void op_srav (void) |
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{ |
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T0 = (int32_t)T1 >> (T0 & 0x1F);
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RETURN(); |
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} |
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void op_srlv (void) |
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{ |
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T0 = T1 >> (T0 & 0x1F);
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RETURN(); |
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} |
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void op_clo (void) |
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{ |
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int n;
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if (T0 == (target_ulong)-1) { |
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T0 = 32;
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} else {
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for (n = 0; n < 32; n++) { |
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if (!(T0 & (1 << 31))) |
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break;
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T0 = T0 << 1;
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} |
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T0 = n; |
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} |
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RETURN(); |
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} |
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void op_clz (void) |
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{ |
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int n;
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if (T0 == 0) { |
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T0 = 32;
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} else {
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for (n = 0; n < 32; n++) { |
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if (T0 & (1 << 31)) |
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break;
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T0 = T0 << 1;
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} |
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T0 = n; |
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} |
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RETURN(); |
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} |
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/* 64 bits arithmetic */
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#if (HOST_LONG_BITS == 64) |
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static inline uint64_t get_HILO (void) |
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{ |
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return ((uint64_t)env->HI << 32) | (uint64_t)env->LO; |
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} |
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static inline void set_HILO (uint64_t HILO) |
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{ |
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env->LO = HILO & 0xFFFFFFFF;
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env->HI = HILO >> 32;
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} |
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void op_mult (void) |
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{ |
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set_HILO((int64_t)T0 * (int64_t)T1); |
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RETURN(); |
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} |
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void op_multu (void) |
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{ |
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set_HILO((uint64_t)T0 * (uint64_t)T1); |
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RETURN(); |
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} |
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void op_madd (void) |
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{ |
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int64_t tmp; |
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tmp = ((int64_t)T0 * (int64_t)T1); |
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set_HILO((int64_t)get_HILO() + tmp); |
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RETURN(); |
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} |
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void op_maddu (void) |
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{ |
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uint64_t tmp; |
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tmp = ((uint64_t)T0 * (uint64_t)T1); |
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set_HILO(get_HILO() + tmp); |
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RETURN(); |
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} |
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void op_msub (void) |
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{ |
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int64_t tmp; |
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tmp = ((int64_t)T0 * (int64_t)T1); |
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set_HILO((int64_t)get_HILO() - tmp); |
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RETURN(); |
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} |
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void op_msubu (void) |
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{ |
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uint64_t tmp; |
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tmp = ((uint64_t)T0 * (uint64_t)T1); |
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set_HILO(get_HILO() - tmp); |
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RETURN(); |
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} |
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#else
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void op_mult (void) |
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{ |
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CALL_FROM_TB0(do_mult); |
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RETURN(); |
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} |
394 |
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void op_multu (void) |
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{ |
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CALL_FROM_TB0(do_multu); |
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RETURN(); |
399 |
} |
400 |
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void op_madd (void) |
402 |
{ |
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CALL_FROM_TB0(do_madd); |
404 |
RETURN(); |
405 |
} |
406 |
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void op_maddu (void) |
408 |
{ |
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CALL_FROM_TB0(do_maddu); |
410 |
RETURN(); |
411 |
} |
412 |
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void op_msub (void) |
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{ |
415 |
CALL_FROM_TB0(do_msub); |
416 |
RETURN(); |
417 |
} |
418 |
|
419 |
void op_msubu (void) |
420 |
{ |
421 |
CALL_FROM_TB0(do_msubu); |
422 |
RETURN(); |
423 |
} |
424 |
#endif
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425 |
|
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/* Conditional moves */
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427 |
void op_movn (void) |
428 |
{ |
429 |
if (T1 != 0) |
430 |
env->gpr[PARAM1] = T0; |
431 |
RETURN(); |
432 |
} |
433 |
|
434 |
void op_movz (void) |
435 |
{ |
436 |
if (T1 == 0) |
437 |
env->gpr[PARAM1] = T0; |
438 |
RETURN(); |
439 |
} |
440 |
|
441 |
/* Tests */
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442 |
#define OP_COND(name, cond) \
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443 |
void glue(op_, name) (void) \ |
444 |
{ \ |
445 |
if (cond) { \
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446 |
T0 = 1; \
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447 |
} else { \
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448 |
T0 = 0; \
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449 |
} \ |
450 |
RETURN(); \ |
451 |
} |
452 |
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453 |
OP_COND(eq, T0 == T1); |
454 |
OP_COND(ne, T0 != T1); |
455 |
OP_COND(ge, (int32_t)T0 >= (int32_t)T1); |
456 |
OP_COND(geu, T0 >= T1); |
457 |
OP_COND(lt, (int32_t)T0 < (int32_t)T1); |
458 |
OP_COND(ltu, T0 < T1); |
459 |
OP_COND(gez, (int32_t)T0 >= 0);
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460 |
OP_COND(gtz, (int32_t)T0 > 0);
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461 |
OP_COND(lez, (int32_t)T0 <= 0);
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462 |
OP_COND(ltz, (int32_t)T0 < 0);
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463 |
|
464 |
/* Branchs */
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465 |
//#undef USE_DIRECT_JUMP
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466 |
#define EIP env->PC
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467 |
|
468 |
/* Branch to register */
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469 |
void op_save_breg_target (void) |
470 |
{ |
471 |
env->btarget = T2; |
472 |
} |
473 |
|
474 |
void op_restore_breg_target (void) |
475 |
{ |
476 |
T2 = env->btarget; |
477 |
} |
478 |
|
479 |
void op_breg (void) |
480 |
{ |
481 |
env->PC = T2; |
482 |
RETURN(); |
483 |
} |
484 |
|
485 |
/* Unconditional branch */
|
486 |
void op_branch (void) |
487 |
{ |
488 |
JUMP_TB(branch, PARAM1, 0, PARAM2);
|
489 |
RETURN(); |
490 |
} |
491 |
|
492 |
void op_save_btarget (void) |
493 |
{ |
494 |
env->btarget = PARAM1; |
495 |
RETURN(); |
496 |
} |
497 |
|
498 |
/* Conditional branch */
|
499 |
void op_set_bcond (void) |
500 |
{ |
501 |
T2 = T0; |
502 |
RETURN(); |
503 |
} |
504 |
|
505 |
void op_save_bcond (void) |
506 |
{ |
507 |
env->bcond = T2; |
508 |
RETURN(); |
509 |
} |
510 |
|
511 |
void op_restore_bcond (void) |
512 |
{ |
513 |
T2 = env->bcond; |
514 |
RETURN(); |
515 |
} |
516 |
|
517 |
void op_bcond (void) |
518 |
{ |
519 |
if (T2) {
|
520 |
JUMP_TB(bcond, PARAM1, 0, PARAM2);
|
521 |
} else {
|
522 |
JUMP_TB(bcond, PARAM1, 1, PARAM3);
|
523 |
} |
524 |
RETURN(); |
525 |
} |
526 |
|
527 |
/* Likely branch (used to skip the delay slot) */
|
528 |
void op_blikely (void) |
529 |
{ |
530 |
/* If the test is false, skip the delay slot */
|
531 |
if (T2 == 0) { |
532 |
env->hflags = PARAM3; |
533 |
JUMP_TB(blikely, PARAM1, 1, PARAM2);
|
534 |
} |
535 |
RETURN(); |
536 |
} |
537 |
|
538 |
/* CP0 functions */
|
539 |
void op_mfc0 (void) |
540 |
{ |
541 |
CALL_FROM_TB2(do_mfc0, PARAM1, PARAM2); |
542 |
RETURN(); |
543 |
} |
544 |
|
545 |
void op_mtc0 (void) |
546 |
{ |
547 |
CALL_FROM_TB2(do_mtc0, PARAM1, PARAM2); |
548 |
RETURN(); |
549 |
} |
550 |
|
551 |
#if defined(MIPS_USES_R4K_TLB)
|
552 |
void op_tlbwi (void) |
553 |
{ |
554 |
CALL_FROM_TB0(do_tlbwi); |
555 |
RETURN(); |
556 |
} |
557 |
|
558 |
void op_tlbwr (void) |
559 |
{ |
560 |
CALL_FROM_TB0(do_tlbwr); |
561 |
RETURN(); |
562 |
} |
563 |
|
564 |
void op_tlbp (void) |
565 |
{ |
566 |
CALL_FROM_TB0(do_tlbp); |
567 |
RETURN(); |
568 |
} |
569 |
|
570 |
void op_tlbr (void) |
571 |
{ |
572 |
CALL_FROM_TB0(do_tlbr); |
573 |
RETURN(); |
574 |
} |
575 |
#endif
|
576 |
|
577 |
/* Specials */
|
578 |
void op_pmon (void) |
579 |
{ |
580 |
CALL_FROM_TB1(do_pmon, PARAM1); |
581 |
} |
582 |
|
583 |
void op_trap (void) |
584 |
{ |
585 |
if (T0) {
|
586 |
CALL_FROM_TB1(do_raise_exception, EXCP_TRAP); |
587 |
} |
588 |
RETURN(); |
589 |
} |
590 |
|
591 |
void op_set_lladdr (void) |
592 |
{ |
593 |
env->CP0_LLAddr = T2; |
594 |
} |
595 |
|
596 |
void debug_eret (void); |
597 |
void op_eret (void) |
598 |
{ |
599 |
CALL_FROM_TB0(debug_eret); |
600 |
if (env->hflags & MIPS_HFLAG_ERL) {
|
601 |
env->PC = env->CP0_ErrorEPC; |
602 |
env->hflags &= ~MIPS_HFLAG_ERL; |
603 |
} else {
|
604 |
env->PC = env->CP0_EPC; |
605 |
env->hflags &= ~MIPS_HFLAG_EXL; |
606 |
} |
607 |
env->CP0_LLAddr = 1;
|
608 |
} |
609 |
|
610 |
void op_deret (void) |
611 |
{ |
612 |
CALL_FROM_TB0(debug_eret); |
613 |
env->PC = env->CP0_DEPC; |
614 |
} |
615 |
|
616 |
void op_save_state (void) |
617 |
{ |
618 |
env->hflags = PARAM1; |
619 |
RETURN(); |
620 |
} |
621 |
|
622 |
void op_save_pc (void) |
623 |
{ |
624 |
env->PC = PARAM1; |
625 |
RETURN(); |
626 |
} |
627 |
|
628 |
void op_raise_exception (void) |
629 |
{ |
630 |
CALL_FROM_TB1(do_raise_exception, PARAM1); |
631 |
RETURN(); |
632 |
} |
633 |
|
634 |
void op_raise_exception_err (void) |
635 |
{ |
636 |
CALL_FROM_TB2(do_raise_exception_err, PARAM1, PARAM2); |
637 |
RETURN(); |
638 |
} |
639 |
|
640 |
void op_exit_tb (void) |
641 |
{ |
642 |
EXIT_TB(); |
643 |
} |
644 |
|