Statistics
| Branch: | Revision:

root / hw / mainstone.c @ 7ad7e3c3

History | View | Annotate | Download (4.4 kB)

1 ef056e43 balrog
/*
2 ef056e43 balrog
 * PXA270-based Intel Mainstone platforms.
3 ef056e43 balrog
 *
4 ef056e43 balrog
 * Copyright (c) 2007 by Armin Kuster <akuster@kama-aina.net> or
5 ef056e43 balrog
 *                                    <akuster@mvista.com>
6 ef056e43 balrog
 *
7 ef056e43 balrog
 * Code based on spitz platform by Andrzej Zaborowski <balrog@zabor.org>
8 ef056e43 balrog
 *
9 ef056e43 balrog
 * This code is licensed under the GNU GPL v2.
10 ef056e43 balrog
 */
11 ef056e43 balrog
#include "hw.h"
12 ef056e43 balrog
#include "pxa.h"
13 ef056e43 balrog
#include "arm-misc.h"
14 ef056e43 balrog
#include "net.h"
15 ef056e43 balrog
#include "devices.h"
16 ef056e43 balrog
#include "boards.h"
17 7233b355 ths
#include "mainstone.h"
18 7233b355 ths
#include "sysemu.h"
19 7233b355 ths
#include "flash.h"
20 ef056e43 balrog
21 bd464c2e balrog
static struct keymap map[0xE0] = {
22 bd464c2e balrog
    [0 ... 0xDF] = { -1, -1 },
23 bd464c2e balrog
    [0x1e] = {0,0}, /* a */
24 bd464c2e balrog
    [0x30] = {0,1}, /* b */
25 bd464c2e balrog
    [0x2e] = {0,2}, /* c */
26 bd464c2e balrog
    [0x20] = {0,3}, /* d */
27 bd464c2e balrog
    [0x12] = {0,4}, /* e */
28 bd464c2e balrog
    [0x21] = {0,5}, /* f */
29 bd464c2e balrog
    [0x22] = {1,0}, /* g */
30 bd464c2e balrog
    [0x23] = {1,1}, /* h */
31 bd464c2e balrog
    [0x17] = {1,2}, /* i */
32 bd464c2e balrog
    [0x24] = {1,3}, /* j */
33 bd464c2e balrog
    [0x25] = {1,4}, /* k */
34 bd464c2e balrog
    [0x26] = {1,5}, /* l */
35 bd464c2e balrog
    [0x32] = {2,0}, /* m */
36 bd464c2e balrog
    [0x31] = {2,1}, /* n */
37 bd464c2e balrog
    [0x18] = {2,2}, /* o */
38 bd464c2e balrog
    [0x19] = {2,3}, /* p */
39 bd464c2e balrog
    [0x10] = {2,4}, /* q */
40 bd464c2e balrog
    [0x13] = {2,5}, /* r */
41 bd464c2e balrog
    [0x1f] = {3,0}, /* s */
42 bd464c2e balrog
    [0x14] = {3,1}, /* t */
43 bd464c2e balrog
    [0x16] = {3,2}, /* u */
44 bd464c2e balrog
    [0x2f] = {3,3}, /* v */
45 bd464c2e balrog
    [0x11] = {3,4}, /* w */
46 bd464c2e balrog
    [0x2d] = {3,5}, /* x */
47 bd464c2e balrog
    [0x15] = {4,2}, /* y */
48 bd464c2e balrog
    [0x2c] = {4,3}, /* z */
49 bd464c2e balrog
    [0xc7] = {5,0}, /* Home */
50 bd464c2e balrog
    [0x2a] = {5,1}, /* shift */
51 bd464c2e balrog
    [0x39] = {5,2}, /* space */
52 bd464c2e balrog
    [0x39] = {5,3}, /* space */
53 bd464c2e balrog
    [0x1c] = {5,5}, /*  enter */
54 bd464c2e balrog
    [0xc8] = {6,0}, /* up */
55 bd464c2e balrog
    [0xd0] = {6,1}, /* down */
56 bd464c2e balrog
    [0xcb] = {6,2}, /* left */
57 bd464c2e balrog
    [0xcd] = {6,3}, /* right */
58 bd464c2e balrog
};
59 bd464c2e balrog
60 ef056e43 balrog
enum mainstone_model_e { mainstone };
61 ef056e43 balrog
62 7fb4fdcf balrog
#define MAINSTONE_RAM        0x04000000
63 7fb4fdcf balrog
#define MAINSTONE_ROM        0x00800000
64 7fb4fdcf balrog
#define MAINSTONE_FLASH        0x02000000
65 7fb4fdcf balrog
66 f93eb9ff balrog
static struct arm_boot_info mainstone_binfo = {
67 f93eb9ff balrog
    .loader_start = PXA2XX_SDRAM_BASE,
68 f93eb9ff balrog
    .ram_size = 0x04000000,
69 f93eb9ff balrog
};
70 f93eb9ff balrog
71 c227f099 Anthony Liguori
static void mainstone_common_init(ram_addr_t ram_size,
72 3023f332 aliguori
                const char *kernel_filename,
73 ef056e43 balrog
                const char *kernel_cmdline, const char *initrd_filename,
74 ef056e43 balrog
                const char *cpu_model, enum mainstone_model_e model, int arm_id)
75 ef056e43 balrog
{
76 6d1f1778 balrog
    uint32_t sector_len = 256 * 1024;
77 c227f099 Anthony Liguori
    target_phys_addr_t mainstone_flash_base[] = { MST_FLASH_0, MST_FLASH_1 };
78 bc24a225 Paul Brook
    PXA2xxState *cpu;
79 ef056e43 balrog
    qemu_irq *mst_irq;
80 751c6a17 Gerd Hoffmann
    DriveInfo *dinfo;
81 751c6a17 Gerd Hoffmann
    int i;
82 ef056e43 balrog
83 ef056e43 balrog
    if (!cpu_model)
84 ef056e43 balrog
        cpu_model = "pxa270-c5";
85 ef056e43 balrog
86 ef056e43 balrog
    /* Setup CPU & memory */
87 3023f332 aliguori
    cpu = pxa270_init(mainstone_binfo.ram_size, cpu_model);
88 7fb4fdcf balrog
    cpu_register_physical_memory(0, MAINSTONE_ROM,
89 7fb4fdcf balrog
                    qemu_ram_alloc(MAINSTONE_ROM) | IO_MEM_ROM);
90 ef056e43 balrog
91 ef056e43 balrog
    /* Setup initial (reset) machine state */
92 f93eb9ff balrog
    cpu->env->regs[15] = mainstone_binfo.loader_start;
93 ef056e43 balrog
94 e4bcb14c ths
    /* There are two 32MiB flash devices on the board */
95 6d1f1778 balrog
    for (i = 0; i < 2; i ++) {
96 751c6a17 Gerd Hoffmann
        dinfo = drive_get(IF_PFLASH, 0, i);
97 751c6a17 Gerd Hoffmann
        if (!dinfo) {
98 6d1f1778 balrog
            fprintf(stderr, "Two flash images must be given with the "
99 6d1f1778 balrog
                    "'pflash' parameter\n");
100 6d1f1778 balrog
            exit(1);
101 6d1f1778 balrog
        }
102 6d1f1778 balrog
103 6d1f1778 balrog
        if (!pflash_cfi01_register(mainstone_flash_base[i],
104 7fb4fdcf balrog
                                qemu_ram_alloc(MAINSTONE_FLASH),
105 751c6a17 Gerd Hoffmann
                                dinfo->bdrv, sector_len,
106 7fb4fdcf balrog
                                MAINSTONE_FLASH / sector_len, 4, 0, 0, 0, 0)) {
107 6d1f1778 balrog
            fprintf(stderr, "qemu: Error registering flash memory.\n");
108 6d1f1778 balrog
            exit(1);
109 6d1f1778 balrog
        }
110 e4bcb14c ths
    }
111 7233b355 ths
112 7233b355 ths
    mst_irq = mst_irq_init(cpu, MST_FPGA_PHYS, PXA2XX_PIC_GPIO_0);
113 f1de1334 ths
114 bd464c2e balrog
    /* setup keypad */
115 bd464c2e balrog
    printf("map addr %p\n", &map);
116 bd464c2e balrog
    pxa27x_register_keypad(cpu->kp, map, 0xe0);
117 bd464c2e balrog
118 f1de1334 ths
    /* MMC/SD host */
119 8543243c balrog
    pxa2xx_mmci_handlers(cpu->mmc, NULL, mst_irq[MMC_IRQ]);
120 f1de1334 ths
121 ef056e43 balrog
    smc91c111_init(&nd_table[0], MST_ETH_PHYS, mst_irq[ETHERNET_IRQ]);
122 ef056e43 balrog
123 f93eb9ff balrog
    mainstone_binfo.kernel_filename = kernel_filename;
124 f93eb9ff balrog
    mainstone_binfo.kernel_cmdline = kernel_cmdline;
125 f93eb9ff balrog
    mainstone_binfo.initrd_filename = initrd_filename;
126 f93eb9ff balrog
    mainstone_binfo.board_id = arm_id;
127 f93eb9ff balrog
    arm_load_kernel(cpu->env, &mainstone_binfo);
128 ef056e43 balrog
}
129 ef056e43 balrog
130 c227f099 Anthony Liguori
static void mainstone_init(ram_addr_t ram_size,
131 3023f332 aliguori
                const char *boot_device,
132 ef056e43 balrog
                const char *kernel_filename, const char *kernel_cmdline,
133 ef056e43 balrog
                const char *initrd_filename, const char *cpu_model)
134 ef056e43 balrog
{
135 fbe1b595 Paul Brook
    mainstone_common_init(ram_size, kernel_filename,
136 ef056e43 balrog
                kernel_cmdline, initrd_filename, cpu_model, mainstone, 0x196);
137 ef056e43 balrog
}
138 ef056e43 balrog
139 f80f9ec9 Anthony Liguori
static QEMUMachine mainstone2_machine = {
140 4b32e168 aliguori
    .name = "mainstone",
141 4b32e168 aliguori
    .desc = "Mainstone II (PXA27x)",
142 4b32e168 aliguori
    .init = mainstone_init,
143 ef056e43 balrog
};
144 f80f9ec9 Anthony Liguori
145 f80f9ec9 Anthony Liguori
static void mainstone_machine_init(void)
146 f80f9ec9 Anthony Liguori
{
147 f80f9ec9 Anthony Liguori
    qemu_register_machine(&mainstone2_machine);
148 f80f9ec9 Anthony Liguori
}
149 f80f9ec9 Anthony Liguori
150 f80f9ec9 Anthony Liguori
machine_init(mainstone_machine_init);