root / hw / ppc_chrp.c @ 7b17d41e
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1 | 64201201 | bellard | /*
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2 | 64201201 | bellard | * QEMU PPC CHRP/PMAC hardware System Emulator
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3 | 64201201 | bellard | *
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4 | 64201201 | bellard | * Copyright (c) 2004 Fabrice Bellard
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5 | 64201201 | bellard | *
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6 | 64201201 | bellard | * Permission is hereby granted, free of charge, to any person obtaining a copy
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7 | 64201201 | bellard | * of this software and associated documentation files (the "Software"), to deal
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8 | 64201201 | bellard | * in the Software without restriction, including without limitation the rights
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9 | 64201201 | bellard | * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
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10 | 64201201 | bellard | * copies of the Software, and to permit persons to whom the Software is
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11 | 64201201 | bellard | * furnished to do so, subject to the following conditions:
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12 | 64201201 | bellard | *
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13 | 64201201 | bellard | * The above copyright notice and this permission notice shall be included in
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14 | 64201201 | bellard | * all copies or substantial portions of the Software.
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15 | 64201201 | bellard | *
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16 | 64201201 | bellard | * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
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17 | 64201201 | bellard | * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
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18 | 64201201 | bellard | * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
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19 | 64201201 | bellard | * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
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20 | 64201201 | bellard | * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
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21 | 64201201 | bellard | * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
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22 | 64201201 | bellard | * THE SOFTWARE.
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23 | 64201201 | bellard | */
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24 | 64201201 | bellard | #include "vl.h" |
25 | 64201201 | bellard | |
26 | 64201201 | bellard | #define BIOS_FILENAME "ppc_rom.bin" |
27 | 64201201 | bellard | #define NVRAM_SIZE 0x2000 |
28 | 64201201 | bellard | |
29 | 267002cd | bellard | /* MacIO devices (mapped inside the MacIO address space): CUDA, DBDMA,
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30 | 267002cd | bellard | NVRAM (not implemented). */
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31 | 267002cd | bellard | |
32 | 267002cd | bellard | static int dbdma_mem_index; |
33 | 267002cd | bellard | static int cuda_mem_index; |
34 | 267002cd | bellard | |
35 | 267002cd | bellard | /* DBDMA: currently no op - should suffice right now */
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36 | 267002cd | bellard | |
37 | 267002cd | bellard | static void dbdma_writeb (void *opaque, target_phys_addr_t addr, uint32_t value) |
38 | 267002cd | bellard | { |
39 | 267002cd | bellard | } |
40 | 267002cd | bellard | |
41 | 267002cd | bellard | static void dbdma_writew (void *opaque, target_phys_addr_t addr, uint32_t value) |
42 | 267002cd | bellard | { |
43 | 267002cd | bellard | } |
44 | 267002cd | bellard | |
45 | 267002cd | bellard | static void dbdma_writel (void *opaque, target_phys_addr_t addr, uint32_t value) |
46 | 267002cd | bellard | { |
47 | 267002cd | bellard | } |
48 | 267002cd | bellard | |
49 | 267002cd | bellard | static uint32_t dbdma_readb (void *opaque, target_phys_addr_t addr) |
50 | 267002cd | bellard | { |
51 | 267002cd | bellard | return 0; |
52 | 267002cd | bellard | } |
53 | 267002cd | bellard | |
54 | 267002cd | bellard | static uint32_t dbdma_readw (void *opaque, target_phys_addr_t addr) |
55 | 267002cd | bellard | { |
56 | 267002cd | bellard | return 0; |
57 | 267002cd | bellard | } |
58 | 267002cd | bellard | |
59 | 267002cd | bellard | static uint32_t dbdma_readl (void *opaque, target_phys_addr_t addr) |
60 | 267002cd | bellard | { |
61 | 267002cd | bellard | return 0; |
62 | 267002cd | bellard | } |
63 | 267002cd | bellard | |
64 | 267002cd | bellard | static CPUWriteMemoryFunc *dbdma_write[] = {
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65 | 267002cd | bellard | &dbdma_writeb, |
66 | 267002cd | bellard | &dbdma_writew, |
67 | 267002cd | bellard | &dbdma_writel, |
68 | 267002cd | bellard | }; |
69 | 267002cd | bellard | |
70 | 267002cd | bellard | static CPUReadMemoryFunc *dbdma_read[] = {
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71 | 267002cd | bellard | &dbdma_readb, |
72 | 267002cd | bellard | &dbdma_readw, |
73 | 267002cd | bellard | &dbdma_readl, |
74 | 267002cd | bellard | }; |
75 | 267002cd | bellard | |
76 | 267002cd | bellard | static void macio_map(PCIDevice *pci_dev, int region_num, |
77 | 267002cd | bellard | uint32_t addr, uint32_t size, int type)
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78 | 267002cd | bellard | { |
79 | 267002cd | bellard | cpu_register_physical_memory(addr + 0x08000, 0x1000, dbdma_mem_index); |
80 | 267002cd | bellard | cpu_register_physical_memory(addr + 0x16000, 0x2000, cuda_mem_index); |
81 | 267002cd | bellard | } |
82 | 267002cd | bellard | |
83 | 267002cd | bellard | static void macio_init(void) |
84 | 267002cd | bellard | { |
85 | 267002cd | bellard | PCIDevice *d; |
86 | 267002cd | bellard | |
87 | 267002cd | bellard | d = pci_register_device("macio", sizeof(PCIDevice), |
88 | 267002cd | bellard | 0, -1, |
89 | 267002cd | bellard | NULL, NULL); |
90 | 267002cd | bellard | /* Note: this code is strongly inspirated from the corresponding code
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91 | 267002cd | bellard | in PearPC */
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92 | 267002cd | bellard | d->config[0x00] = 0x6b; // vendor_id |
93 | 267002cd | bellard | d->config[0x01] = 0x10; |
94 | 267002cd | bellard | d->config[0x02] = 0x17; |
95 | 267002cd | bellard | d->config[0x03] = 0x00; |
96 | 267002cd | bellard | |
97 | 267002cd | bellard | d->config[0x0a] = 0x00; // class_sub = pci2pci |
98 | 267002cd | bellard | d->config[0x0b] = 0xff; // class_base = bridge |
99 | 267002cd | bellard | d->config[0x0e] = 0x00; // header_type |
100 | 267002cd | bellard | |
101 | 267002cd | bellard | d->config[0x3d] = 0x01; // interrupt on pin 1 |
102 | 267002cd | bellard | |
103 | 267002cd | bellard | dbdma_mem_index = cpu_register_io_memory(0, dbdma_read, dbdma_write, NULL); |
104 | 267002cd | bellard | |
105 | 267002cd | bellard | pci_register_io_region(d, 0, 0x80000, |
106 | 267002cd | bellard | PCI_ADDRESS_SPACE_MEM, macio_map); |
107 | 267002cd | bellard | } |
108 | 267002cd | bellard | |
109 | 64201201 | bellard | /* PowerPC PREP hardware initialisation */
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110 | 64201201 | bellard | void ppc_chrp_init(int ram_size, int vga_ram_size, int boot_device, |
111 | 64201201 | bellard | DisplayState *ds, const char **fd_filename, int snapshot, |
112 | 64201201 | bellard | const char *kernel_filename, const char *kernel_cmdline, |
113 | 64201201 | bellard | const char *initrd_filename) |
114 | 64201201 | bellard | { |
115 | 64201201 | bellard | char buf[1024]; |
116 | 64201201 | bellard | m48t59_t *nvram; |
117 | 64201201 | bellard | int PPC_io_memory;
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118 | 64201201 | bellard | int ret, linux_boot, i, fd;
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119 | 64201201 | bellard | unsigned long bios_offset; |
120 | 64201201 | bellard | |
121 | 64201201 | bellard | linux_boot = (kernel_filename != NULL);
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122 | 64201201 | bellard | |
123 | 64201201 | bellard | /* allocate RAM */
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124 | 64201201 | bellard | cpu_register_physical_memory(0, ram_size, IO_MEM_RAM);
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125 | 64201201 | bellard | |
126 | 64201201 | bellard | /* allocate and load BIOS */
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127 | 64201201 | bellard | bios_offset = ram_size + vga_ram_size; |
128 | 64201201 | bellard | snprintf(buf, sizeof(buf), "%s/%s", bios_dir, BIOS_FILENAME); |
129 | 64201201 | bellard | ret = load_image(buf, phys_ram_base + bios_offset); |
130 | 64201201 | bellard | if (ret != BIOS_SIZE) {
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131 | 64201201 | bellard | fprintf(stderr, "qemu: could not load PPC PREP bios '%s'\n", buf);
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132 | 64201201 | bellard | exit(1);
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133 | 64201201 | bellard | } |
134 | 64201201 | bellard | cpu_register_physical_memory((uint32_t)(-BIOS_SIZE), |
135 | 64201201 | bellard | BIOS_SIZE, bios_offset | IO_MEM_ROM); |
136 | 64201201 | bellard | cpu_single_env->nip = 0xfffffffc;
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137 | 64201201 | bellard | |
138 | 64201201 | bellard | /* Register CPU as a 74x/75x */
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139 | 64201201 | bellard | cpu_ppc_register(cpu_single_env, 0x00080000);
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140 | 64201201 | bellard | /* Set time-base frequency to 100 Mhz */
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141 | 64201201 | bellard | cpu_ppc_tb_init(cpu_single_env, 100UL * 1000UL * 1000UL); |
142 | 64201201 | bellard | |
143 | 64201201 | bellard | isa_mem_base = 0xc0000000;
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144 | 64201201 | bellard | pci_pmac_init(); |
145 | 64201201 | bellard | |
146 | 64201201 | bellard | /* Register 64 KB of ISA IO space */
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147 | a4193c8a | bellard | PPC_io_memory = cpu_register_io_memory(0, PPC_io_read, PPC_io_write, NULL); |
148 | 64201201 | bellard | cpu_register_physical_memory(0x80000000, 0x10000, PPC_io_memory); |
149 | 64201201 | bellard | // cpu_register_physical_memory(0xfe000000, 0xfe010000, PPC_io_memory);
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150 | 64201201 | bellard | |
151 | 64201201 | bellard | /* init basic PC hardware */
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152 | 64201201 | bellard | vga_initialize(ds, phys_ram_base + ram_size, ram_size, |
153 | 64201201 | bellard | vga_ram_size, 1);
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154 | 64201201 | bellard | // openpic = openpic_init(0x00000000, 0xF0000000, 1);
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155 | 64201201 | bellard | // pic_init(openpic);
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156 | 64201201 | bellard | pic_init(); |
157 | 64201201 | bellard | // pit = pit_init(0x40, 0);
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158 | 64201201 | bellard | |
159 | 64201201 | bellard | /* XXX: use Mac Serial port */
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160 | 64201201 | bellard | fd = serial_open_device(); |
161 | 64201201 | bellard | serial_init(0x3f8, 4, fd); |
162 | 64201201 | bellard | |
163 | 64201201 | bellard | for(i = 0; i < nb_nics; i++) { |
164 | 64201201 | bellard | pci_ne2000_init(&nd_table[i]); |
165 | 64201201 | bellard | } |
166 | 64201201 | bellard | |
167 | 64201201 | bellard | pci_ide_init(bs_table); |
168 | 64201201 | bellard | |
169 | 267002cd | bellard | /* cuda also initialize ADB */
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170 | 267002cd | bellard | cuda_mem_index = cuda_init(); |
171 | 267002cd | bellard | |
172 | 267002cd | bellard | adb_kbd_init(&adb_bus); |
173 | 267002cd | bellard | adb_mouse_init(&adb_bus); |
174 | 267002cd | bellard | |
175 | 267002cd | bellard | macio_init(); |
176 | 64201201 | bellard | |
177 | 64201201 | bellard | nvram = m48t59_init(8, 0x0074, NVRAM_SIZE); |
178 | 64201201 | bellard | |
179 | 64201201 | bellard | PPC_NVRAM_set_params(nvram, NVRAM_SIZE, "PREP", ram_size, boot_device,
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180 | 64201201 | bellard | 0, 0, |
181 | 64201201 | bellard | 0,
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182 | 64201201 | bellard | 0,
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183 | 64201201 | bellard | 0, 0, |
184 | 64201201 | bellard | /* XXX: need an option to load a NVRAM image */
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185 | 64201201 | bellard | 0
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186 | 64201201 | bellard | ); |
187 | 64201201 | bellard | |
188 | 64201201 | bellard | /* Special port to get debug messages from Open-Firmware */
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189 | 64201201 | bellard | register_ioport_write(0xFF00, 0x04, 1, &PREP_debug_write, NULL); |
190 | 64201201 | bellard | register_ioport_write(0xFF00, 0x04, 2, &PREP_debug_write, NULL); |
191 | 64201201 | bellard | |
192 | 64201201 | bellard | pci_ppc_bios_init(); |
193 | 64201201 | bellard | } |