Revision 7b5045c5 hw/dma.c
| b/hw/dma.c | ||
|---|---|---|
| 500 | 500 |
} |
| 501 | 501 |
} |
| 502 | 502 |
|
| 503 |
static void dma_save (QEMUFile *f, void *opaque) |
|
| 504 |
{
|
|
| 505 |
struct dma_cont *d = opaque; |
|
| 506 |
int i; |
|
| 507 |
|
|
| 508 |
/* qemu_put_8s (f, &d->status); */ |
|
| 509 |
qemu_put_8s (f, &d->command); |
|
| 510 |
qemu_put_8s (f, &d->mask); |
|
| 511 |
qemu_put_8s (f, &d->flip_flop); |
|
| 512 |
qemu_put_be32 (f, d->dshift); |
|
| 513 |
|
|
| 514 |
for (i = 0; i < 4; ++i) {
|
|
| 515 |
struct dma_regs *r = &d->regs[i]; |
|
| 516 |
qemu_put_be32 (f, r->now[0]); |
|
| 517 |
qemu_put_be32 (f, r->now[1]); |
|
| 518 |
qemu_put_be16s (f, &r->base[0]); |
|
| 519 |
qemu_put_be16s (f, &r->base[1]); |
|
| 520 |
qemu_put_8s (f, &r->mode); |
|
| 521 |
qemu_put_8s (f, &r->page); |
|
| 522 |
qemu_put_8s (f, &r->pageh); |
|
| 523 |
qemu_put_8s (f, &r->dack); |
|
| 524 |
qemu_put_8s (f, &r->eop); |
|
| 503 |
static const VMStateDescription vmstate_dma_regs = {
|
|
| 504 |
.name = "dma_regs", |
|
| 505 |
.version_id = 1, |
|
| 506 |
.minimum_version_id = 1, |
|
| 507 |
.minimum_version_id_old = 1, |
|
| 508 |
.fields = (VMStateField []) {
|
|
| 509 |
VMSTATE_INT32_ARRAY(now, struct dma_regs, 2), |
|
| 510 |
VMSTATE_UINT16_ARRAY(base, struct dma_regs, 2), |
|
| 511 |
VMSTATE_UINT8(mode, struct dma_regs), |
|
| 512 |
VMSTATE_UINT8(page, struct dma_regs), |
|
| 513 |
VMSTATE_UINT8(pageh, struct dma_regs), |
|
| 514 |
VMSTATE_UINT8(dack, struct dma_regs), |
|
| 515 |
VMSTATE_UINT8(eop, struct dma_regs), |
|
| 516 |
VMSTATE_END_OF_LIST() |
|
| 525 | 517 |
} |
| 526 |
} |
|
| 518 |
};
|
|
| 527 | 519 |
|
| 528 |
static int dma_load (QEMUFile *f, void *opaque, int version_id)
|
|
| 520 |
static int dma_post_load(void *opaque)
|
|
| 529 | 521 |
{
|
| 530 |
struct dma_cont *d = opaque; |
|
| 531 |
int i; |
|
| 532 |
|
|
| 533 |
if (version_id != 1) |
|
| 534 |
return -EINVAL; |
|
| 535 |
|
|
| 536 |
/* qemu_get_8s (f, &d->status); */ |
|
| 537 |
qemu_get_8s (f, &d->command); |
|
| 538 |
qemu_get_8s (f, &d->mask); |
|
| 539 |
qemu_get_8s (f, &d->flip_flop); |
|
| 540 |
d->dshift=qemu_get_be32 (f); |
|
| 541 |
|
|
| 542 |
for (i = 0; i < 4; ++i) {
|
|
| 543 |
struct dma_regs *r = &d->regs[i]; |
|
| 544 |
r->now[0]=qemu_get_be32 (f); |
|
| 545 |
r->now[1]=qemu_get_be32 (f); |
|
| 546 |
qemu_get_be16s (f, &r->base[0]); |
|
| 547 |
qemu_get_be16s (f, &r->base[1]); |
|
| 548 |
qemu_get_8s (f, &r->mode); |
|
| 549 |
qemu_get_8s (f, &r->page); |
|
| 550 |
qemu_get_8s (f, &r->pageh); |
|
| 551 |
qemu_get_8s (f, &r->dack); |
|
| 552 |
qemu_get_8s (f, &r->eop); |
|
| 553 |
} |
|
| 554 |
|
|
| 555 | 522 |
DMA_run(); |
| 556 | 523 |
|
| 557 | 524 |
return 0; |
| 558 | 525 |
} |
| 559 | 526 |
|
| 527 |
static const VMStateDescription vmstate_dma = {
|
|
| 528 |
.name = "dma", |
|
| 529 |
.version_id = 1, |
|
| 530 |
.minimum_version_id = 1, |
|
| 531 |
.minimum_version_id_old = 1, |
|
| 532 |
.post_load = dma_post_load, |
|
| 533 |
.fields = (VMStateField []) {
|
|
| 534 |
VMSTATE_UINT8(command, struct dma_cont), |
|
| 535 |
VMSTATE_UINT8(mask, struct dma_cont), |
|
| 536 |
VMSTATE_UINT8(flip_flop, struct dma_cont), |
|
| 537 |
VMSTATE_INT32(dshift, struct dma_cont), |
|
| 538 |
VMSTATE_STRUCT_ARRAY(regs, struct dma_cont, 4, 1, vmstate_dma_regs, struct dma_regs), |
|
| 539 |
VMSTATE_END_OF_LIST() |
|
| 540 |
} |
|
| 541 |
}; |
|
| 542 |
|
|
| 560 | 543 |
void DMA_init (int high_page_enable) |
| 561 | 544 |
{
|
| 562 | 545 |
dma_init2(&dma_controllers[0], 0x00, 0, 0x80, |
| 563 | 546 |
high_page_enable ? 0x480 : -1); |
| 564 | 547 |
dma_init2(&dma_controllers[1], 0xc0, 1, 0x88, |
| 565 | 548 |
high_page_enable ? 0x488 : -1); |
| 566 |
register_savevm ("dma", 0, 1, dma_save, dma_load, &dma_controllers[0]);
|
|
| 567 |
register_savevm ("dma", 1, 1, dma_save, dma_load, &dma_controllers[1]);
|
|
| 549 |
vmstate_register (0, &vmstate_dma, &dma_controllers[0]);
|
|
| 550 |
vmstate_register (1, &vmstate_dma, &dma_controllers[1]);
|
|
| 568 | 551 |
|
| 569 | 552 |
dma_bh = qemu_bh_new(DMA_run_bh, NULL); |
| 570 | 553 |
} |
Also available in: Unified diff