Revision 7bdf43a7 hw/exynos4210.c
b/hw/exynos4210.c | ||
---|---|---|
33 | 33 |
/* PWM */ |
34 | 34 |
#define EXYNOS4210_PWM_BASE_ADDR 0x139D0000 |
35 | 35 |
|
36 |
/* RTC */ |
|
37 |
#define EXYNOS4210_RTC_BASE_ADDR 0x10070000 |
|
38 |
|
|
36 | 39 |
/* MCT */ |
37 | 40 |
#define EXYNOS4210_MCT_BASE_ADDR 0x10050000 |
38 | 41 |
|
... | ... | |
258 | 261 |
s->irq_table[exynos4210_get_irq(22, 3)], |
259 | 262 |
s->irq_table[exynos4210_get_irq(22, 4)], |
260 | 263 |
NULL); |
264 |
/* RTC */ |
|
265 |
sysbus_create_varargs("exynos4210.rtc", EXYNOS4210_RTC_BASE_ADDR, |
|
266 |
s->irq_table[exynos4210_get_irq(23, 0)], |
|
267 |
s->irq_table[exynos4210_get_irq(23, 1)], |
|
268 |
NULL); |
|
261 | 269 |
|
262 | 270 |
/* Multi Core Timer */ |
263 | 271 |
dev = qdev_create(NULL, "exynos4210.mct"); |
Also available in: Unified diff