Revision 7c1840b6 hw/arm/pic_cpu.c
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#include "hw/hw.h" |
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#include "hw/arm/arm.h" |
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#include "sysemu/kvm.h" |
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/* Input 0 is IRQ and input 1 is FIQ. */ |
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static void arm_pic_cpu_handler(void *opaque, int irq, int level) |
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{
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ARMCPU *cpu = opaque; |
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CPUState *cs = CPU(cpu); |
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switch (irq) {
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case ARM_PIC_CPU_IRQ: |
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if (level) {
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cpu_interrupt(cs, CPU_INTERRUPT_HARD); |
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} else {
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cpu_reset_interrupt(cs, CPU_INTERRUPT_HARD); |
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} |
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break; |
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case ARM_PIC_CPU_FIQ: |
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if (level) {
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cpu_interrupt(cs, CPU_INTERRUPT_FIQ); |
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} else {
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cpu_reset_interrupt(cs, CPU_INTERRUPT_FIQ); |
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} |
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break; |
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default: |
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hw_error("arm_pic_cpu_handler: Bad interrupt line %d\n", irq);
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} |
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} |
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static void kvm_arm_pic_cpu_handler(void *opaque, int irq, int level) |
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{
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#ifdef CONFIG_KVM |
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ARMCPU *cpu = opaque; |
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CPUState *cs = CPU(cpu); |
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int kvm_irq = KVM_ARM_IRQ_TYPE_CPU << KVM_ARM_IRQ_TYPE_SHIFT; |
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switch (irq) {
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case ARM_PIC_CPU_IRQ: |
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kvm_irq |= KVM_ARM_IRQ_CPU_IRQ; |
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break; |
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case ARM_PIC_CPU_FIQ: |
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kvm_irq |= KVM_ARM_IRQ_CPU_FIQ; |
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break; |
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default: |
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hw_error("kvm_arm_pic_cpu_handler: Bad interrupt line %d\n", irq);
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} |
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kvm_irq |= cs->cpu_index << KVM_ARM_IRQ_VCPU_SHIFT; |
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kvm_set_irq(kvm_state, kvm_irq, level ? 1 : 0); |
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#endif |
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} |
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/* Backwards compatibility shim; this can disappear when all |
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* board models have been updated to get IRQ and FIQ lines directly |
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* from the ARMCPU object rather than by calling this function. |
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*/ |
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qemu_irq *arm_pic_init_cpu(ARMCPU *cpu) |
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{
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if (kvm_enabled()) {
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return qemu_allocate_irqs(kvm_arm_pic_cpu_handler, cpu, 2); |
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} |
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return qemu_allocate_irqs(arm_pic_cpu_handler, cpu, 2); |
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DeviceState *dev = DEVICE(cpu); |
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qemu_irq *irqs = g_new(qemu_irq, 2); |
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irqs[0] = qdev_get_gpio_in(dev, ARM_CPU_IRQ); |
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irqs[1] = qdev_get_gpio_in(dev, ARM_CPU_FIQ); |
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return irqs; |
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} |
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